Lines Matching +full:bypass +full:- +full:enable
1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8955.c -- WM8955 ALSA SoC Audio driver
50 { 2, 0x0079 }, /* R2 - LOUT1 volume */
51 { 3, 0x0079 }, /* R3 - ROUT1 volume */
52 { 5, 0x0008 }, /* R5 - DAC Control */
53 { 7, 0x000A }, /* R7 - Audio Interface */
54 { 8, 0x0000 }, /* R8 - Sample Rate */
55 { 10, 0x00FF }, /* R10 - Left DAC volume */
56 { 11, 0x00FF }, /* R11 - Right DAC volume */
57 { 12, 0x000F }, /* R12 - Bass control */
58 { 13, 0x000F }, /* R13 - Treble control */
59 { 23, 0x00C1 }, /* R23 - Additional control (1) */
60 { 24, 0x0000 }, /* R24 - Additional control (2) */
61 { 25, 0x0000 }, /* R25 - Power Management (1) */
62 { 26, 0x0000 }, /* R26 - Power Management (2) */
63 { 27, 0x0000 }, /* R27 - Additional Control (3) */
64 { 34, 0x0050 }, /* R34 - Left out Mix (1) */
65 { 35, 0x0050 }, /* R35 - Left out Mix (2) */
66 { 36, 0x0050 }, /* R36 - Right out Mix (1) */
67 { 37, 0x0050 }, /* R37 - Right Out Mix (2) */
68 { 38, 0x0050 }, /* R38 - Mono out Mix (1) */
69 { 39, 0x0050 }, /* R39 - Mono out Mix (2) */
70 { 40, 0x0079 }, /* R40 - LOUT2 volume */
71 { 41, 0x0079 }, /* R41 - ROUT2 volume */
72 { 42, 0x0079 }, /* R42 - MONOOUT volume */
73 { 43, 0x0000 }, /* R43 - Clocking / PLL */
74 { 44, 0x0103 }, /* R44 - PLL Control 1 */
75 { 45, 0x0024 }, /* R45 - PLL Control 2 */
76 { 46, 0x01BA }, /* R46 - PLL Control 3 */
77 { 59, 0x0000 }, /* R59 - PLL Control 4 */
151 /* The oscilator should run at should be 90-100MHz, and in wm8955_pll_factors()
157 pll->outdiv = 1; in wm8955_pll_factors()
160 pll->outdiv = 0; in wm8955_pll_factors()
170 pll->n = Ndiv; in wm8955_pll_factors()
174 /* Calculate fractional part - scale up so we can round. */ in wm8955_pll_factors()
185 pll->k = K / 10; in wm8955_pll_factors()
187 dev_dbg(dev, "N=%x K=%x OUTDIV=%x\n", pll->n, pll->k, pll->outdiv); in wm8955_pll_factors()
248 int sr = -1; in wm8955_configure_clocking()
252 if (wm8955->fs == 0) in wm8955_configure_clocking()
253 wm8955->fs = 8000; in wm8955_configure_clocking()
257 if (wm8955->fs != clock_cfgs[i].fs) in wm8955_configure_clocking()
261 if (wm8955->mclk_rate == clock_cfgs[i].mclk) in wm8955_configure_clocking()
266 if (sr == -1) { in wm8955_configure_clocking()
267 dev_err(component->dev, "Sample rate %dHz unsupported\n", in wm8955_configure_clocking()
268 wm8955->fs); in wm8955_configure_clocking()
269 WARN_ON(sr == -1); in wm8955_configure_clocking()
270 return -EINVAL; in wm8955_configure_clocking()
282 ret = wm8955_pll_factors(component->dev, wm8955->mclk_rate, in wm8955_configure_clocking()
285 dev_err(component->dev, in wm8955_configure_clocking()
287 wm8955->fs, wm8955->mclk_rate); in wm8955_configure_clocking()
288 return -EINVAL; in wm8955_configure_clocking()
333 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8955_sysclk()
336 /* Always disable the clocks - if we're doing reconfiguration this in wm8955_sysclk()
351 ret = -EINVAL; in wm8955_sysclk()
368 if (wm8955->deemph) { in wm8955_set_deemph()
371 if (abs(deemph_settings[i] - wm8955->fs) < in wm8955_set_deemph()
372 abs(deemph_settings[best] - wm8955->fs)) in wm8955_set_deemph()
381 dev_dbg(component->dev, "Set deemphasis %d\n", val); in wm8955_set_deemph()
393 ucontrol->value.integer.value[0] = wm8955->deemph; in wm8955_get_deemph()
402 unsigned int deemph = ucontrol->value.integer.value[0]; in wm8955_put_deemph()
405 return -EINVAL; in wm8955_put_deemph()
407 wm8955->deemph = deemph; in wm8955_put_deemph()
432 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
433 static const DECLARE_TLV_DB_SCALE(atten_tlv, -600, 600, 0);
434 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
435 static const DECLARE_TLV_DB_SCALE(mono_tlv, -2100, 300, 0);
436 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
437 static const DECLARE_TLV_DB_SCALE(treble_tlv, -1200, 150, 1);
454 SOC_SINGLE_TLV("Left Bypass Volume", WM8955_LEFT_OUT_MIX_1, 4, 7, 1,
461 SOC_SINGLE_TLV("Right Bypass Volume", WM8955_RIGHT_OUT_MIX_2, 4, 7, 1,
465 SOC_SINGLE_TLV("Mono Left Bypass Volume", WM8955_MONO_OUT_MIX_1, 4, 7, 1,
467 SOC_SINGLE_TLV("Mono Right Bypass Volume", WM8955_MONO_OUT_MIX_2, 4, 7, 1,
486 SOC_DAPM_SINGLE("Bypass Switch", WM8955_LEFT_OUT_MIX_1, 7, 1, 0),
495 SOC_DAPM_SINGLE("Bypass Switch", WM8955_RIGHT_OUT_MIX_2, 7, 1, 0),
500 SOC_DAPM_SINGLE("Left Bypass Switch", WM8955_MONO_OUT_MIX_1, 7, 1, 0),
502 SOC_DAPM_SINGLE("Right Bypass Switch", WM8955_MONO_OUT_MIX_2, 7, 1, 0),
506 SND_SOC_DAPM_INPUT("MONOIN-"),
547 { "Mono Input", NULL, "MONOIN-" },
552 { "Left", "Bypass Switch", "LINEINL" },
557 { "Right", "Bypass Switch", "LINEINR" },
562 { "Mono", "Left Bypass Switch", "LINEINL" },
563 { "Mono", "Right Bypass Switch", "LINEINR" },
592 struct snd_soc_component *component = dai->component; in wm8955_hw_params()
611 return -EINVAL; in wm8955_hw_params()
616 wm8955->fs = params_rate(params); in wm8955_hw_params()
641 struct snd_soc_component *component = dai->component; in wm8955_set_sysclk()
648 priv->mclk_rate = freq /= 2; in wm8955_set_sysclk()
651 priv->mclk_rate = freq; in wm8955_set_sysclk()
660 return -EINVAL; in wm8955_set_sysclk()
663 dev_dbg(dai->dev, "Clock source is %d at %uHz\n", clk_id, freq); in wm8955_set_sysclk()
670 struct snd_soc_component *component = dai->component; in wm8955_set_fmt()
680 return -EINVAL; in wm8955_set_fmt()
699 return -EINVAL; in wm8955_set_fmt()
713 return -EINVAL; in wm8955_set_fmt()
733 return -EINVAL; in wm8955_set_fmt()
737 return -EINVAL; in wm8955_set_fmt()
750 struct snd_soc_component *component = codec_dai->component; in wm8955_mute()
787 ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies), in wm8955_set_bias_level()
788 wm8955->supplies); in wm8955_set_bias_level()
790 dev_err(component->dev, in wm8955_set_bias_level()
791 "Failed to enable supplies: %d\n", in wm8955_set_bias_level()
796 regcache_sync(wm8955->regmap); in wm8955_set_bias_level()
798 /* Enable VREF and VMID */ in wm8955_set_bias_level()
835 regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), in wm8955_set_bias_level()
836 wm8955->supplies); in wm8955_set_bias_level()
856 .name = "wm8955-hifi",
870 struct wm8955_pdata *pdata = dev_get_platdata(component->dev); in wm8955_probe()
873 for (i = 0; i < ARRAY_SIZE(wm8955->supplies); i++) in wm8955_probe()
874 wm8955->supplies[i].supply = wm8955_supply_names[i]; in wm8955_probe()
876 ret = devm_regulator_bulk_get(component->dev, ARRAY_SIZE(wm8955->supplies), in wm8955_probe()
877 wm8955->supplies); in wm8955_probe()
879 dev_err(component->dev, "Failed to request supplies: %d\n", ret); in wm8955_probe()
883 ret = regulator_bulk_enable(ARRAY_SIZE(wm8955->supplies), in wm8955_probe()
884 wm8955->supplies); in wm8955_probe()
886 dev_err(component->dev, "Failed to enable supplies: %d\n", ret); in wm8955_probe()
892 dev_err(component->dev, "Failed to issue reset: %d\n", ret); in wm8955_probe()
896 /* Change some default settings - latch VU and enable ZC */ in wm8955_probe()
916 /* Also enable adaptive bass boost by default */ in wm8955_probe()
921 if (pdata->out2_speaker) in wm8955_probe()
925 if (pdata->monoin_diff) in wm8955_probe()
932 /* Bias level configuration will have done an extra enable */ in wm8955_probe()
933 regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies); in wm8955_probe()
938 regulator_bulk_disable(ARRAY_SIZE(wm8955->supplies), wm8955->supplies); in wm8955_probe()
975 wm8955 = devm_kzalloc(&i2c->dev, sizeof(struct wm8955_priv), in wm8955_i2c_probe()
978 return -ENOMEM; in wm8955_i2c_probe()
980 wm8955->regmap = devm_regmap_init_i2c(i2c, &wm8955_regmap); in wm8955_i2c_probe()
981 if (IS_ERR(wm8955->regmap)) { in wm8955_i2c_probe()
982 ret = PTR_ERR(wm8955->regmap); in wm8955_i2c_probe()
983 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", in wm8955_i2c_probe()
990 ret = devm_snd_soc_register_component(&i2c->dev, in wm8955_i2c_probe()