Lines Matching +full:adc +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
21 #include <sound/soc-dapm.h>
23 #include "wcd-clsh-v2.h"
24 #include "wcd-common.h"
25 #include "wcd-mbhc-v2.h"
27 #include <dt-bindings/sound/qcom,wcd934x.h>
187 {"RX INT" #id "_2 MUX", "RX0", "SLIM RX0"}, \
188 {"RX INT" #id "_2 MUX", "RX1", "SLIM RX1"}, \
189 {"RX INT" #id "_2 MUX", "RX2", "SLIM RX2"}, \
190 {"RX INT" #id "_2 MUX", "RX3", "SLIM RX3"}, \
191 {"RX INT" #id "_2 MUX", "RX4", "SLIM RX4"}, \
192 {"RX INT" #id "_2 MUX", "RX5", "SLIM RX5"}, \
193 {"RX INT" #id "_2 MUX", "RX6", "SLIM RX6"}, \
194 {"RX INT" #id "_2 MUX", "RX7", "SLIM RX7"}, \
195 {"RX INT" #id "_2 MUX", NULL, "INT" #id "_CLK"}, \
196 {"RX INT" #id "_2 MUX", NULL, "DSMDEM" #id "_CLK"}, \
197 {"RX INT" #id "_2 INTERP", NULL, "RX INT" #id "_2 MUX"}, \
209 {"SLIM RX"#id" MUX", "AIF1_PB", "AIF1 PB"}, \
210 {"SLIM RX"#id" MUX", "AIF2_PB", "AIF2 PB"}, \
211 {"SLIM RX"#id" MUX", "AIF3_PB", "AIF3 PB"}, \
212 {"SLIM RX"#id" MUX", "AIF4_PB", "AIF4 PB"}, \
213 {"SLIM RX"#id, NULL, "SLIM RX"#id" MUX"}
216 {"ADC MUX" #id, "DMIC", "DMIC MUX" #id }, \
217 {"ADC MUX" #id, "AMIC", "AMIC MUX" #id }, \
218 {"DMIC MUX" #id, "DMIC0", "DMIC0"}, \
219 {"DMIC MUX" #id, "DMIC1", "DMIC1"}, \
220 {"DMIC MUX" #id, "DMIC2", "DMIC2"}, \
221 {"DMIC MUX" #id, "DMIC3", "DMIC3"}, \
222 {"DMIC MUX" #id, "DMIC4", "DMIC4"}, \
223 {"DMIC MUX" #id, "DMIC5", "DMIC5"}, \
224 {"AMIC MUX" #id, "ADC1", "ADC1"}, \
225 {"AMIC MUX" #id, "ADC2", "ADC2"}, \
226 {"AMIC MUX" #id, "ADC3", "ADC3"}, \
227 {"AMIC MUX" #id, "ADC4", "ADC4"}
230 {"IIR" #id, NULL, "IIR" #id " INP0 MUX"}, \
231 {"IIR" #id " INP0 MUX", "DEC0", "ADC MUX0"}, \
232 {"IIR" #id " INP0 MUX", "DEC1", "ADC MUX1"}, \
233 {"IIR" #id " INP0 MUX", "DEC2", "ADC MUX2"}, \
234 {"IIR" #id " INP0 MUX", "DEC3", "ADC MUX3"}, \
235 {"IIR" #id " INP0 MUX", "DEC4", "ADC MUX4"}, \
236 {"IIR" #id " INP0 MUX", "DEC5", "ADC MUX5"}, \
237 {"IIR" #id " INP0 MUX", "DEC6", "ADC MUX6"}, \
238 {"IIR" #id " INP0 MUX", "DEC7", "ADC MUX7"}, \
239 {"IIR" #id " INP0 MUX", "DEC8", "ADC MUX8"}, \
240 {"IIR" #id " INP0 MUX", "RX0", "SLIM RX0"}, \
241 {"IIR" #id " INP0 MUX", "RX1", "SLIM RX1"}, \
242 {"IIR" #id " INP0 MUX", "RX2", "SLIM RX2"}, \
243 {"IIR" #id " INP0 MUX", "RX3", "SLIM RX3"}, \
244 {"IIR" #id " INP0 MUX", "RX4", "SLIM RX4"}, \
245 {"IIR" #id " INP0 MUX", "RX5", "SLIM RX5"}, \
246 {"IIR" #id " INP0 MUX", "RX6", "SLIM RX6"}, \
247 {"IIR" #id " INP0 MUX", "RX7", "SLIM RX7"}, \
248 {"IIR" #id, NULL, "IIR" #id " INP1 MUX"}, \
249 {"IIR" #id " INP1 MUX", "DEC0", "ADC MUX0"}, \
250 {"IIR" #id " INP1 MUX", "DEC1", "ADC MUX1"}, \
251 {"IIR" #id " INP1 MUX", "DEC2", "ADC MUX2"}, \
252 {"IIR" #id " INP1 MUX", "DEC3", "ADC MUX3"}, \
253 {"IIR" #id " INP1 MUX", "DEC4", "ADC MUX4"}, \
254 {"IIR" #id " INP1 MUX", "DEC5", "ADC MUX5"}, \
255 {"IIR" #id " INP1 MUX", "DEC6", "ADC MUX6"}, \
256 {"IIR" #id " INP1 MUX", "DEC7", "ADC MUX7"}, \
257 {"IIR" #id " INP1 MUX", "DEC8", "ADC MUX8"}, \
258 {"IIR" #id " INP1 MUX", "RX0", "SLIM RX0"}, \
259 {"IIR" #id " INP1 MUX", "RX1", "SLIM RX1"}, \
260 {"IIR" #id " INP1 MUX", "RX2", "SLIM RX2"}, \
261 {"IIR" #id " INP1 MUX", "RX3", "SLIM RX3"}, \
262 {"IIR" #id " INP1 MUX", "RX4", "SLIM RX4"}, \
263 {"IIR" #id " INP1 MUX", "RX5", "SLIM RX5"}, \
264 {"IIR" #id " INP1 MUX", "RX6", "SLIM RX6"}, \
265 {"IIR" #id " INP1 MUX", "RX7", "SLIM RX7"}, \
266 {"IIR" #id, NULL, "IIR" #id " INP2 MUX"}, \
267 {"IIR" #id " INP2 MUX", "DEC0", "ADC MUX0"}, \
268 {"IIR" #id " INP2 MUX", "DEC1", "ADC MUX1"}, \
269 {"IIR" #id " INP2 MUX", "DEC2", "ADC MUX2"}, \
270 {"IIR" #id " INP2 MUX", "DEC3", "ADC MUX3"}, \
271 {"IIR" #id " INP2 MUX", "DEC4", "ADC MUX4"}, \
272 {"IIR" #id " INP2 MUX", "DEC5", "ADC MUX5"}, \
273 {"IIR" #id " INP2 MUX", "DEC6", "ADC MUX6"}, \
274 {"IIR" #id " INP2 MUX", "DEC7", "ADC MUX7"}, \
275 {"IIR" #id " INP2 MUX", "DEC8", "ADC MUX8"}, \
276 {"IIR" #id " INP2 MUX", "RX0", "SLIM RX0"}, \
277 {"IIR" #id " INP2 MUX", "RX1", "SLIM RX1"}, \
278 {"IIR" #id " INP2 MUX", "RX2", "SLIM RX2"}, \
279 {"IIR" #id " INP2 MUX", "RX3", "SLIM RX3"}, \
280 {"IIR" #id " INP2 MUX", "RX4", "SLIM RX4"}, \
281 {"IIR" #id " INP2 MUX", "RX5", "SLIM RX5"}, \
282 {"IIR" #id " INP2 MUX", "RX6", "SLIM RX6"}, \
283 {"IIR" #id " INP2 MUX", "RX7", "SLIM RX7"}, \
284 {"IIR" #id, NULL, "IIR" #id " INP3 MUX"}, \
285 {"IIR" #id " INP3 MUX", "DEC0", "ADC MUX0"}, \
286 {"IIR" #id " INP3 MUX", "DEC1", "ADC MUX1"}, \
287 {"IIR" #id " INP3 MUX", "DEC2", "ADC MUX2"}, \
288 {"IIR" #id " INP3 MUX", "DEC3", "ADC MUX3"}, \
289 {"IIR" #id " INP3 MUX", "DEC4", "ADC MUX4"}, \
290 {"IIR" #id " INP3 MUX", "DEC5", "ADC MUX5"}, \
291 {"IIR" #id " INP3 MUX", "DEC6", "ADC MUX6"}, \
292 {"IIR" #id " INP3 MUX", "DEC7", "ADC MUX7"}, \
293 {"IIR" #id " INP3 MUX", "DEC8", "ADC MUX8"}, \
294 {"IIR" #id " INP3 MUX", "RX0", "SLIM RX0"}, \
295 {"IIR" #id " INP3 MUX", "RX1", "SLIM RX1"}, \
296 {"IIR" #id " INP3 MUX", "RX2", "SLIM RX2"}, \
297 {"IIR" #id " INP3 MUX", "RX3", "SLIM RX3"}, \
298 {"IIR" #id " INP3 MUX", "RX4", "SLIM RX4"}, \
299 {"IIR" #id " INP3 MUX", "RX5", "SLIM RX5"}, \
300 {"IIR" #id " INP3 MUX", "RX6", "SLIM RX6"}, \
301 {"IIR" #id " INP3 MUX", "RX7", "SLIM RX7"}
307 {"SLIM TX" #id, NULL, "CDC_IF TX" #id " MUX"}
431 COMPANDER_5, /* LO3_SE - not used in Tavil */
432 COMPANDER_6, /* LO4_SE - not used in Tavil */
503 .name = "WCD9335-IFC-DEV",
567 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
583 "Class H Invalid", "Class-H Hi-Fi", "Class-H Low Power", "Class-AB",
584 "Class-H Hi-Fi Low Power"
648 "ZERO", "RX INT0_2 MUX",
652 "ZERO", "RX INT1_2 MUX",
656 "ZERO", "RX INT2_2 MUX",
660 "ZERO", "RX INT3_2 MUX",
664 "ZERO", "RX INT4_2 MUX",
668 "ZERO", "RX INT7_2 MUX",
672 "ZERO", "RX INT8_2 MUX",
1252 if (sido_src == wcd->sido_input_src)
1256 regmap_update_bits(wcd->regmap, WCD934X_ANA_RCO,
1261 wcd->sido_input_src = sido_src;
1268 mutex_lock(&wcd->sysclk_mutex);
1270 if (++wcd->sysclk_users != 1) {
1271 mutex_unlock(&wcd->sysclk_mutex);
1274 mutex_unlock(&wcd->sysclk_mutex);
1276 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1279 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1283 * 1ms delay is required after pre-charge is enabled
1287 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1289 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1297 regmap_update_bits(wcd->regmap, WCD934X_CLK_SYS_MCLK_PRG,
1300 regmap_update_bits(wcd->regmap, WCD934X_CLK_SYS_MCLK_PRG,
1303 regmap_update_bits(wcd->regmap, WCD934X_CLK_SYS_MCLK_PRG,
1306 regmap_update_bits(wcd->regmap, WCD934X_CLK_SYS_MCLK_PRG,
1308 regmap_update_bits(wcd->regmap,
1312 regmap_update_bits(wcd->regmap,
1316 regmap_update_bits(wcd->regmap, WCD934X_CODEC_RPM_CLK_GATE,
1331 mutex_lock(&wcd->sysclk_mutex);
1332 if (--wcd->sysclk_users != 0) {
1333 mutex_unlock(&wcd->sysclk_mutex);
1336 mutex_unlock(&wcd->sysclk_mutex);
1338 regmap_update_bits(wcd->regmap, WCD934X_CLK_SYS_MCLK_PRG,
1341 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1343 regmap_update_bits(wcd->regmap, WCD934X_ANA_BIAS,
1354 ret = clk_prepare_enable(wcd->extclk);
1357 dev_err(wcd->dev, "%s: ext clk enable failed\n",
1365 regmap_read(wcd->regmap, WCD934X_CDC_CLK_RST_CTRL_SWR_CONTROL,
1373 clk_disable_unprepare(wcd->extclk);
1382 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
1383 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
1402 regmap = wcd->regmap;
1432 wcd->version = ver;
1433 dev_info(wcd->dev, "WCD934X Minor:0x%x Version:0x%x\n", id_minor, ver);
1444 regmap_update_bits(wcd->regmap,
1448 regmap_update_bits(wcd->regmap,
1459 rc = regmap_read(wcd->regmap,
1472 regmap_update_bits(wcd->regmap,
1477 regmap_update_bits(wcd->regmap,
1489 struct snd_soc_component *comp = dai->component;
1490 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
1495 list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) {
1496 inp = ch->shift + INTn_1_INP_SEL_RX0;
1498 * Loop through all interpolator MUX inputs and find out
1528 dev_err(wcd->dev,
1546 struct snd_soc_component *component = dai->component;
1547 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
1551 list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) {
1560 if (val == (ch->shift + INTn_2_INP_SEL_RX0)) {
1568 dev_err(component->dev,
1570 dai->id);
1571 return -EINVAL;
1598 dev_err(dai->dev, "Unsupported sample rate: %d\n", sample_rate);
1599 return -EINVAL;
1615 struct snd_soc_component *comp = dai->component;
1620 int decimator = -1;
1622 list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list) {
1623 tx_port = ch->port;
1624 /* Find the SB TX MUX input - which decimator is connected */
1633 shift = ((tx_port - 4) << 1);
1638 shift = ((tx_port - 8) << 1);
1652 dev_err(wcd->dev, "Invalid SLIM TX%u port DAI ID:%d\n",
1653 tx_port, dai->id);
1654 return -EINVAL;
1672 decimator = tx_mux_sel - 1;
1679 dev_err(wcd->dev, "ERROR: Invalid tx_port: %d\n",
1681 return -EINVAL;
1697 struct list_head *slim_ch_list = &dai_data->slim_ch_list;
1698 struct slim_stream_config *cfg = &dai_data->sconfig;
1703 cfg->ch_count = 0;
1704 cfg->direction = direction;
1705 cfg->port_mask = 0;
1709 cfg->ch_count++;
1710 payload |= 1 << ch->shift;
1711 cfg->port_mask |= BIT(ch->port);
1714 cfg->chs = kcalloc(cfg->ch_count, sizeof(unsigned int), GFP_KERNEL);
1715 if (!cfg->chs)
1716 return -ENOMEM;
1720 cfg->chs[i++] = ch->ch_num;
1723 ret = regmap_write(wcd->if_regmap,
1724 WCD934X_SLIM_PGD_RX_PORT_MULTI_CHNL_0(ch->port),
1731 ret = regmap_write(wcd->if_regmap,
1732 WCD934X_SLIM_PGD_RX_PORT_CFG(ch->port),
1737 ret = regmap_write(wcd->if_regmap,
1738 WCD934X_SLIM_PGD_TX_PORT_MULTI_CHNL_0(ch->port),
1744 ret = regmap_write(wcd->if_regmap,
1745 WCD934X_SLIM_PGD_TX_PORT_MULTI_CHNL_1(ch->port),
1751 ret = regmap_write(wcd->if_regmap,
1752 WCD934X_SLIM_PGD_TX_PORT_CFG(ch->port),
1760 dai_data->sruntime = slim_stream_allocate(wcd->sdev, "WCD934x-SLIM");
1765 dev_err(wcd->dev, "Error Setting slim hw params\n");
1766 kfree(cfg->chs);
1767 cfg->chs = NULL;
1779 wcd = snd_soc_component_get_drvdata(dai->component);
1781 switch (substream->stream) {
1785 dev_err(wcd->dev, "cannot set sample rate: %u\n",
1791 wcd->dai[dai->id].sconfig.bps = params_width(params);
1794 dev_err(wcd->dev, "Invalid format 0x%x\n",
1796 return -EINVAL;
1824 dev_err(wcd->dev, "Invalid TX sample rate: %d\n",
1826 return -EINVAL;
1833 dev_err(wcd->dev, "Cannot set TX Decimator rate\n");
1838 wcd->dai[dai->id].sconfig.bps = params_width(params);
1841 dev_err(wcd->dev, "Invalid format 0x%x\n",
1843 return -EINVAL;
1847 dev_err(wcd->dev, "Invalid stream type %d\n",
1848 substream->stream);
1849 return -EINVAL;
1852 wcd->dai[dai->id].sconfig.rate = params_rate(params);
1854 return wcd934x_slim_set_hw_params(wcd, &wcd->dai[dai->id], substream->stream);
1863 wcd = snd_soc_component_get_drvdata(dai->component);
1865 dai_data = &wcd->dai[dai->id];
1867 kfree(dai_data->sconfig.chs);
1879 wcd = snd_soc_component_get_drvdata(dai->component);
1881 dai_data = &wcd->dai[dai->id];
1887 cfg = &dai_data->sconfig;
1888 slim_stream_prepare(dai_data->sruntime, cfg);
1889 slim_stream_enable(dai_data->sruntime);
1894 slim_stream_disable(dai_data->sruntime);
1895 slim_stream_unprepare(dai_data->sruntime);
1913 wcd = snd_soc_component_get_drvdata(dai->component);
1916 dev_err(wcd->dev, "Invalid tx %d or rx %d channel count\n",
1918 return -EINVAL;
1922 dev_err(wcd->dev, "Invalid tx_slot=%p, rx_slot=%p\n",
1924 return -EINVAL;
1928 wcd->rx_chs[i].ch_num = rx_slot[i];
1929 INIT_LIST_HEAD(&wcd->rx_chs[i].list);
1933 wcd->tx_chs[i].ch_num = tx_slot[i];
1934 INIT_LIST_HEAD(&wcd->tx_chs[i].list);
1948 wcd = snd_soc_component_get_drvdata(dai->component);
1950 switch (dai->id) {
1956 dev_err(wcd->dev, "Invalid rx_slot %p or rx_num %p\n",
1958 return -EINVAL;
1961 list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list)
1962 rx_slot[i++] = ch->ch_num;
1970 dev_err(wcd->dev, "Invalid tx_slot %p or tx_num %p\n",
1972 return -EINVAL;
1975 list_for_each_entry(ch, &wcd->dai[dai->id].slim_ch_list, list)
1976 tx_slot[i++] = ch->ch_num;
1981 dev_err(wcd->dev, "Invalid DAI ID %x\n", dai->id);
2112 regmap_read(wcd->regmap, WCD934X_CDC_CLK_RST_CTRL_SWR_CONTROL, &val);
2134 struct clk *parent = wcd->extclk;
2135 struct device *dev = wcd->dev;
2136 struct device_node *np = dev->parent->of_node;
2143 if (of_property_read_u32(np, "clock-frequency", &wcd->rate))
2148 of_property_read_string(np, "clock-output-names", &clk_name);
2155 wcd->hw.init = &init;
2157 hw = &wcd->hw;
2158 ret = devm_clk_hw_register(wcd->dev->parent, hw);
2171 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
2175 ret = wcd_dt_parse_mbhc_data(comp->dev, &wcd->mbhc_cfg);
2180 WCD934X_MICB_VAL_MASK, wcd->common.micb_vout[0]);
2182 WCD934X_MICB_VAL_MASK, wcd->common.micb_vout[1]);
2184 WCD934X_MICB_VAL_MASK, wcd->common.micb_vout[2]);
2186 WCD934X_MICB_VAL_MASK, wcd->common.micb_vout[3]);
2188 if (wcd->rate == WCD934X_MCLK_CLK_9P6MHZ)
2193 wcd->dmic_sample_rate = def_dmic_rate;
2204 struct regmap *rm = wcd->regmap;
2216 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
2237 regmap_read(wcd->if_regmap, i, &val);
2247 port_id = j - 16;
2250 regmap_read(wcd->if_regmap,
2259 regmap_read(wcd->if_regmap, reg, &int_val);
2263 dev_err_ratelimited(wcd->dev,
2268 dev_err_ratelimited(wcd->dev,
2281 wcd->if_regmap, reg, &int_val);
2284 regmap_write(wcd->if_regmap,
2290 dev_err_ratelimited(wcd->dev,
2294 regmap_write(wcd->if_regmap,
2324 dev_err(component->dev, "%s: invalid number of buttons: %d\n",
2366 int micb_index = micb_num - 1;
2383 dev_err(component->dev, "%s: Invalid micbias number: %d\n",
2385 return -EINVAL;
2387 mutex_lock(&wcd934x->micb_lock);
2391 wcd934x->pullup_ref[micb_index]++;
2392 if ((wcd934x->pullup_ref[micb_index] == 1) &&
2393 (wcd934x->micb_ref[micb_index] == 0))
2399 if (wcd934x->pullup_ref[micb_index] > 0)
2400 wcd934x->pullup_ref[micb_index]--;
2402 if ((wcd934x->pullup_ref[micb_index] == 0) &&
2403 (wcd934x->micb_ref[micb_index] == 0))
2408 wcd934x->micb_ref[micb_index]++;
2409 if (wcd934x->micb_ref[micb_index] == 1) {
2414 wcd_mbhc_event_notify(wcd934x->mbhc,
2419 wcd_mbhc_event_notify(wcd934x->mbhc,
2423 if (wcd934x->micb_ref[micb_index] > 0)
2424 wcd934x->micb_ref[micb_index]--;
2426 if ((wcd934x->micb_ref[micb_index] == 0) &&
2427 (wcd934x->pullup_ref[micb_index] > 0))
2431 else if ((wcd934x->micb_ref[micb_index] == 0) &&
2432 (wcd934x->pullup_ref[micb_index] == 0)) {
2434 wcd_mbhc_event_notify(wcd934x->mbhc,
2440 wcd_mbhc_event_notify(wcd934x->mbhc,
2444 wcd_mbhc_event_notify(wcd934x->mbhc,
2449 mutex_unlock(&wcd934x->micb_lock);
2457 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
2507 return -EINVAL;
2509 mutex_lock(&wcd934x->micb_lock);
2514 * to avoid slow micbias ramp-up or down enable pull-up
2515 * momentarily, change the micbias value and then re-enable
2523 req_vout_ctl = wcd_get_micb_vout_ctl_val(component->dev, req_volt);
2525 ret = -EINVAL;
2554 mutex_unlock(&wcd934x->micb_lock);
2565 return -EINVAL;
2571 if (wcd934x->common.micb_mv[1] >= WCD_MBHC_THR_HS_MICB_MV)
2574 micb_mv = req_en ? WCD_MBHC_THR_HS_MICB_MV : wcd934x->common.micb_mv[1];
2594 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x20, 0x20);
2596 regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_2, &val);
2601 regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_1, &val1);
2603 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x20, 0x00);
2611 dev_err(wcd934x->dev, "%s: Impedance detect ramp error, c1=%d, x1=0x%x\n",
2616 denom = (x1 * d1) - (1 << (14 - noff));
2622 dev_dbg(wcd934x->dev, "%s: d1=%d, c1=%d, x1=0x%x, z_val=%di (milliohm)\n",
2628 regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_1, &val);
2629 regmap_read(wcd934x->regmap, WCD934X_ANA_MBHC_RESULT_2, &val1);
2643 struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev);
2647 WCD934X_ZDET_MAXV_CTL_MASK, zdet_param->ldo_ctl);
2649 WCD934X_VTH_MASK, zdet_param->btn5);
2651 WCD934X_VTH_MASK, zdet_param->btn6);
2653 WCD934X_VTH_MASK, zdet_param->btn7);
2655 WCD934X_ZDET_RANGE_CTL_MASK, zdet_param->noff);
2657 0x0F, zdet_param->nshift);
2662 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x80, 0x80);
2663 wcd934x_mbhc_get_result_params(wcd934x, d1_a, zdet_param->noff, &zdet);
2664 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x80, 0x00);
2672 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x40, 0x40);
2673 wcd934x_mbhc_get_result_params(wcd934x, d1_a, zdet_param->noff, &zdet);
2674 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ZDET, 0x40, 0x00);
2692 q1_cal = (10000 - ((q1 & 0x7F) * 25));
2702 struct wcd934x_codec *wcd934x = dev_get_drvdata(component->dev);
2730 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ELECT, 0x80, 0x00);
2733 /* For NO-jack, disable L_DET_EN before Z-det measurements */
2734 if (wcd934x->mbhc_cfg.hphl_swh)
2735 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x80, 0x00);
2738 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x01, 0x00);
2772 dev_info(component->dev, "%s: impedance on HPH_L = %d(ohms)\n",
2779 (zdet_param_ptr->noff == 0x6)) ||
2804 dev_err(component->dev, "%s: impedance on HPH_R = %d(ohms)\n",
2810 dev_dbg(component->dev,
2819 dev_dbg(component->dev,
2822 wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_MONO);
2841 z_diff1 = (z1Ls > zMono) ? (z1Ls - zMono) : (zMono - z1Ls);
2842 z_diff2 = ((*zl) > z1Ls) ? ((*zl) - z1Ls) : (z1Ls - (*zl));
2844 dev_err(component->dev, "%s: stereo plug type detected\n",
2846 wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_STEREO);
2848 dev_err(component->dev, "%s: MONO plug type detected\n",
2850 wcd_mbhc_set_hph_type(wcd934x->mbhc, WCD_MBHC_HPH_MONO);
2858 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x01, 0x01);
2860 /* For NO-jack, re-enable L_DET_EN after Z-det measurements */
2861 if (wcd934x->mbhc_cfg.hphl_swh)
2862 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_MECH, 0x80, 0x80);
2867 regmap_update_bits(wcd934x->regmap, WCD934X_ANA_MBHC_ELECT, 0x80, 0x80);
2915 ucontrol->value.integer.value[0] = wcd_mbhc_get_hph_type(wcd->mbhc);
2929 mc = (struct soc_mixer_control *)(kcontrol->private_value);
2930 hphr = mc->shift;
2931 wcd_mbhc_get_impedance(wcd->mbhc, &zl, &zr);
2932 dev_dbg(component->dev, "%s: zl=%u(ohms), zr=%u(ohms)\n", __func__, zl, zr);
2933 ucontrol->value.integer.value[0] = hphr ? zr : zl;
2951 struct wcd934x_ddata *data = dev_get_drvdata(component->dev->parent);
2953 struct wcd_mbhc_intr *intr_ids = &wcd->intr_ids;
2955 intr_ids->mbhc_sw_intr = regmap_irq_get_virq(data->irq_data,
2957 intr_ids->mbhc_btn_press_intr = regmap_irq_get_virq(data->irq_data,
2959 intr_ids->mbhc_btn_release_intr = regmap_irq_get_virq(data->irq_data,
2961 intr_ids->mbhc_hs_ins_intr = regmap_irq_get_virq(data->irq_data,
2963 intr_ids->mbhc_hs_rem_intr = regmap_irq_get_virq(data->irq_data,
2965 intr_ids->hph_left_ocp = regmap_irq_get_virq(data->irq_data,
2967 intr_ids->hph_right_ocp = regmap_irq_get_virq(data->irq_data,
2970 wcd->mbhc = wcd_mbhc_init(component, &mbhc_cb, intr_ids, wcd_mbhc_fields, true);
2971 if (IS_ERR(wcd->mbhc)) {
2972 wcd->mbhc = NULL;
2973 return -EINVAL;
2988 if (!wcd->mbhc)
2991 wcd_mbhc_deinit(wcd->mbhc);
2996 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
2999 snd_soc_component_init_regmap(component, wcd->regmap);
3000 wcd->component = component;
3002 /* Class-H Init*/
3003 wcd->clsh_ctrl = wcd_clsh_ctrl_alloc(component, wcd->version);
3004 if (IS_ERR(wcd->clsh_ctrl))
3005 return PTR_ERR(wcd->clsh_ctrl);
3007 /* Default HPH Mode to Class-H Low HiFi */
3008 wcd->hph_mode = CLS_H_LOHIFI;
3013 INIT_LIST_HEAD(&wcd->dai[i].slim_ch_list);
3018 dev_err(component->dev, "Failed to Initialize micbias\n");
3023 dev_err(component->dev, "Failed to Initialize MBHC\n");
3030 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
3033 wcd_clsh_ctrl_free(wcd->clsh_ctrl);
3040 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
3043 wcd->rate = freq;
3045 if (wcd->rate == WCD934X_MCLK_CLK_12P288MHZ)
3052 return clk_set_rate(wcd->extclk, freq);
3097 /* Mask top 2 bits, 7-8 are reserved */
3108 (struct wcd_iir_filter_ctl *)kcontrol->private_value;
3109 struct soc_bytes_ext *params = &ctl->bytes_ext;
3110 int iir_idx = ctl->iir_idx;
3111 int band_idx = ctl->band_idx;
3115 memcpy(&coeff[0], ucontrol->value.bytes.data, params->max);
3137 (struct wcd_iir_filter_ctl *)kcontrol->private_value;
3138 struct soc_bytes_ext *params = &ctl->bytes_ext;
3139 int iir_idx = ctl->iir_idx;
3140 int band_idx = ctl->band_idx;
3149 memcpy(ucontrol->value.bytes.data, &coeff[0], params->max);
3158 (struct wcd_iir_filter_ctl *)kcontrol->private_value;
3159 struct soc_bytes_ext *params = &ctl->bytes_ext;
3161 ucontrol->type = SNDRV_CTL_ELEM_TYPE_BYTES;
3162 ucontrol->count = params->max;
3171 int comp = ((struct soc_mixer_control *)kc->private_value)->shift;
3172 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
3174 ucontrol->value.integer.value[0] = wcd->comp_enabled[comp];
3183 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
3184 int comp = ((struct soc_mixer_control *)kc->private_value)->shift;
3185 int value = ucontrol->value.integer.value[0];
3188 if (wcd->comp_enabled[comp] == value)
3191 wcd->comp_enabled[comp] = value;
3224 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
3226 ucontrol->value.enumerated.item[0] = wcd->hph_mode;
3235 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
3238 mode_val = ucontrol->value.enumerated.item[0];
3240 if (mode_val == wcd->hph_mode)
3244 dev_err(wcd->dev, "Invalid HPH Mode, default to ClSH HiFi\n");
3247 wcd->hph_mode = mode_val;
3257 struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev);
3259 ucontrol->value.enumerated.item[0] = wcd->rx_port_value[w->shift];
3264 static int slim_rx_mux_to_dai_id(int mux)
3268 switch (mux) {
3282 aif_id = -1;
3293 struct wcd934x_codec *wcd = dev_get_drvdata(w->dapm->dev);
3294 struct soc_enum *e = (struct soc_enum *)kc->private_value;
3297 u32 port_id = w->shift;
3300 int prev_mux_idx = wcd->rx_port_value[port_id];
3303 mux_idx = ucontrol->value.enumerated.item[0];
3314 list_for_each_entry_safe(ch, c, &wcd->dai[aif_id].slim_ch_list, list) {
3315 if (ch->port == port_id + WCD934X_RX_START) {
3317 list_del_init(&ch->list);
3330 if (list_empty(&wcd->rx_chs[port_id].list)) {
3331 list_add_tail(&wcd->rx_chs[port_id].list,
3332 &wcd->dai[aif_id].slim_ch_list);
3334 dev_err(wcd->dev ,"SLIM_RX%d PORT is busy\n", port_id);
3340 dev_err(wcd->dev, "Unknown AIF %d\n", mux_idx);
3344 wcd->rx_port_value[port_id] = mux_idx;
3345 snd_soc_dapm_mux_update_power(w->dapm, kc, wcd->rx_port_value[port_id],
3350 return -EINVAL;
3356 struct soc_enum *e = (struct soc_enum *)kc->private_value;
3361 val = ucontrol->value.enumerated.item[0];
3362 if (e->reg == WCD934X_CDC_RX0_RX_PATH_SEC0)
3364 else if (e->reg == WCD934X_CDC_RX1_RX_PATH_SEC0)
3366 else if (e->reg == WCD934X_CDC_RX2_RX_PATH_SEC0)
3369 return -EINVAL;
3388 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
3395 val = ucontrol->value.enumerated.item[0];
3396 if (val > e->items - 1)
3397 return -EINVAL;
3399 switch (e->reg) {
3401 if (e->shift_l == 0)
3403 else if (e->shift_l == 2)
3405 else if (e->shift_l == 4)
3409 if (e->shift_l == 0)
3411 else if (e->shift_l == 2)
3415 if (e->shift_l == 0)
3417 else if (e->shift_l == 2)
3421 if (e->shift_l == 0)
3423 else if (e->shift_l == 2)
3427 dev_err(comp->dev, "%s: e->reg: 0x%x not expected\n",
3428 __func__, e->reg);
3429 return -EINVAL;
3432 /* ADC: 0, DMIC: 1 */
3442 SOC_DAPM_ENUM("RX INT0_2 MUX Mux", rx_int0_2_mux_chain_enum);
3445 SOC_DAPM_ENUM("RX INT1_2 MUX Mux", rx_int1_2_mux_chain_enum);
3448 SOC_DAPM_ENUM("RX INT2_2 MUX Mux", rx_int2_2_mux_chain_enum);
3451 SOC_DAPM_ENUM("RX INT3_2 MUX Mux", rx_int3_2_mux_chain_enum);
3454 SOC_DAPM_ENUM("RX INT4_2 MUX Mux", rx_int4_2_mux_chain_enum);
3457 SOC_DAPM_ENUM("RX INT7_2 MUX Mux", rx_int7_2_mux_chain_enum);
3460 SOC_DAPM_ENUM("RX INT8_2 MUX Mux", rx_int8_2_mux_chain_enum);
3463 SOC_DAPM_ENUM("RX INT0_1 MIX1 INP0 Mux", rx_int0_1_mix_inp0_chain_enum);
3466 SOC_DAPM_ENUM("RX INT0_1 MIX1 INP1 Mux", rx_int0_1_mix_inp1_chain_enum);
3469 SOC_DAPM_ENUM("RX INT0_1 MIX1 INP2 Mux", rx_int0_1_mix_inp2_chain_enum);
3472 SOC_DAPM_ENUM("RX INT1_1 MIX1 INP0 Mux", rx_int1_1_mix_inp0_chain_enum);
3475 SOC_DAPM_ENUM("RX INT1_1 MIX1 INP1 Mux", rx_int1_1_mix_inp1_chain_enum);
3478 SOC_DAPM_ENUM("RX INT1_1 MIX1 INP2 Mux", rx_int1_1_mix_inp2_chain_enum);
3481 SOC_DAPM_ENUM("RX INT2_1 MIX1 INP0 Mux", rx_int2_1_mix_inp0_chain_enum);
3484 SOC_DAPM_ENUM("RX INT2_1 MIX1 INP1 Mux", rx_int2_1_mix_inp1_chain_enum);
3487 SOC_DAPM_ENUM("RX INT2_1 MIX1 INP2 Mux", rx_int2_1_mix_inp2_chain_enum);
3490 SOC_DAPM_ENUM("RX INT3_1 MIX1 INP0 Mux", rx_int3_1_mix_inp0_chain_enum);
3493 SOC_DAPM_ENUM("RX INT3_1 MIX1 INP1 Mux", rx_int3_1_mix_inp1_chain_enum);
3496 SOC_DAPM_ENUM("RX INT3_1 MIX1 INP2 Mux", rx_int3_1_mix_inp2_chain_enum);
3499 SOC_DAPM_ENUM("RX INT4_1 MIX1 INP0 Mux", rx_int4_1_mix_inp0_chain_enum);
3502 SOC_DAPM_ENUM("RX INT4_1 MIX1 INP1 Mux", rx_int4_1_mix_inp1_chain_enum);
3505 SOC_DAPM_ENUM("RX INT4_1 MIX1 INP2 Mux", rx_int4_1_mix_inp2_chain_enum);
3508 SOC_DAPM_ENUM("RX INT7_1 MIX1 INP0 Mux", rx_int7_1_mix_inp0_chain_enum);
3511 SOC_DAPM_ENUM("RX INT7_1 MIX1 INP1 Mux", rx_int7_1_mix_inp1_chain_enum);
3514 SOC_DAPM_ENUM("RX INT7_1 MIX1 INP2 Mux", rx_int7_1_mix_inp2_chain_enum);
3517 SOC_DAPM_ENUM("RX INT8_1 MIX1 INP0 Mux", rx_int8_1_mix_inp0_chain_enum);
3520 SOC_DAPM_ENUM("RX INT8_1 MIX1 INP1 Mux", rx_int8_1_mix_inp1_chain_enum);
3523 SOC_DAPM_ENUM("RX INT8_1 MIX1 INP2 Mux", rx_int8_1_mix_inp2_chain_enum);
3526 SOC_DAPM_ENUM("RX INT0 MIX2 INP Mux", rx_int0_mix2_inp_mux_enum);
3529 SOC_DAPM_ENUM("RX INT1 MIX2 INP Mux", rx_int1_mix2_inp_mux_enum);
3532 SOC_DAPM_ENUM("RX INT2 MIX2 INP Mux", rx_int2_mix2_inp_mux_enum);
3535 SOC_DAPM_ENUM("RX INT3 MIX2 INP Mux", rx_int3_mix2_inp_mux_enum);
3538 SOC_DAPM_ENUM("RX INT4 MIX2 INP Mux", rx_int4_mix2_inp_mux_enum);
3541 SOC_DAPM_ENUM("RX INT7 MIX2 INP Mux", rx_int7_mix2_inp_mux_enum);
3544 SOC_DAPM_ENUM("IIR0 INP0 Mux", iir0_inp0_mux_enum);
3546 SOC_DAPM_ENUM("IIR0 INP1 Mux", iir0_inp1_mux_enum);
3548 SOC_DAPM_ENUM("IIR0 INP2 Mux", iir0_inp2_mux_enum);
3550 SOC_DAPM_ENUM("IIR0 INP3 Mux", iir0_inp3_mux_enum);
3553 SOC_DAPM_ENUM("IIR1 INP0 Mux", iir1_inp0_mux_enum);
3555 SOC_DAPM_ENUM("IIR1 INP1 Mux", iir1_inp1_mux_enum);
3557 SOC_DAPM_ENUM("IIR1 INP2 Mux", iir1_inp2_mux_enum);
3559 SOC_DAPM_ENUM("IIR1 INP3 Mux", iir1_inp3_mux_enum);
3562 SOC_DAPM_ENUM_EXT("SLIM RX0 Mux", slim_rx_mux_enum,
3564 SOC_DAPM_ENUM_EXT("SLIM RX1 Mux", slim_rx_mux_enum,
3566 SOC_DAPM_ENUM_EXT("SLIM RX2 Mux", slim_rx_mux_enum,
3568 SOC_DAPM_ENUM_EXT("SLIM RX3 Mux", slim_rx_mux_enum,
3570 SOC_DAPM_ENUM_EXT("SLIM RX4 Mux", slim_rx_mux_enum,
3572 SOC_DAPM_ENUM_EXT("SLIM RX5 Mux", slim_rx_mux_enum,
3574 SOC_DAPM_ENUM_EXT("SLIM RX6 Mux", slim_rx_mux_enum,
3576 SOC_DAPM_ENUM_EXT("SLIM RX7 Mux", slim_rx_mux_enum,
3597 SOC_DAPM_ENUM_EXT("RX INT0 DEM MUX Mux", rx_int0_dem_inp_mux_enum,
3602 SOC_DAPM_ENUM_EXT("RX INT1 DEM MUX Mux", rx_int1_dem_inp_mux_enum,
3607 SOC_DAPM_ENUM_EXT("RX INT2 DEM MUX Mux", rx_int2_dem_inp_mux_enum,
3612 SOC_DAPM_ENUM("RX INT0_1 INTERP Mux", rx_int0_1_interp_mux_enum);
3615 SOC_DAPM_ENUM("RX INT1_1 INTERP Mux", rx_int1_1_interp_mux_enum);
3618 SOC_DAPM_ENUM("RX INT2_1 INTERP Mux", rx_int2_1_interp_mux_enum);
3621 SOC_DAPM_ENUM("RX INT3_1 INTERP Mux", rx_int3_1_interp_mux_enum);
3624 SOC_DAPM_ENUM("RX INT4_1 INTERP Mux", rx_int4_1_interp_mux_enum);
3627 SOC_DAPM_ENUM("RX INT7_1 INTERP Mux", rx_int7_1_interp_mux_enum);
3630 SOC_DAPM_ENUM("RX INT8_1 INTERP Mux", rx_int8_1_interp_mux_enum);
3633 SOC_DAPM_ENUM("RX INT0_2 INTERP Mux", rx_int0_2_interp_mux_enum);
3636 SOC_DAPM_ENUM("RX INT1_2 INTERP Mux", rx_int1_2_interp_mux_enum);
3639 SOC_DAPM_ENUM("RX INT2_2 INTERP Mux", rx_int2_2_interp_mux_enum);
3642 SOC_DAPM_ENUM("RX INT3_2 INTERP Mux", rx_int3_2_interp_mux_enum);
3645 SOC_DAPM_ENUM("RX INT4_2 INTERP Mux", rx_int4_2_interp_mux_enum);
3648 SOC_DAPM_ENUM("RX INT7_2 INTERP Mux", rx_int7_2_interp_mux_enum);
3651 SOC_DAPM_ENUM("RX INT8_2 INTERP Mux", rx_int8_2_interp_mux_enum);
3654 SOC_DAPM_ENUM("DMIC MUX0 Mux", tx_dmic_mux0_enum);
3657 SOC_DAPM_ENUM("DMIC MUX1 Mux", tx_dmic_mux1_enum);
3660 SOC_DAPM_ENUM("DMIC MUX2 Mux", tx_dmic_mux2_enum);
3663 SOC_DAPM_ENUM("DMIC MUX3 Mux", tx_dmic_mux3_enum);
3666 SOC_DAPM_ENUM("DMIC MUX4 Mux", tx_dmic_mux4_enum);
3669 SOC_DAPM_ENUM("DMIC MUX5 Mux", tx_dmic_mux5_enum);
3672 SOC_DAPM_ENUM("DMIC MUX6 Mux", tx_dmic_mux6_enum);
3675 SOC_DAPM_ENUM("DMIC MUX7 Mux", tx_dmic_mux7_enum);
3678 SOC_DAPM_ENUM("DMIC MUX8 Mux", tx_dmic_mux8_enum);
3681 SOC_DAPM_ENUM("AMIC MUX0 Mux", tx_amic_mux0_enum);
3684 SOC_DAPM_ENUM("AMIC MUX1 Mux", tx_amic_mux1_enum);
3687 SOC_DAPM_ENUM("AMIC MUX2 Mux", tx_amic_mux2_enum);
3690 SOC_DAPM_ENUM("AMIC MUX3 Mux", tx_amic_mux3_enum);
3693 SOC_DAPM_ENUM("AMIC MUX4 Mux", tx_amic_mux4_enum);
3696 SOC_DAPM_ENUM("AMIC MUX5 Mux", tx_amic_mux5_enum);
3699 SOC_DAPM_ENUM("AMIC MUX6 Mux", tx_amic_mux6_enum);
3702 SOC_DAPM_ENUM("AMIC MUX7 Mux", tx_amic_mux7_enum);
3705 SOC_DAPM_ENUM("AMIC MUX8 Mux", tx_amic_mux8_enum);
3708 SOC_DAPM_ENUM("AMIC4_5 SEL Mux", tx_amic4_5_enum);
3711 SOC_DAPM_ENUM_EXT("ADC MUX0 Mux", tx_adc_mux0_enum,
3714 SOC_DAPM_ENUM_EXT("ADC MUX1 Mux", tx_adc_mux1_enum,
3717 SOC_DAPM_ENUM_EXT("ADC MUX2 Mux", tx_adc_mux2_enum,
3720 SOC_DAPM_ENUM_EXT("ADC MUX3 Mux", tx_adc_mux3_enum,
3723 SOC_DAPM_ENUM_EXT("ADC MUX4 Mux", tx_adc_mux4_enum,
3726 SOC_DAPM_ENUM_EXT("ADC MUX5 Mux", tx_adc_mux5_enum,
3729 SOC_DAPM_ENUM_EXT("ADC MUX6 Mux", tx_adc_mux6_enum,
3732 SOC_DAPM_ENUM_EXT("ADC MUX7 Mux", tx_adc_mux7_enum,
3735 SOC_DAPM_ENUM_EXT("ADC MUX8 Mux", tx_adc_mux8_enum,
3739 SOC_DAPM_ENUM("CDC_IF TX0 MUX Mux", cdc_if_tx0_mux_enum);
3741 SOC_DAPM_ENUM("CDC_IF TX1 MUX Mux", cdc_if_tx1_mux_enum);
3743 SOC_DAPM_ENUM("CDC_IF TX2 MUX Mux", cdc_if_tx2_mux_enum);
3745 SOC_DAPM_ENUM("CDC_IF TX3 MUX Mux", cdc_if_tx3_mux_enum);
3747 SOC_DAPM_ENUM("CDC_IF TX4 MUX Mux", cdc_if_tx4_mux_enum);
3749 SOC_DAPM_ENUM("CDC_IF TX5 MUX Mux", cdc_if_tx5_mux_enum);
3751 SOC_DAPM_ENUM("CDC_IF TX6 MUX Mux", cdc_if_tx6_mux_enum);
3753 SOC_DAPM_ENUM("CDC_IF TX7 MUX Mux", cdc_if_tx7_mux_enum);
3755 SOC_DAPM_ENUM("CDC_IF TX8 MUX Mux", cdc_if_tx8_mux_enum);
3757 SOC_DAPM_ENUM("CDC_IF TX9 MUX Mux", cdc_if_tx9_mux_enum);
3759 SOC_DAPM_ENUM("CDC_IF TX10 MUX Mux", cdc_if_tx10_mux_enum);
3761 SOC_DAPM_ENUM("CDC_IF TX11 MUX Mux", cdc_if_tx11_mux_enum);
3763 SOC_DAPM_ENUM("CDC_IF TX11 INP1 MUX Mux", cdc_if_tx11_inp1_mux_enum);
3765 SOC_DAPM_ENUM("CDC_IF TX13 MUX Mux", cdc_if_tx13_mux_enum);
3767 SOC_DAPM_ENUM("CDC_IF TX13 INP1 MUX Mux", cdc_if_tx13_inp1_mux_enum);
3773 struct wcd934x_codec *wcd = dev_get_drvdata(dapm->dev);
3775 (struct soc_mixer_control *)kc->private_value;
3776 int port_id = mixer->shift;
3778 ucontrol->value.integer.value[0] = wcd->tx_port_value[port_id];
3787 struct wcd934x_codec *wcd = dev_get_drvdata(widget->dapm->dev);
3790 (struct soc_mixer_control *)kc->private_value;
3791 int enable = ucontrol->value.integer.value[0];
3793 int dai_id = widget->shift;
3794 int port_id = mixer->shift;
3797 if (enable == wcd->tx_port_value[port_id])
3801 if (list_empty(&wcd->tx_chs[port_id].list)) {
3802 list_add_tail(&wcd->tx_chs[port_id].list,
3803 &wcd->dai[dai_id].slim_ch_list);
3805 dev_err(wcd->dev ,"SLIM_TX%d PORT is busy\n", port_id);
3811 list_for_each_entry_safe(ch, c, &wcd->dai[dai_id].slim_ch_list, list) {
3812 if (ch->port == port_id) {
3814 list_del_init(&wcd->tx_chs[port_id].list);
3822 wcd->tx_port_value[port_id] = enable;
3823 snd_soc_dapm_mixer_update_power(widget->dapm, kc, enable, update);
3931 -84, 40, digital_gain), /* -84dB min - 40dB max */
3933 -84, 40, digital_gain),
3935 -84, 40, digital_gain),
3937 -84, 40, digital_gain),
3939 -84, 40, digital_gain),
3941 -84, 40, digital_gain),
3943 -84, 40, digital_gain),
3946 -84, 40, digital_gain),
3949 -84, 40, digital_gain),
3952 -84, 40, digital_gain),
3955 -84, 40, digital_gain),
3958 -84, 40, digital_gain),
3961 -84, 40, digital_gain),
3964 -84, 40, digital_gain),
3967 -84, 40, digital_gain),
3969 -84, 40, digital_gain),
3971 -84, 40, digital_gain),
3973 -84, 40, digital_gain),
3975 -84, 40, digital_gain),
3977 -84, 40, digital_gain),
3979 -84, 40, digital_gain),
3981 -84, 40, digital_gain),
3983 -84, 40, digital_gain),
3986 WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B1_CTL, -84, 40,
3989 WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B2_CTL, -84, 40,
3992 WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B3_CTL, -84, 40,
3995 WCD934X_CDC_SIDETONE_IIR0_IIR_GAIN_B4_CTL, -84, 40,
3998 WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B1_CTL, -84, 40,
4001 WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B2_CTL, -84, 40,
4004 WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B3_CTL, -84, 40,
4007 WCD934X_CDC_SIDETONE_IIR1_IIR_GAIN_B4_CTL, -84, 40,
4090 struct wcd934x_codec *wcd = dev_get_drvdata(component->dev);
4093 list_for_each_entry(ch, &dai->slim_ch_list, list) {
4094 if (ch->port >= WCD934X_RX_START) {
4095 port_num = ch->port - WCD934X_RX_START;
4098 port_num = ch->port;
4102 regmap_read(wcd->if_regmap, reg, &val);
4104 regmap_write(wcd->if_regmap, reg,
4112 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4114 struct wcd_slim_codec_dai_data *dai = &wcd->dai[w->shift];
4202 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4210 compander = interp_n - 1;
4211 if (!wcd->comp_enabled[compander])
4259 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4260 int interp_idx = w->shift;
4300 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4306 (w->shift * WCD934X_RX_PATH_CTL_OFFSET);
4308 (w->shift * WCD934X_RX_PATH_CTL_OFFSET);
4331 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4332 int reg = w->reg;
4366 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4369 gain_reg = WCD934X_CDC_RX0_RX_VOL_CTL + (w->shift *
4385 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4386 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4394 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_PRE_DAC,
4399 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA,
4411 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4412 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4413 int hph_mode = wcd->hph_mode;
4424 return -EINVAL;
4436 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_PRE_DAC,
4443 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA,
4463 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4464 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4465 int hph_mode = wcd->hph_mode;
4474 return -EINVAL;
4486 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_PRE_DAC,
4494 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA,
4512 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4513 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4517 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_PRE_DAC,
4521 wcd_clsh_ctrl_set_state(wcd->clsh_ctrl, WCD_CLSH_EVENT_POST_PA,
4533 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4567 wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHL_PA_OFF);
4586 wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHL_PA_OFF);
4597 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4633 wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_PRE_HPHR_PA_OFF);
4651 wcd_mbhc_event_notify(wcd->mbhc, WCD_EVENT_POST_HPHR_PA_OFF);
4674 adc_mux_index - 4;
4680 & 0xF8) >> 3) - 1;
4694 dmic_fs = min(wcd->dmic_sample_rate, WCD9XXX_DMIC_SAMPLE_RATE_2P4MHZ);
4698 dmic_fs = wcd->dmic_sample_rate;
4717 dev_err(comp->dev,
4744 dev_err(comp->dev,
4757 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4758 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
4768 wname = strpbrk(w->name, "012345");
4770 dev_err(comp->dev, "%s: widget not found\n", __func__);
4771 return -EINVAL;
4776 dev_err(comp->dev, "%s: Invalid DMIC line on the codec\n",
4778 return -EINVAL;
4784 dmic_clk_cnt = &wcd->dmic_0_1_clk_cnt;
4789 dmic_clk_cnt = &wcd->dmic_2_3_clk_cnt;
4794 dmic_clk_cnt = &wcd->dmic_4_5_clk_cnt;
4798 dev_err(comp->dev, "%s: Invalid DMIC Selection\n",
4800 return -EINVAL;
4807 dmic_rate_val = wcd934x_get_dmic_clk_val(comp, wcd->rate,
4821 (*dmic_clk_cnt)--;
4857 (adc_mux_n - 4);
4861 adc_mux_n - 4;
4867 adc_mux_n - 4;
4870 ((adc_mux_n == 8) ? (adc_mux_n - 8) :
4871 (adc_mux_n - 9));
4875 adc_mux_n - 4;
4881 adc_mux_n - 4;
4887 adc_mux_n - 4;
4923 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
4933 char *wname __free(kfree) = kstrndup(w->name, 15, GFP_KERNEL);
4935 return -ENOMEM;
4940 dev_err(comp->dev, "%s: Invalid decimator = %s\n",
4941 __func__, w->name);
4942 return -EINVAL;
4948 dev_err(comp->dev, "%s: decimator index not found\n",
4950 return -EINVAL;
4955 dev_err(comp->dev, "%s: Invalid decimator = %s\n",
4957 return -EINVAL;
5085 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
5089 wcd934x_codec_set_tx_hold(comp, w->reg, true);
5102 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
5103 int micb_num = w->shift;
5149 SND_SOC_DAPM_MUX("SLIM RX0 MUX", SND_SOC_NOPM, WCD934X_RX0, 0,
5151 SND_SOC_DAPM_MUX("SLIM RX1 MUX", SND_SOC_NOPM, WCD934X_RX1, 0,
5153 SND_SOC_DAPM_MUX("SLIM RX2 MUX", SND_SOC_NOPM, WCD934X_RX2, 0,
5155 SND_SOC_DAPM_MUX("SLIM RX3 MUX", SND_SOC_NOPM, WCD934X_RX3, 0,
5157 SND_SOC_DAPM_MUX("SLIM RX4 MUX", SND_SOC_NOPM, WCD934X_RX4, 0,
5159 SND_SOC_DAPM_MUX("SLIM RX5 MUX", SND_SOC_NOPM, WCD934X_RX5, 0,
5161 SND_SOC_DAPM_MUX("SLIM RX6 MUX", SND_SOC_NOPM, WCD934X_RX6, 0,
5163 SND_SOC_DAPM_MUX("SLIM RX7 MUX", SND_SOC_NOPM, WCD934X_RX7, 0,
5175 SND_SOC_DAPM_MUX_E("RX INT0_2 MUX", SND_SOC_NOPM, INTERP_EAR, 0,
5179 SND_SOC_DAPM_MUX_E("RX INT1_2 MUX", SND_SOC_NOPM, INTERP_HPHL, 0,
5183 SND_SOC_DAPM_MUX_E("RX INT2_2 MUX", SND_SOC_NOPM, INTERP_HPHR, 0,
5187 SND_SOC_DAPM_MUX_E("RX INT3_2 MUX", SND_SOC_NOPM, INTERP_LO1, 0,
5191 SND_SOC_DAPM_MUX_E("RX INT4_2 MUX", SND_SOC_NOPM, INTERP_LO2, 0,
5195 SND_SOC_DAPM_MUX_E("RX INT7_2 MUX", SND_SOC_NOPM, INTERP_SPKR1, 0,
5199 SND_SOC_DAPM_MUX_E("RX INT8_2 MUX", SND_SOC_NOPM, INTERP_SPKR2, 0,
5302 SND_SOC_DAPM_MUX("IIR0 INP0 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp0_mux),
5303 SND_SOC_DAPM_MUX("IIR0 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp1_mux),
5304 SND_SOC_DAPM_MUX("IIR0 INP2 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp2_mux),
5305 SND_SOC_DAPM_MUX("IIR0 INP3 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp3_mux),
5306 SND_SOC_DAPM_MUX("IIR1 INP0 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp0_mux),
5307 SND_SOC_DAPM_MUX("IIR1 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp1_mux),
5308 SND_SOC_DAPM_MUX("IIR1 INP2 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp2_mux),
5309 SND_SOC_DAPM_MUX("IIR1 INP3 MUX", SND_SOC_NOPM, 0, 0, &iir1_inp3_mux),
5321 SND_SOC_DAPM_MUX("RX INT0 DEM MUX", SND_SOC_NOPM, 0, 0,
5323 SND_SOC_DAPM_MUX("RX INT1 DEM MUX", SND_SOC_NOPM, 0, 0,
5325 SND_SOC_DAPM_MUX("RX INT2 DEM MUX", SND_SOC_NOPM, 0, 0,
5532 SND_SOC_DAPM_MUX_E("ADC MUX0", WCD934X_CDC_TX0_TX_PATH_CTL, 5, 0,
5536 SND_SOC_DAPM_MUX_E("ADC MUX1", WCD934X_CDC_TX1_TX_PATH_CTL, 5, 0,
5540 SND_SOC_DAPM_MUX_E("ADC MUX2", WCD934X_CDC_TX2_TX_PATH_CTL, 5, 0,
5544 SND_SOC_DAPM_MUX_E("ADC MUX3", WCD934X_CDC_TX3_TX_PATH_CTL, 5, 0,
5548 SND_SOC_DAPM_MUX_E("ADC MUX4", WCD934X_CDC_TX4_TX_PATH_CTL, 5, 0,
5552 SND_SOC_DAPM_MUX_E("ADC MUX5", WCD934X_CDC_TX5_TX_PATH_CTL, 5, 0,
5556 SND_SOC_DAPM_MUX_E("ADC MUX6", WCD934X_CDC_TX6_TX_PATH_CTL, 5, 0,
5560 SND_SOC_DAPM_MUX_E("ADC MUX7", WCD934X_CDC_TX7_TX_PATH_CTL, 5, 0,
5564 SND_SOC_DAPM_MUX_E("ADC MUX8", WCD934X_CDC_TX8_TX_PATH_CTL, 5, 0,
5590 SND_SOC_DAPM_MUX("CDC_IF TX0 MUX", SND_SOC_NOPM, WCD934X_TX0, 0,
5592 SND_SOC_DAPM_MUX("CDC_IF TX1 MUX", SND_SOC_NOPM, WCD934X_TX1, 0,
5594 SND_SOC_DAPM_MUX("CDC_IF TX2 MUX", SND_SOC_NOPM, WCD934X_TX2, 0,
5596 SND_SOC_DAPM_MUX("CDC_IF TX3 MUX", SND_SOC_NOPM, WCD934X_TX3, 0,
5598 SND_SOC_DAPM_MUX("CDC_IF TX4 MUX", SND_SOC_NOPM, WCD934X_TX4, 0,
5600 SND_SOC_DAPM_MUX("CDC_IF TX5 MUX", SND_SOC_NOPM, WCD934X_TX5, 0,
5602 SND_SOC_DAPM_MUX("CDC_IF TX6 MUX", SND_SOC_NOPM, WCD934X_TX6, 0,
5604 SND_SOC_DAPM_MUX("CDC_IF TX7 MUX", SND_SOC_NOPM, WCD934X_TX7, 0,
5606 SND_SOC_DAPM_MUX("CDC_IF TX8 MUX", SND_SOC_NOPM, WCD934X_TX8, 0,
5608 SND_SOC_DAPM_MUX("CDC_IF TX9 MUX", SND_SOC_NOPM, WCD934X_TX9, 0,
5610 SND_SOC_DAPM_MUX("CDC_IF TX10 MUX", SND_SOC_NOPM, WCD934X_TX10, 0,
5612 SND_SOC_DAPM_MUX("CDC_IF TX11 MUX", SND_SOC_NOPM, WCD934X_TX11, 0,
5614 SND_SOC_DAPM_MUX("CDC_IF TX11 INP1 MUX", SND_SOC_NOPM, WCD934X_TX11, 0,
5616 SND_SOC_DAPM_MUX("CDC_IF TX13 MUX", SND_SOC_NOPM, WCD934X_TX13, 0,
5618 SND_SOC_DAPM_MUX("CDC_IF TX13 INP1 MUX", SND_SOC_NOPM, WCD934X_TX13, 0,
5632 /* RX0-RX7 */
5645 {"RX INT0 DEM MUX", "CLSH_DSM_OUT", "RX INT0 MIX2"},
5646 {"RX INT0 DAC", NULL, "RX INT0 DEM MUX"},
5655 {"RX INT1 DEM MUX", "CLSH_DSM_OUT", "RX INT1 MIX3"},
5656 {"RX INT1 DAC", NULL, "RX INT1 DEM MUX"},
5665 {"RX INT2 DEM MUX", "CLSH_DSM_OUT", "RX INT2 MIX3"},
5666 {"RX INT2 DAC", NULL, "RX INT2 DEM MUX"},
5731 {"CDC_IF TX0 MUX", "DEC0", "ADC MUX0"},
5732 {"CDC_IF TX1 MUX", "DEC1", "ADC MUX1"},
5733 {"CDC_IF TX2 MUX", "DEC2", "ADC MUX2"},
5734 {"CDC_IF TX3 MUX", "DEC3", "ADC MUX3"},
5735 {"CDC_IF TX4 MUX", "DEC4", "ADC MUX4"},
5736 {"CDC_IF TX5 MUX", "DEC5", "ADC MUX5"},
5737 {"CDC_IF TX6 MUX", "DEC6", "ADC MUX6"},
5738 {"CDC_IF TX7 MUX", "DEC7", "ADC MUX7"},
5739 {"CDC_IF TX8 MUX", "DEC8", "ADC MUX8"},
5766 struct wcd934x_codec *wcd = dev_get_drvdata(comp->dev);
5769 if (!wcd->mbhc)
5770 return -ENOTSUPP;
5772 if (jack && !wcd->mbhc_started) {
5773 ret = wcd_mbhc_start(wcd->mbhc, &wcd->mbhc_cfg, jack);
5774 wcd->mbhc_started = true;
5775 } else if (wcd->mbhc_started) {
5776 wcd_mbhc_stop(wcd->mbhc);
5777 wcd->mbhc_started = false;
5806 struct device *dev = &wcd->sdev->dev;
5807 struct wcd_mbhc_config *cfg = &wcd->mbhc_cfg;
5810 ifc_dev_np = of_parse_phandle(dev->of_node, "slim-ifc-dev", 0);
5812 return dev_err_probe(dev, -EINVAL, "No Interface device found\n");
5814 wcd->sidev = of_slim_get_device(wcd->sdev->ctrl, ifc_dev_np);
5816 if (!wcd->sidev)
5817 return dev_err_probe(dev, -EINVAL, "Unable to get SLIM Interface device\n");
5819 slim_get_logical_addr(wcd->sidev);
5820 wcd->if_regmap = devm_regmap_init_slimbus(wcd->sidev,
5822 if (IS_ERR(wcd->if_regmap)) {
5823 put_device(&wcd->sidev->dev);
5824 return dev_err_probe(dev, PTR_ERR(wcd->if_regmap),
5828 of_property_read_u32(dev->parent->of_node, "qcom,dmic-sample-rate",
5829 &wcd->dmic_sample_rate);
5831 cfg->mbhc_micbias = MIC_BIAS_2;
5832 cfg->anc_micbias = MIC_BIAS_2;
5833 cfg->v_hs_max = WCD_MBHC_HS_V_MAX;
5834 cfg->num_btn = WCD934X_MBHC_MAX_BUTTONS;
5835 cfg->micb_mv = wcd->common.micb_mv[1];
5836 cfg->linein_th = 5000;
5837 cfg->hs_thr = 1700;
5838 cfg->hph_thr = 50;
5847 struct device *dev = &pdev->dev;
5848 struct wcd934x_ddata *data = dev_get_drvdata(dev->parent);
5854 return -ENOMEM;
5856 wcd->dev = dev;
5857 wcd->regmap = data->regmap;
5858 wcd->extclk = data->extclk;
5859 wcd->sdev = to_slim_device(data->dev);
5860 mutex_init(&wcd->sysclk_mutex);
5861 mutex_init(&wcd->micb_lock);
5862 wcd->common.dev = dev->parent;
5863 wcd->common.max_bias = 4;
5869 ret = devm_add_action_or_reset(dev, wcd934x_put_device_action, &wcd->sidev->dev);
5874 regmap_update_bits(wcd->regmap, WCD934X_CODEC_RPM_CLK_MCLK_CFG,
5877 memcpy(wcd->rx_chs, wcd934x_rx_chs, sizeof(wcd934x_rx_chs));
5878 memcpy(wcd->tx_chs, wcd934x_tx_chs, sizeof(wcd934x_tx_chs));
5880 irq = regmap_irq_get_virq(data->irq_data, WCD934X_IRQ_SLIMBUS);
5882 return dev_err_probe(wcd->dev, irq, "Failed to get SLIM IRQ\n");
5901 .name = "wcd934x-codec",
5911 .name = "wcd934x-codec",