Lines Matching +full:inverted +full:- +full:out
1 // SPDX-License-Identifier: GPL-2.0-only
27 #include <sound/tlv320dac33-plat.h>
49 (((samples)*5000) / (((burstrate)*5000) / ((burstrate) - (playrate))))
115 0x00, 0x00, 0x00, 0x00, /* 0x00 - 0x03 */
116 0x00, 0x00, 0x00, 0x00, /* 0x04 - 0x07 */
117 0x00, 0x00, 0x00, 0x00, /* 0x08 - 0x0b */
118 0x00, 0x00, 0x00, 0x00, /* 0x0c - 0x0f */
119 0x00, 0x00, 0x00, 0x00, /* 0x10 - 0x13 */
120 0x00, 0x00, 0x00, 0x00, /* 0x14 - 0x17 */
121 0x00, 0x00, 0x00, 0x00, /* 0x18 - 0x1b */
122 0x00, 0x00, 0x00, 0x00, /* 0x1c - 0x1f */
123 0x00, 0x00, 0x00, 0x00, /* 0x20 - 0x23 */
124 0x00, 0x00, 0x00, 0x00, /* 0x24 - 0x27 */
125 0x00, 0x00, 0x00, 0x00, /* 0x28 - 0x2b */
126 0x00, 0x00, 0x00, 0x80, /* 0x2c - 0x2f */
127 0x80, 0x00, 0x00, 0x00, /* 0x30 - 0x33 */
128 0x00, 0x00, 0x00, 0x00, /* 0x34 - 0x37 */
129 0x00, 0x00, /* 0x38 - 0x39 */
130 /* Registers 0x3a - 0x3f are reserved */
131 0x00, 0x00, /* 0x3a - 0x3b */
132 0x00, 0x00, 0x00, 0x00, /* 0x3c - 0x3f */
134 0x00, 0x00, 0x00, 0x00, /* 0x40 - 0x43 */
135 0x00, 0x80, /* 0x44 - 0x45 */
136 /* Registers 0x46 - 0x47 are reserved */
137 0x80, 0x80, /* 0x46 - 0x47 */
139 0x80, 0x00, 0x00, /* 0x48 - 0x4a */
140 /* Registers 0x4b - 0x7c are reserved */
142 0x00, 0x00, 0x00, 0x00, /* 0x4c - 0x4f */
143 0x00, 0x00, 0x00, 0x00, /* 0x50 - 0x53 */
144 0x00, 0x00, 0x00, 0x00, /* 0x54 - 0x57 */
145 0x00, 0x00, 0x00, 0x00, /* 0x58 - 0x5b */
146 0x00, 0x00, 0x00, 0x00, /* 0x5c - 0x5f */
147 0x00, 0x00, 0x00, 0x00, /* 0x60 - 0x63 */
148 0x00, 0x00, 0x00, 0x00, /* 0x64 - 0x67 */
149 0x00, 0x00, 0x00, 0x00, /* 0x68 - 0x6b */
150 0x00, 0x00, 0x00, 0x00, /* 0x6c - 0x6f */
151 0x00, 0x00, 0x00, 0x00, /* 0x70 - 0x73 */
152 0x00, 0x00, 0x00, 0x00, /* 0x74 - 0x77 */
153 0x00, 0x00, 0x00, 0x00, /* 0x78 - 0x7b */
156 0xda, 0x33, 0x03, /* 0x7d - 0x7f */
164 u8 *cache = dac33->reg_cache;
175 u8 *cache = dac33->reg_cache;
191 if (dac33->chip_power) {
192 val = i2c_smbus_read_byte_data(dac33->i2c, value[0]);
194 dev_err(component->dev, "Read failed (%d)\n", val);
224 if (dac33->chip_power) {
225 ret = i2c_master_send(dac33->i2c, data, 2);
227 dev_err(component->dev, "Write failed (%d)\n", ret);
241 mutex_lock(&dac33->mutex);
243 mutex_unlock(&dac33->mutex);
269 if (dac33->chip_power) {
272 ret = i2c_master_send(dac33->i2c, data, 3);
274 dev_err(component->dev, "Write failed (%d)\n", ret);
286 if (unlikely(!dac33->chip_power))
368 mutex_lock(&dac33->mutex);
371 if (unlikely(power == dac33->chip_power)) {
372 dev_dbg(component->dev, "Trying to set the same power state: %s\n",
378 ret = regulator_bulk_enable(ARRAY_SIZE(dac33->supplies),
379 dac33->supplies);
381 dev_err(component->dev,
386 if (dac33->power_gpio >= 0)
387 gpio_set_value(dac33->power_gpio, 1);
389 dac33->chip_power = 1;
392 if (dac33->power_gpio >= 0)
393 gpio_set_value(dac33->power_gpio, 0);
395 ret = regulator_bulk_disable(ARRAY_SIZE(dac33->supplies),
396 dac33->supplies);
398 dev_err(component->dev,
403 dac33->chip_power = 0;
407 mutex_unlock(&dac33->mutex);
414 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
419 if (likely(dac33->substream)) {
420 dac33_calculate_times(dac33->substream, component);
421 dac33_prepare_chip(dac33->substream, component);
437 ucontrol->value.enumerated.item[0] = dac33->fifo_mode;
449 if (dac33->fifo_mode == ucontrol->value.enumerated.item[0])
453 return -EPERM;
455 if (ucontrol->value.enumerated.item[0] >= DAC33_FIFO_LAST_MODE)
456 ret = -EINVAL;
458 dac33->fifo_mode = ucontrol->value.enumerated.item[0];
472 "Line -12dB DAC 0dB", "Line -6dB DAC 6dB",
486 * from 0 dB to -63.5 in 0.5 dB steps
487 * Need to be inverted later on:
489 * 0x7f == -63.5 dB
491 static DECLARE_TLV_DB_SCALE(dac_digivol_tlv, -6350, 50, 0);
499 SOC_DOUBLE_R("Line to Line Out Volume",
550 SND_SOC_DAPM_MUX("Left LOM Inverted From", SND_SOC_NOPM, 0, 0,
552 SND_SOC_DAPM_MUX("Right LOM Inverted From", SND_SOC_NOPM, 0, 0,
556 * LOP inverted from the corresponding DAC side.
590 {"Left LOM Inverted From", "DAC", "Left Bypass PGA"},
591 {"Right LOM Inverted From", "DAC", "Right Bypass PGA"},
592 {"Left LOM Inverted From", "LOP", "Analog Left Bypass"},
593 {"Right LOM Inverted From", "LOP", "Analog Right Bypass"},
595 {"Output Left Amplifier", NULL, "Left LOM Inverted From"},
596 {"Output Right Amplifier", NULL, "Right LOM Inverted From"},
647 struct snd_soc_component *component = dac33->component;
651 switch (dac33->fifo_mode) {
654 DAC33_THRREG(dac33->nsample));
657 spin_lock_irqsave(&dac33->lock, flags);
658 dac33->t_stamp2 = ktime_to_us(ktime_get());
659 dac33->t_stamp1 = dac33->t_stamp2;
660 spin_unlock_irqrestore(&dac33->lock, flags);
663 DAC33_THRREG(dac33->alarm_threshold));
665 delay = SAMPLES_TO_US(dac33->burst_rate,
666 dac33->alarm_threshold) + 1000;
672 spin_lock_irqsave(&dac33->lock, flags);
673 dac33->t_stamp1 = ktime_to_us(ktime_get());
675 dac33->t_stamp1 -= dac33->mode7_us_to_lthr;
676 spin_unlock_irqrestore(&dac33->lock, flags);
685 dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
686 dac33->fifo_mode);
693 struct snd_soc_component *component = dac33->component;
696 switch (dac33->fifo_mode) {
699 spin_lock_irqsave(&dac33->lock, flags);
700 dac33->t_stamp2 = ktime_to_us(ktime_get());
701 spin_unlock_irqrestore(&dac33->lock, flags);
704 DAC33_THRREG(dac33->nsample));
710 dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
711 dac33->fifo_mode);
723 component = dac33->component;
725 mutex_lock(&dac33->mutex);
726 switch (dac33->state) {
728 dac33->state = DAC33_PLAYBACK;
737 dac33->state = DAC33_IDLE;
747 mutex_unlock(&dac33->mutex);
756 spin_lock_irqsave(&dac33->lock, flags);
757 dac33->t_stamp1 = ktime_to_us(ktime_get());
758 spin_unlock_irqrestore(&dac33->lock, flags);
761 if (dac33->fifo_mode != DAC33_FIFO_MODE7)
762 schedule_work(&dac33->work);
775 } while (((reg & 0x03) != DAC33_OSCSTATUS_NORMAL) && timeout--);
777 dev_err(component->dev,
784 struct snd_soc_component *component = dai->component;
788 dac33->substream = substream;
796 struct snd_soc_component *component = dai->component;
799 dac33->substream = NULL;
808 struct snd_soc_component *component = dai->component;
817 dev_err(component->dev, "unsupported rate %d\n",
819 return -EINVAL;
824 dac33->fifo_size = DAC33_FIFO_SIZE_16BIT;
825 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 32);
828 dac33->fifo_size = DAC33_FIFO_SIZE_24BIT;
829 dac33->burst_rate = CALC_BURST_RATE(dac33->burst_bclkdiv, 64);
832 dev_err(component->dev, "unsupported width %d\n",
834 return -EINVAL;
857 switch (substream->runtime->rate) {
860 oscset = CALC_OSCSET(substream->runtime->rate, dac33->refclk);
861 ratioset = CALC_RATIOSET(substream->runtime->rate,
862 dac33->refclk);
865 dev_err(component->dev, "unsupported rate %d\n",
866 substream->runtime->rate);
867 return -EINVAL;
878 switch (substream->runtime->format) {
887 dev_err(component->dev, "unsupported format %d\n",
888 substream->runtime->format);
889 return -EINVAL;
892 mutex_lock(&dac33->mutex);
894 if (!dac33->chip_power) {
899 mutex_unlock(&dac33->mutex);
928 if (dac33->fifo_mode) {
930 /* 50-51 : ASRC Control registers */
941 /* 50-51 : ASRC Control registers */
947 switch (dac33->fifo_mode) {
963 switch (dac33->fifo_mode) {
973 if (dac33->keep_bclk)
987 if (dac33->keep_bclk)
1016 if (dac33->fifo_mode)
1018 dac33->burst_bclkdiv);
1020 if (substream->runtime->format == SNDRV_PCM_FORMAT_S16_LE)
1025 switch (dac33->fifo_mode) {
1028 DAC33_THRREG(dac33->alarm_threshold));
1035 dac33_write16(component, DAC33_UTHR_MSB, DAC33_THRREG(dac33->uthr));
1043 mutex_unlock(&dac33->mutex);
1052 unsigned int period_size = substream->runtime->period_size;
1053 unsigned int rate = substream->runtime->rate;
1057 if (!dac33->fifo_mode)
1060 switch (dac33->fifo_mode) {
1063 dac33->alarm_threshold = US_TO_SAMPLES(rate,
1064 dac33->mode1_latency);
1065 nsample_limit = dac33->fifo_size - dac33->alarm_threshold;
1067 if (period_size <= dac33->alarm_threshold)
1072 dac33->nsample = period_size *
1073 ((dac33->alarm_threshold / period_size) +
1074 ((dac33->alarm_threshold % period_size) ?
1077 dac33->nsample = nsample_limit;
1079 dac33->nsample = period_size;
1081 dac33->mode1_us_burst = SAMPLES_TO_US(dac33->burst_rate,
1082 dac33->nsample);
1083 dac33->t_stamp1 = 0;
1084 dac33->t_stamp2 = 0;
1087 dac33->uthr = UTHR_FROM_PERIOD_SIZE(period_size, rate,
1088 dac33->burst_rate) + 9;
1089 if (dac33->uthr > (dac33->fifo_size - DAC33_MODE7_MARGIN))
1090 dac33->uthr = dac33->fifo_size - DAC33_MODE7_MARGIN;
1091 if (dac33->uthr < (DAC33_MODE7_MARGIN + 10))
1092 dac33->uthr = (DAC33_MODE7_MARGIN + 10);
1094 dac33->mode7_us_to_lthr =
1095 SAMPLES_TO_US(substream->runtime->rate,
1096 dac33->uthr - DAC33_MODE7_MARGIN + 1);
1097 dac33->t_stamp1 = 0;
1108 struct snd_soc_component *component = dai->component;
1116 if (dac33->fifo_mode) {
1117 dac33->state = DAC33_PREFILL;
1118 schedule_work(&dac33->work);
1124 if (dac33->fifo_mode) {
1125 dac33->state = DAC33_FLUSH;
1126 schedule_work(&dac33->work);
1130 ret = -EINVAL;
1140 struct snd_soc_component *component = dai->component;
1148 switch (dac33->fifo_mode) {
1152 spin_lock_irqsave(&dac33->lock, flags);
1153 t0 = dac33->t_stamp1;
1154 t1 = dac33->t_stamp2;
1155 spin_unlock_irqrestore(&dac33->lock, flags);
1160 goto out;
1167 time_delta = t_now - t0;
1169 substream->runtime->rate,
1172 if (likely(dac33->alarm_threshold > samples_out))
1173 delay = dac33->alarm_threshold - samples_out;
1176 } else if ((t_now - t1) <= dac33->mode1_us_burst) {
1181 time_delta = t_now - t0;
1183 substream->runtime->rate,
1186 time_delta = t_now - t1;
1188 dac33->burst_rate,
1191 samples = dac33->alarm_threshold;
1192 samples += (samples_in - samples_out);
1203 time_delta = t_now - t0;
1205 substream->runtime->rate,
1208 samples_in = dac33->nsample;
1209 samples = dac33->alarm_threshold;
1210 samples += (samples_in - samples_out);
1213 delay = samples > dac33->fifo_size ?
1214 dac33->fifo_size : samples;
1220 spin_lock_irqsave(&dac33->lock, flags);
1221 t0 = dac33->t_stamp1;
1222 uthr = dac33->uthr;
1223 spin_unlock_irqrestore(&dac33->lock, flags);
1228 goto out;
1236 goto out;
1239 time_delta = t_now - t0;
1240 if (time_delta <= dac33->mode7_us_to_lthr) {
1246 substream->runtime->rate,
1250 delay = uthr - samples_out;
1258 time_delta = time_delta - dac33->mode7_us_to_lthr;
1261 substream->runtime->rate,
1264 dac33->burst_rate,
1266 delay = DAC33_MODE7_MARGIN + samples_in - samples_out;
1273 dev_warn(component->dev, "Unhandled FIFO mode: %d\n",
1274 dac33->fifo_mode);
1277 out:
1284 struct snd_soc_component *component = codec_dai->component;
1300 dev_err(component->dev, "Invalid clock ID (%d)\n", clk_id);
1303 dac33->refclk = freq;
1314 struct snd_soc_component *component = codec_dai->component;
1326 if (dac33->fifo_mode) {
1327 dev_err(component->dev, "FIFO mode requires provider mode\n");
1328 return -EINVAL;
1333 return -EINVAL;
1353 dev_err(component->dev, "Unsupported format (%u)\n",
1355 return -EINVAL;
1369 dac33->component = component;
1374 dev_err(component->dev, "Failed to power up component: %d\n", ret);
1381 dev_err(component->dev, "Failed to read chip ID: %d\n", ret);
1382 ret = -ENODEV;
1387 if (dac33->irq >= 0) {
1388 ret = request_irq(dac33->irq, dac33_interrupt_handler,
1390 component->name, component);
1392 dev_err(component->dev, "Could not request IRQ%d (%d)\n",
1393 dac33->irq, ret);
1394 dac33->irq = -1;
1396 if (dac33->irq != -1) {
1397 INIT_WORK(&dac33->work, dac33_work);
1402 if (dac33->irq >= 0)
1414 if (dac33->irq >= 0) {
1415 free_irq(dac33->irq, dac33->component);
1416 flush_work(&dac33->work);
1451 .name = "tlv320dac33-hifi",
1469 if (client->dev.platform_data == NULL) {
1470 dev_err(&client->dev, "Platform data not set\n");
1471 return -ENODEV;
1473 pdata = client->dev.platform_data;
1475 dac33 = devm_kzalloc(&client->dev, sizeof(struct tlv320dac33_priv),
1478 return -ENOMEM;
1480 dac33->reg_cache = devm_kmemdup_array(&client->dev, dac33_reg, ARRAY_SIZE(dac33_reg),
1482 if (!dac33->reg_cache)
1483 return -ENOMEM;
1485 dac33->i2c = client;
1486 mutex_init(&dac33->mutex);
1487 spin_lock_init(&dac33->lock);
1491 dac33->power_gpio = pdata->power_gpio;
1492 dac33->burst_bclkdiv = pdata->burst_bclkdiv;
1493 dac33->keep_bclk = pdata->keep_bclk;
1494 dac33->mode1_latency = pdata->mode1_latency;
1495 if (!dac33->mode1_latency)
1496 dac33->mode1_latency = 10000; /* 10ms */
1497 dac33->irq = client->irq;
1499 dac33->fifo_mode = DAC33_FIFO_BYPASS;
1502 if (dac33->power_gpio >= 0) {
1503 ret = gpio_request(dac33->power_gpio, "tlv320dac33 reset");
1505 dev_err(&client->dev,
1507 dac33->power_gpio);
1510 gpio_direction_output(dac33->power_gpio, 0);
1513 for (i = 0; i < ARRAY_SIZE(dac33->supplies); i++)
1514 dac33->supplies[i].supply = dac33_supply_names[i];
1516 ret = devm_regulator_bulk_get(&client->dev, ARRAY_SIZE(dac33->supplies),
1517 dac33->supplies);
1520 dev_err(&client->dev, "Failed to request supplies: %d\n", ret);
1524 ret = devm_snd_soc_register_component(&client->dev,
1531 if (dac33->power_gpio >= 0)
1532 gpio_free(dac33->power_gpio);
1541 if (unlikely(dac33->chip_power))
1542 dac33_hard_power(dac33->component, 0);
1544 if (dac33->power_gpio >= 0)
1545 gpio_free(dac33->power_gpio);
1559 .name = "tlv320dac33-codec",