Lines Matching +full:- +full:12000000
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2017 Texas Instruments Incorporated - https://www.ti.com/
10 * The TLV320AIC31xx series of audio codecs are low-power, highly integrated
12 * and mono/stereo Class-D speaker driver.
36 #include <dt-bindings/sound/tlv320aic31xx.h>
180 u8 ocmv; /* output common-mode voltage */
202 {12000000, 8000, 1, 8, 1920, 128, 48, 2, 128, 48, 2},
203 {12000000, 8000, 1, 8, 1920, 128, 32, 3, 128, 32, 3},
207 {12000000, 11025, 1, 7, 5264, 128, 32, 2, 128, 32, 2},
208 {12000000, 11025, 1, 8, 4672, 128, 24, 3, 128, 24, 3},
213 {12000000, 16000, 1, 8, 1920, 128, 24, 2, 128, 24, 2},
214 {12000000, 16000, 1, 8, 1920, 128, 16, 3, 128, 16, 3},
219 {12000000, 22050, 1, 7, 5264, 128, 16, 2, 128, 16, 2},
220 {12000000, 22050, 1, 8, 4672, 128, 12, 3, 128, 12, 3},
225 {12000000, 32000, 1, 8, 1920, 128, 12, 2, 128, 12, 2},
226 {12000000, 32000, 1, 8, 1920, 128, 8, 3, 128, 8, 3},
231 {12000000, 44100, 1, 7, 5264, 128, 8, 2, 128, 8, 2},
232 {12000000, 44100, 1, 8, 4672, 128, 6, 3, 128, 6, 3},
237 {12000000, 48000, 1, 8, 1920, 128, 8, 2, 128, 8, 2},
238 {12000000, 48000, 1, 7, 6800, 96, 5, 4, 96, 5, 4},
243 {12000000, 88200, 1, 7, 5264, 64, 8, 2, 64, 8, 2},
244 {12000000, 88200, 1, 8, 4672, 64, 6, 3, 64, 6, 3},
249 {12000000, 96000, 1, 8, 1920, 64, 8, 2, 64, 8, 2},
250 {12000000, 96000, 1, 7, 6800, 48, 5, 4, 48, 5, 4},
255 {12000000, 176400, 1, 7, 5264, 32, 8, 2, 32, 8, 2},
256 {12000000, 176400, 1, 8, 4672, 32, 6, 3, 32, 6, 3},
261 {12000000, 192000, 1, 8, 1920, 32, 8, 2, 32, 8, 2},
262 {12000000, 192000, 1, 7, 6800, 24, 5, 4, 24, 5, 4},
311 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6350, 50, 0);
313 static const DECLARE_TLV_DB_SCALE(adc_cgain_tlv, -2000, 50, 0);
317 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -6350, 50, 0);
318 static const DECLARE_TLV_DB_SCALE(sp_vol_tlv, -6350, 50, 0);
325 AIC31XX_RDACVOL, 0, -127, 48, 7, 0, dac_vol_tlv),
335 /* HP de-pop control: apply power not immediately but via ramp
340 SOC_ENUM("HP Output Driver Power-On time", hp_poweron_time_enum),
341 SOC_ENUM("HP Output Driver Ramp-up step", hp_rampup_step_enum),
352 0, -24, 40, 6, 0, adc_cgain_tlv),
390 int ret = regmap_read(aic31xx->regmap, reg, &bits);
394 ret = regmap_read(aic31xx->regmap, reg, &bits);
395 counter--;
398 dev_err(aic31xx->dev,
401 (count - counter) * sleep);
402 ret = -1;
412 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
418 switch (WIDGET_BIT(w->reg, w->shift)) {
446 dev_err(component->dev, "Unknown widget '%s' calling %s\n",
447 w->name, __func__);
448 return -EINVAL;
459 dev_dbg(component->dev,
461 event, w->name);
489 SOC_DAPM_ENUM("MIC1LP P-Terminal", mic1lp_p_enum);
492 SOC_DAPM_ENUM("MIC1RP P-Terminal", mic1rp_p_enum);
495 SOC_DAPM_ENUM("MIC1LM P-Terminal", mic1lm_p_enum);
498 SOC_DAPM_ENUM("MIC1LM M-Terminal", mic1lm_m_enum);
515 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
523 aic31xx->micbias_vg <<
525 dev_dbg(component->dev, "%s: turned on\n", __func__);
531 dev_dbg(component->dev, "%s: turned off\n", __func__);
601 SND_SOC_DAPM_MUX("MIC1LP P-Terminal", SND_SOC_NOPM, 0, 0,
603 SND_SOC_DAPM_MUX("MIC1RP P-Terminal", SND_SOC_NOPM, 0, 0,
605 SND_SOC_DAPM_MUX("MIC1LM P-Terminal", SND_SOC_NOPM, 0, 0,
613 SND_SOC_DAPM_MUX("MIC1LM M-Terminal", SND_SOC_NOPM, 0, 0,
632 /* AIC3111 and AIC3110 have stereo class-D amplifier */
647 /* AIC3100 and AIC3120 have only mono class-D amplifier */
695 {"MIC1LP P-Terminal", "FFR 10 Ohm", "MIC1LP"},
696 {"MIC1LP P-Terminal", "FFR 20 Ohm", "MIC1LP"},
697 {"MIC1LP P-Terminal", "FFR 40 Ohm", "MIC1LP"},
698 {"MIC1RP P-Terminal", "FFR 10 Ohm", "MIC1RP"},
699 {"MIC1RP P-Terminal", "FFR 20 Ohm", "MIC1RP"},
700 {"MIC1RP P-Terminal", "FFR 40 Ohm", "MIC1RP"},
701 {"MIC1LM P-Terminal", "FFR 10 Ohm", "MIC1LM"},
702 {"MIC1LM P-Terminal", "FFR 20 Ohm", "MIC1LM"},
703 {"MIC1LM P-Terminal", "FFR 40 Ohm", "MIC1LM"},
705 {"MIC1LM M-Terminal", "FFR 10 Ohm", "MIC1LM"},
706 {"MIC1LM M-Terminal", "FFR 20 Ohm", "MIC1LM"},
707 {"MIC1LM M-Terminal", "FFR 40 Ohm", "MIC1LM"},
709 {"MIC_GAIN_CTL", NULL, "MIC1LP P-Terminal"},
710 {"MIC_GAIN_CTL", NULL, "MIC1RP P-Terminal"},
711 {"MIC_GAIN_CTL", NULL, "MIC1LM P-Terminal"},
712 {"MIC_GAIN_CTL", NULL, "MIC1LM M-Terminal"},
781 if (!(aic31xx->codec_type & DAC31XX_BIT))
788 if (aic31xx->codec_type & AIC31XX_STEREO_CLASS_D_BIT)
806 if (aic31xx->codec_type & DAC31XX_BIT) {
830 if (aic31xx->codec_type & AIC31XX_STEREO_CLASS_D_BIT) {
864 int match = -1;
867 if (!aic31xx->sysclk || !aic31xx->p_div) {
868 dev_err(component->dev, "Master clock not supplied\n");
869 return -EINVAL;
871 mclk_p = aic31xx->sysclk / aic31xx->p_div;
894 if (match == -1) {
895 dev_err(component->dev,
899 return -EINVAL;
902 dev_warn(component->dev, "Can not produce exact bitclock");
915 (aic31xx->p_div << 4) | aic31xx_divs[i].pll_r);
944 aic31xx->rate_div_line = i;
946 dev_dbg(component->dev,
950 aic31xx->p_div,
967 struct snd_soc_component *component = dai->component;
971 dev_dbg(component->dev, "## %s: width %d rate %d\n",
991 dev_err(component->dev, "%s: Unsupported width %d\n",
993 return -EINVAL;
1004 if (aic31xx->sysclk_id == AIC31XX_PLL_CLKIN_BCLK) {
1005 aic31xx->sysclk = params_rate(params) * params_width(params) *
1007 aic31xx->p_div = 1;
1016 struct snd_soc_component *component = codec_dai->component;
1039 aic31xx->master_dapm_route_applied) {
1046 if (!ret && !(aic31xx->codec_type & DAC31XX_BIT))
1054 aic31xx->master_dapm_route_applied = false;
1056 !aic31xx->master_dapm_route_applied) {
1063 if (!ret && !(aic31xx->codec_type & DAC31XX_BIT))
1071 aic31xx->master_dapm_route_applied = true;
1080 struct snd_soc_component *component = codec_dai->component;
1085 dev_dbg(component->dev, "## %s: fmt = 0x%x\n", __func__, fmt);
1100 dev_err(component->dev, "Invalid DAI clock provider\n");
1101 return -EINVAL;
1112 dev_err(component->dev, "Invalid DAI clock signal polarity\n");
1113 return -EINVAL;
1142 dev_err(component->dev, "Invalid DAI interface format\n");
1143 return -EINVAL;
1163 struct snd_soc_component *component = codec_dai->component;
1167 dev_dbg(component->dev, "## %s: clk_id = %d, freq = %d, dir = %d\n",
1174 dev_err(aic31xx->dev, "%s: Too high mclk frequency %u\n",
1176 return -EINVAL;
1178 aic31xx->p_div = i;
1181 if (aic31xx_divs[i].mclk_p == freq / aic31xx->p_div)
1184 dev_err(aic31xx->dev, "%s: Unsupported frequency %d\n",
1186 return -EINVAL;
1193 aic31xx->sysclk_id = clk_id;
1194 aic31xx->sysclk = freq;
1204 struct aic31xx_priv *aic31xx = disable_nb->aic31xx;
1211 if (aic31xx->gpio_reset)
1212 gpiod_set_value_cansleep(aic31xx->gpio_reset, 1);
1214 regcache_mark_dirty(aic31xx->regmap);
1215 dev_dbg(aic31xx->dev, "## %s: DISABLE received\n", __func__);
1225 if (aic31xx->gpio_reset) {
1226 gpiod_set_value_cansleep(aic31xx->gpio_reset, 1);
1228 gpiod_set_value_cansleep(aic31xx->gpio_reset, 0);
1230 ret = regmap_write(aic31xx->regmap, AIC31XX_RESET, 1);
1243 dev_dbg(component->dev, "codec clock -> on (rate %d)\n",
1244 aic31xx_divs[aic31xx->rate_div_line].rate);
1249 if (aic31xx_divs[aic31xx->rate_div_line].nadc)
1251 if (aic31xx_divs[aic31xx->rate_div_line].madc)
1261 dev_dbg(component->dev, "codec clock -> off\n");
1275 ret = regulator_bulk_enable(ARRAY_SIZE(aic31xx->supplies),
1276 aic31xx->supplies);
1280 regcache_cache_only(aic31xx->regmap, false);
1282 /* Reset device registers for a consistent power-on like state */
1285 dev_err(aic31xx->dev, "Could not reset device: %d\n", ret);
1287 ret = regcache_sync(aic31xx->regmap);
1289 dev_err(component->dev,
1291 regcache_cache_only(aic31xx->regmap, true);
1292 regulator_bulk_disable(ARRAY_SIZE(aic31xx->supplies),
1293 aic31xx->supplies);
1302 aic31xx_set_jack(component, aic31xx->jack, NULL);
1311 regcache_cache_only(aic31xx->regmap, true);
1312 regulator_bulk_disable(ARRAY_SIZE(aic31xx->supplies),
1313 aic31xx->supplies);
1319 dev_dbg(component->dev, "## %s: %d -> %d\n", __func__,
1355 aic31xx->jack = jack;
1358 regmap_write(aic31xx->regmap, AIC31XX_HSDETECT,
1369 dev_dbg(aic31xx->dev, "## %s\n", __func__);
1371 aic31xx->component = component;
1373 for (i = 0; i < ARRAY_SIZE(aic31xx->supplies); i++) {
1374 aic31xx->disable_nb[i].nb.notifier_call =
1376 aic31xx->disable_nb[i].aic31xx = aic31xx;
1378 aic31xx->supplies[i].consumer,
1379 &aic31xx->disable_nb[i].nb);
1381 dev_err(component->dev,
1388 regcache_cache_only(aic31xx->regmap, true);
1389 regcache_mark_dirty(aic31xx->regmap);
1399 /* set output common-mode voltage */
1402 aic31xx->ocmv << AIC31XX_HPD_OCMV_SHIFT);
1433 .name = "tlv320dac31xx-hifi",
1448 .name = "tlv320aic31xx-hifi",
1494 struct device *dev = aic31xx->dev;
1499 ret = regmap_read(aic31xx->regmap, AIC31XX_INTRDACFLAG, &value);
1518 ret = regmap_read(aic31xx->regmap, AIC31XX_INTRDACFLAG2,
1529 ret = regmap_read(aic31xx->regmap, AIC31XX_HSDETECT, &val);
1547 if (aic31xx->jack)
1548 snd_soc_jack_report(aic31xx->jack, status,
1558 ret = regmap_read(aic31xx->regmap, AIC31XX_OFFLAG, &value);
1570 dev_warn(dev, "Left-channel DAC overflow has occurred\n");
1572 dev_warn(dev, "Right-channel DAC overflow has occurred\n");
1595 struct device *dev = priv->dev;
1599 if (dev->fwnode &&
1600 fwnode_property_read_u32(dev->fwnode, "ai31xx-ocmv", &value)) {
1603 priv->ocmv = value;
1608 avdd = regulator_get_voltage(priv->supplies[3].consumer);
1609 dvdd = regulator_get_voltage(priv->supplies[5].consumer);
1616 priv->ocmv = AIC31XX_HPD_OCMV_1_8V;
1618 priv->ocmv = AIC31XX_HPD_OCMV_1_65V;
1620 priv->ocmv = AIC31XX_HPD_OCMV_1_5V;
1622 priv->ocmv = AIC31XX_HPD_OCMV_1_35V;
1650 * Coefficients firmware binary structure. Multi-byte values are big-endian.
1655 * @5, 62 16-bit values: Page 8 buffer A DAC programmable filter coefficients
1656 * @129, 12 16-bit values: Page 9 Buffer A DAC programmable filter coefficients
1659 * ranging from -32 768 to 32 767. For more details on filter coefficients,
1660 * please refer to the TLV320DAC3100 datasheet, tables 6-120 and 6-123.
1664 dev_err(aic31xx->dev, "firmware size is %zu, expected 153 bytes\n", size);
1665 return -EINVAL;
1671 dev_err(aic31xx->dev, "fw magic is 0x%04x expected 0xb30c\n", val16);
1672 return -EINVAL;
1679 dev_err(aic31xx->dev, "invalid firmware version 0x%04x! expected 1", val16);
1680 return -EINVAL;
1684 ret = regmap_write(aic31xx->regmap, AIC31XX_DACPRB, *data);
1686 dev_err(aic31xx->dev, "failed to write PRB index: err %d\n", ret);
1693 ret = regmap_write(aic31xx->regmap, AIC31XX_REG(8, reg), *data);
1695 dev_err(aic31xx->dev,
1704 ret = regmap_write(aic31xx->regmap, AIC31XX_REG(9, reg), *data);
1706 dev_err(aic31xx->dev,
1713 dev_info(aic31xx->dev, "done loading DAC filter coefficients\n");
1724 ret = request_firmware(&fw, fw_name, aic31xx->dev);
1728 ret = tlv320dac3100_fw_load(aic31xx, fw->data, fw->size);
1741 aic31xx = devm_kzalloc(&i2c->dev, sizeof(*aic31xx), GFP_KERNEL);
1743 return -ENOMEM;
1745 aic31xx->regmap = devm_regmap_init_i2c(i2c, &aic31xx_i2c_regmap);
1746 if (IS_ERR(aic31xx->regmap)) {
1747 ret = PTR_ERR(aic31xx->regmap);
1748 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
1752 regcache_cache_only(aic31xx->regmap, true);
1754 aic31xx->dev = &i2c->dev;
1755 aic31xx->irq = i2c->irq;
1757 aic31xx->codec_type = (uintptr_t)i2c_get_match_data(i2c);
1759 dev_set_drvdata(aic31xx->dev, aic31xx);
1761 fwnode_property_read_u32(aic31xx->dev->fwnode, "ai31xx-micbias-vg",
1767 aic31xx->micbias_vg = micbias_value;
1770 dev_err(aic31xx->dev, "Bad ai31xx-micbias-vg value %d\n",
1772 aic31xx->micbias_vg = MICBIAS_2_0V;
1775 if (dev_get_platdata(aic31xx->dev)) {
1776 memcpy(&aic31xx->pdata, dev_get_platdata(aic31xx->dev), sizeof(aic31xx->pdata));
1777 aic31xx->codec_type = aic31xx->pdata.codec_type;
1778 aic31xx->micbias_vg = aic31xx->pdata.micbias_vg;
1781 aic31xx->gpio_reset = devm_gpiod_get_optional(aic31xx->dev, "reset",
1783 if (IS_ERR(aic31xx->gpio_reset))
1784 return dev_err_probe(aic31xx->dev, PTR_ERR(aic31xx->gpio_reset),
1787 for (i = 0; i < ARRAY_SIZE(aic31xx->supplies); i++)
1788 aic31xx->supplies[i].supply = aic31xx_supply_names[i];
1790 ret = devm_regulator_bulk_get(aic31xx->dev,
1791 ARRAY_SIZE(aic31xx->supplies),
1792 aic31xx->supplies);
1794 return dev_err_probe(aic31xx->dev, ret, "Failed to request supplies\n");
1798 if (aic31xx->irq > 0) {
1799 regmap_update_bits(aic31xx->regmap, AIC31XX_GPIO1,
1804 regmap_write(aic31xx->regmap, AIC31XX_INT1CTRL,
1810 ret = devm_request_threaded_irq(aic31xx->dev, aic31xx->irq,
1812 IRQF_ONESHOT, "aic31xx-irq",
1815 dev_err(aic31xx->dev, "Unable to request IRQ\n");
1820 if (aic31xx->codec_type == DAC3100) {
1821 ret = tlv320dac3100_load_coeffs(aic31xx, "tlv320dac3100-coeffs.bin");
1823 dev_warn(aic31xx->dev, "Did not load any filter coefficients\n");
1826 if (aic31xx->codec_type & DAC31XX_BIT)
1827 return devm_snd_soc_register_component(&i2c->dev,
1832 return devm_snd_soc_register_component(&i2c->dev,
1840 .name = "tlv320aic31xx-codec",