1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
40 	"ti,gpo-config-1",
41 	"ti,gpo-config-2",
42 	"ti,gpo-config-3",
43 	"ti,gpo-config-4",
162 /* Digital Volume control. From -100 to 27 dB in 0.5 dB steps */
163 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10050, 50, 0);
168 /* DRE Level. From -12 dB to -66 dB in 1 dB steps */
169 static DECLARE_TLV_DB_SCALE(dre_thresh_tlv, -6600, 100, 0);
173 /* AGC Level. From -6 dB to -36 dB in 2 dB steps */
174 static DECLARE_TLV_DB_SCALE(agc_thresh_tlv, -3600, 200, 0);
179 	"Linear Phase", "Low Latency", "Ultra-low Latency"
226 /* Analog/Digital Selection */
227 static const char * const adcx140_mic_sel_text[] = {"Analog", "Line In", "Digital"};
228 static const char * const adcx140_analog_sel_text[] = {"Analog", "Line In"};
242 SOC_DAPM_ENUM("MIC1 Analog MUX", adcx140_mic1_analog_enum);
263 SOC_DAPM_ENUM("MIC2 Analog MUX", adcx140_mic2_analog_enum);
284 SOC_DAPM_ENUM("MIC3 Analog MUX", adcx140_mic3_analog_enum);
305 SOC_DAPM_ENUM("MIC4 Analog MUX", adcx140_mic4_analog_enum);
352 	/* Analog Differential Inputs */
386 	SND_SOC_DAPM_MUX("MIC1 Analog Mux", SND_SOC_NOPM, 0, 0,
388 	SND_SOC_DAPM_MUX("MIC2 Analog Mux", SND_SOC_NOPM, 0, 0,
390 	SND_SOC_DAPM_MUX("MIC3 Analog Mux", SND_SOC_NOPM, 0, 0,
392 	SND_SOC_DAPM_MUX("MIC4 Analog Mux", SND_SOC_NOPM, 0, 0,
454 	SND_SOC_DAPM_MUX("IN1 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
456 	SND_SOC_DAPM_MUX("IN2 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
458 	SND_SOC_DAPM_MUX("IN3 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
460 	SND_SOC_DAPM_MUX("IN4 Analog Mic Resistor", SND_SOC_NOPM, 0, 0,
498 	{"Decimation Filter", "Ultra-low Latency", "DRE_ENABLE"},
516 	{"MIC_GAIN_CTL_CH1", NULL, "IN1 Analog Mic Resistor"},
517 	{"MIC_GAIN_CTL_CH1", NULL, "IN1 Analog Mic Resistor"},
518 	{"MIC_GAIN_CTL_CH2", NULL, "IN2 Analog Mic Resistor"},
519 	{"MIC_GAIN_CTL_CH2", NULL, "IN2 Analog Mic Resistor"},
520 	{"MIC_GAIN_CTL_CH3", NULL, "IN3 Analog Mic Resistor"},
521 	{"MIC_GAIN_CTL_CH3", NULL, "IN3 Analog Mic Resistor"},
522 	{"MIC_GAIN_CTL_CH4", NULL, "IN4 Analog Mic Resistor"},
523 	{"MIC_GAIN_CTL_CH4", NULL, "IN4 Analog Mic Resistor"},
525 	{"IN1 Analog Mic Resistor", "2.5 kOhm", "MIC1P Input Mux"},
526 	{"IN1 Analog Mic Resistor", "10 kOhm", "MIC1P Input Mux"},
527 	{"IN1 Analog Mic Resistor", "20 kOhm", "MIC1P Input Mux"},
529 	{"IN1 Analog Mic Resistor", "2.5 kOhm", "MIC1M Input Mux"},
530 	{"IN1 Analog Mic Resistor", "10 kOhm", "MIC1M Input Mux"},
531 	{"IN1 Analog Mic Resistor", "20 kOhm", "MIC1M Input Mux"},
533 	{"IN2 Analog Mic Resistor", "2.5 kOhm", "MIC2P Input Mux"},
534 	{"IN2 Analog Mic Resistor", "10 kOhm", "MIC2P Input Mux"},
535 	{"IN2 Analog Mic Resistor", "20 kOhm", "MIC2P Input Mux"},
537 	{"IN2 Analog Mic Resistor", "2.5 kOhm", "MIC2M Input Mux"},
538 	{"IN2 Analog Mic Resistor", "10 kOhm", "MIC2M Input Mux"},
539 	{"IN2 Analog Mic Resistor", "20 kOhm", "MIC2M Input Mux"},
541 	{"IN3 Analog Mic Resistor", "2.5 kOhm", "MIC3P Input Mux"},
542 	{"IN3 Analog Mic Resistor", "10 kOhm", "MIC3P Input Mux"},
543 	{"IN3 Analog Mic Resistor", "20 kOhm", "MIC3P Input Mux"},
545 	{"IN3 Analog Mic Resistor", "2.5 kOhm", "MIC3M Input Mux"},
546 	{"IN3 Analog Mic Resistor", "10 kOhm", "MIC3M Input Mux"},
547 	{"IN3 Analog Mic Resistor", "20 kOhm", "MIC3M Input Mux"},
549 	{"IN4 Analog Mic Resistor", "2.5 kOhm", "MIC4P Input Mux"},
550 	{"IN4 Analog Mic Resistor", "10 kOhm", "MIC4P Input Mux"},
551 	{"IN4 Analog Mic Resistor", "20 kOhm", "MIC4P Input Mux"},
553 	{"IN4 Analog Mic Resistor", "2.5 kOhm", "MIC4M Input Mux"},
554 	{"IN4 Analog Mic Resistor", "10 kOhm", "MIC4M Input Mux"},
555 	{"IN4 Analog Mic Resistor", "20 kOhm", "MIC4M Input Mux"},
571 	{"MIC1 Analog Mux", "Line In", "MIC1P"},
572 	{"MIC2 Analog Mux", "Line In", "MIC2P"},
573 	{"MIC3 Analog Mux", "Line In", "MIC3P"},
574 	{"MIC4 Analog Mux", "Line In", "MIC4P"},
576 	{"MIC1P Input Mux", "Analog", "MIC1P"},
577 	{"MIC1M Input Mux", "Analog", "MIC1M"},
578 	{"MIC2P Input Mux", "Analog", "MIC2P"},
579 	{"MIC2M Input Mux", "Analog", "MIC2M"},
580 	{"MIC3P Input Mux", "Analog", "MIC3P"},
581 	{"MIC3M Input Mux", "Analog", "MIC3M"},
582 	{"MIC4P Input Mux", "Analog", "MIC4P"},
583 	{"MIC4M Input Mux", "Analog", "MIC4M"},
605 	uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;  in adcx140_phase_calib_info()
606 	uinfo->count = 1;  in adcx140_phase_calib_info()
607 	uinfo->value.integer.min = 0;  in adcx140_phase_calib_info()
608 	uinfo->value.integer.max = 1;  in adcx140_phase_calib_info()
619 	value->value.integer.value[0] = adcx140->phase_calib_on ? 1 : 0;  in adcx140_phase_calib_get()
632 	bool v = value->value.integer.value[0] ? true : false;  in adcx140_phase_calib_put()
634 	if (adcx140->phase_calib_on != v) {  in adcx140_phase_calib_put()
635 		adcx140->phase_calib_on = v;  in adcx140_phase_calib_put()
642 	SOC_SINGLE_TLV("Analog CH1 Mic Gain Volume", ADCX140_CH1_CFG1, 2, 42, 0,
644 	SOC_SINGLE_TLV("Analog CH2 Mic Gain Volume", ADCX140_CH2_CFG1, 2, 42, 0,
646 	SOC_SINGLE_TLV("Analog CH3 Mic Gain Volume", ADCX140_CH3_CFG1, 2, 42, 0,
648 	SOC_SINGLE_TLV("Analog CH4 Mic Gain Volume", ADCX140_CH4_CFG1, 2, 42, 0,
661 	SOC_SINGLE_TLV("Digital CH1 Out Volume", ADCX140_CH1_CFG2,
663 	SOC_SINGLE_TLV("Digital CH2 Out Volume", ADCX140_CH2_CFG2,
665 	SOC_SINGLE_TLV("Digital CH3 Out Volume", ADCX140_CH3_CFG2,
667 	SOC_SINGLE_TLV("Digital CH4 Out Volume", ADCX140_CH4_CFG2,
669 	SOC_SINGLE_TLV("Digital CH5 Out Volume", ADCX140_CH5_CFG2,
671 	SOC_SINGLE_TLV("Digital CH6 Out Volume", ADCX140_CH6_CFG2,
673 	SOC_SINGLE_TLV("Digital CH7 Out Volume", ADCX140_CH7_CFG2,
675 	SOC_SINGLE_TLV("Digital CH8 Out Volume", ADCX140_CH8_CFG2,
684 	if (adcx140->gpio_reset) {  in adcx140_reset()
685 		gpiod_direction_output(adcx140->gpio_reset, 0);  in adcx140_reset()
688 		gpiod_direction_output(adcx140->gpio_reset, 1);  in adcx140_reset()
690 		ret = regmap_write(adcx140->regmap, ADCX140_SW_RESET,  in adcx140_reset()
704 	struct snd_soc_component *component = adcx140->component;  in adcx140_pwr_ctrl()
709 	if (adcx140->micbias_vg && power_state)  in adcx140_pwr_ctrl()
713 		ret = regmap_write(adcx140->regmap, ADCX140_PHASE_CALIB,  in adcx140_pwr_ctrl()
714 			adcx140->phase_calib_on ? 0x00 : 0x40);  in adcx140_pwr_ctrl()
716 			dev_err(component->dev, "%s: register write error %d\n",  in adcx140_pwr_ctrl()
720 	regmap_update_bits(adcx140->regmap, ADCX140_PWR_CFG,  in adcx140_pwr_ctrl()
728 	struct snd_soc_component *component = dai->component;  in adcx140_hw_params()
746 		dev_err(component->dev, "%s: Unsupported width %d\n",  in adcx140_hw_params()
748 		return -EINVAL;  in adcx140_hw_params()
764 	struct snd_soc_component *component = codec_dai->component;  in adcx140_set_dai_fmt()
779 		dev_err(component->dev, "Invalid DAI clock provider\n");  in adcx140_set_dai_fmt()
780 		return -EINVAL;  in adcx140_set_dai_fmt()
799 		dev_err(component->dev, "Invalid DAI interface format\n");  in adcx140_set_dai_fmt()
800 		return -EINVAL;  in adcx140_set_dai_fmt()
815 		dev_err(component->dev, "Invalid DAI clock signal polarity\n");  in adcx140_set_dai_fmt()
816 		return -EINVAL;  in adcx140_set_dai_fmt()
822 	adcx140->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;  in adcx140_set_dai_fmt()
847 	struct snd_soc_component *component = codec_dai->component;  in adcx140_set_dai_tdm_slot()
855 		dev_err(component->dev, "Only lower adjacent slots are supported\n");  in adcx140_set_dai_tdm_slot()
856 		return -EINVAL;  in adcx140_set_dai_tdm_slot()
866 		dev_err(component->dev, "Unsupported slot width %d\n", slot_width);  in adcx140_set_dai_tdm_slot()
867 		return -EINVAL;  in adcx140_set_dai_tdm_slot()
870 	adcx140->slot_width = slot_width;  in adcx140_set_dai_tdm_slot()
889 		ret = device_property_read_u32_array(adcx140->dev,  in adcx140_configure_gpo()
897 			dev_err(adcx140->dev, "GPO%d config out of range\n", i + 1);  in adcx140_configure_gpo()
898 			return -EINVAL;  in adcx140_configure_gpo()
902 			dev_err(adcx140->dev, "GPO%d drive out of range\n", i + 1);  in adcx140_configure_gpo()
903 			return -EINVAL;  in adcx140_configure_gpo()
908 		ret = regmap_write(adcx140->regmap, ADCX140_GPO_CFG0 + i,  in adcx140_configure_gpo()
925 	gpio_count = device_property_count_u32(adcx140->dev,  in adcx140_configure_gpio()
926 			"ti,gpio-config");  in adcx140_configure_gpio()
931 		return -EINVAL;  in adcx140_configure_gpio()
933 	ret = device_property_read_u32_array(adcx140->dev, "ti,gpio-config",  in adcx140_configure_gpio()
939 		dev_err(adcx140->dev, "GPIO config out of range\n");  in adcx140_configure_gpio()
940 		return -EINVAL;  in adcx140_configure_gpio()
944 		dev_err(adcx140->dev, "GPIO drive out of range\n");  in adcx140_configure_gpio()
945 		return -EINVAL;  in adcx140_configure_gpio()
951 	return regmap_write(adcx140->regmap, ADCX140_GPIO_CFG0, gpio_output_val);  in adcx140_configure_gpio()
971 	ret = device_property_read_u32(adcx140->dev, "ti,mic-bias-source",  in adcx140_codec_probe()
975 		adcx140->micbias_vg = false;  in adcx140_codec_probe()
977 		adcx140->micbias_vg = true;  in adcx140_codec_probe()
980 	ret = device_property_read_u32(adcx140->dev, "ti,vref-source",  in adcx140_codec_probe()
986 		dev_err(adcx140->dev, "Mic Bias source value is invalid\n");  in adcx140_codec_probe()
987 		return -EINVAL;  in adcx140_codec_probe()
994 		goto out;  in adcx140_codec_probe()
996 	if (adcx140->supply_areg == NULL)  in adcx140_codec_probe()
999 	ret = regmap_write(adcx140->regmap, ADCX140_SLEEP_CFG, sleep_cfg_val);  in adcx140_codec_probe()
1001 		dev_err(adcx140->dev, "setting sleep config failed %d\n", ret);  in adcx140_codec_probe()
1002 		goto out;  in adcx140_codec_probe()
1008 	pdm_count = device_property_count_u32(adcx140->dev,  in adcx140_codec_probe()
1009 					      "ti,pdm-edge-select");  in adcx140_codec_probe()
1011 		ret = device_property_read_u32_array(adcx140->dev,  in adcx140_codec_probe()
1012 						     "ti,pdm-edge-select",  in adcx140_codec_probe()
1018 			pdm_edge_val |= pdm_edges[i] << (ADCX140_PDM_EDGE_SHIFT - i);  in adcx140_codec_probe()
1020 		ret = regmap_write(adcx140->regmap, ADCX140_PDM_CFG,  in adcx140_codec_probe()
1026 	gpi_count = device_property_count_u32(adcx140->dev, "ti,gpi-config");  in adcx140_codec_probe()
1028 		ret = device_property_read_u32_array(adcx140->dev,  in adcx140_codec_probe()
1029 						     "ti,gpi-config",  in adcx140_codec_probe()
1037 		ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG0,  in adcx140_codec_probe()
1045 		ret = regmap_write(adcx140->regmap, ADCX140_GPI_CFG1,  in adcx140_codec_probe()
1057 		goto out;  in adcx140_codec_probe()
1059 	ret = regmap_update_bits(adcx140->regmap, ADCX140_BIAS_CFG,  in adcx140_codec_probe()
1063 		dev_err(adcx140->dev, "setting MIC bias failed %d\n", ret);  in adcx140_codec_probe()
1065 	tx_high_z = device_property_read_bool(adcx140->dev, "ti,asi-tx-drive");  in adcx140_codec_probe()
1067 		ret = regmap_update_bits(adcx140->regmap, ADCX140_ASI_CFG0,  in adcx140_codec_probe()
1070 			dev_err(adcx140->dev, "Setting Tx drive failed %d\n", ret);  in adcx140_codec_probe()
1071 			goto out;  in adcx140_codec_probe()
1076 out:  in adcx140_codec_probe()
1116 		.name = "tlv320adcx140-codec",
1143 	regulator_disable(adcx140->supply_areg);  in adcx140_disable_regulator()
1151 	adcx140 = devm_kzalloc(&i2c->dev, sizeof(*adcx140), GFP_KERNEL);  in adcx140_i2c_probe()
1153 		return -ENOMEM;  in adcx140_i2c_probe()
1155 	adcx140->phase_calib_on = false;  in adcx140_i2c_probe()
1156 	adcx140->dev = &i2c->dev;  in adcx140_i2c_probe()
1158 	adcx140->gpio_reset = devm_gpiod_get_optional(adcx140->dev,  in adcx140_i2c_probe()
1160 	if (IS_ERR(adcx140->gpio_reset))  in adcx140_i2c_probe()
1161 		dev_info(&i2c->dev, "Reset GPIO not defined\n");  in adcx140_i2c_probe()
1163 	adcx140->supply_areg = devm_regulator_get_optional(adcx140->dev,  in adcx140_i2c_probe()
1165 	if (IS_ERR(adcx140->supply_areg)) {  in adcx140_i2c_probe()
1166 		if (PTR_ERR(adcx140->supply_areg) == -EPROBE_DEFER)  in adcx140_i2c_probe()
1167 			return -EPROBE_DEFER;  in adcx140_i2c_probe()
1169 		adcx140->supply_areg = NULL;  in adcx140_i2c_probe()
1171 		ret = regulator_enable(adcx140->supply_areg);  in adcx140_i2c_probe()
1173 			dev_err(adcx140->dev, "Failed to enable areg\n");  in adcx140_i2c_probe()
1177 		ret = devm_add_action_or_reset(&i2c->dev, adcx140_disable_regulator, adcx140);  in adcx140_i2c_probe()
1182 	adcx140->regmap = devm_regmap_init_i2c(i2c, &adcx140_i2c_regmap);  in adcx140_i2c_probe()
1183 	if (IS_ERR(adcx140->regmap)) {  in adcx140_i2c_probe()
1184 		ret = PTR_ERR(adcx140->regmap);  in adcx140_i2c_probe()
1185 		dev_err(&i2c->dev, "Failed to allocate register map: %d\n",  in adcx140_i2c_probe()
1192 	return devm_snd_soc_register_component(&i2c->dev,  in adcx140_i2c_probe()
1207 		.name	= "tlv320adcx140-codec",