Lines Matching +full:8 +full:- +full:15
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5682s.h -- RT5682I-VS ALSA SoC audio driver
17 #include <linux/clk-provider.h>
25 /* I/O - Output */
33 /* I/O - Input */
44 /* I/O - ADC/DAC/DMIC */
50 /* Mixer - D-D */
57 /* Mixer - ADC */
84 /* Format - ADC/DAC */
91 /* Format - TDM Control */
98 /* Function - Analog */
412 #define RT5682S_L_MUTE (0x1 << 15)
413 #define RT5682S_L_MUTE_SFT 15
416 #define RT5682S_L_VOL_SFT 8
436 #define RT5682S_G_HP (0xf << 8)
437 #define RT5682S_G_HP_SFT 8
442 #define RT5682S_EMB_JD_MASK (0x1 << 15)
443 #define RT5682S_EMB_JD_EN (0x1 << 15)
444 #define RT5682S_EMB_JD_EN_SFT 15
455 #define RT5682S_POL_FAST_OFF_MASK (0x1 << 8)
456 #define RT5682S_POL_FAST_OFF_HIGH (0x1 << 8)
457 #define RT5682S_POL_FAST_OFF_LOW (0x0 << 8)
483 #define RT5682S_SEL_CBJ_TYPE_SLOW (0x1 << 15)
484 #define RT5682S_SEL_CBJ_TYPE_NORM (0x0 << 15)
485 #define RT5682S_SEL_CBJ_TYPE_MASK (0x1 << 15)
516 #define RT5682S_JD_FAST_OFF_SRC_MASK (0x7 << 8)
517 #define RT5682S_JD_FAST_OFF_SRC_JDH (0x6 << 8)
518 #define RT5682S_JD_FAST_OFF_SRC_GPIO6 (0x5 << 8)
519 #define RT5682S_JD_FAST_OFF_SRC_GPIO5 (0x4 << 8)
520 #define RT5682S_JD_FAST_OFF_SRC_GPIO4 (0x3 << 8)
521 #define RT5682S_JD_FAST_OFF_SRC_GPIO3 (0x2 << 8)
522 #define RT5682S_JD_FAST_OFF_SRC_GPIO2 (0x1 << 8)
523 #define RT5682S_JD_FAST_OFF_SRC_GPIO1 (0x0 << 8)
526 #define RT5682S_DAC_L1_VOL_MASK (0xff << 8)
527 #define RT5682S_DAC_L1_VOL_SFT 8
532 #define RT5682S_ADC_L_VOL_MASK (0x7f << 8)
533 #define RT5682S_ADC_L_VOL_SFT 8
544 #define RT5682S_ST_SRC_SEL (0x1 << 8)
545 #define RT5682S_ST_SRC_SFT 8
552 #define RT5682S_M_STO1_ADC_L1 (0x1 << 15)
553 #define RT5682S_M_STO1_ADC_L1_SFT 15
576 #define RT5682S_M_ADCMIX_L (0x1 << 15)
577 #define RT5682S_M_ADCMIX_L_SFT 15
586 #define RT5682S_M_DAC_L1_STO_L (0x1 << 15)
587 #define RT5682S_M_DAC_L1_STO_L_SFT 15
606 #define RT5682S_M_ST_STO_R (0x1 << 8)
607 #define RT5682S_M_ST_STO_R_SFT 8
620 #define RT5682S_BST_CBJ_MASK (0x3f << 8)
621 #define RT5682S_BST_CBJ_SFT 8
628 #define RT5682S_PWR_RM1_R_BIT 8
632 #define RT5682S_PWR_I2S1 (0x1 << 15)
633 #define RT5682S_PWR_I2S1_BIT 15
644 #define RT5682S_PWR_LDO (0x1 << 8)
645 #define RT5682S_PWR_LDO_BIT 8
662 #define RT5682S_PWR_ADC_S1F (0x1 << 15)
663 #define RT5682S_PWR_ADC_S1F_BIT 15
677 #define RT5682S_PWR_VREF1 (0x1 << 15)
678 #define RT5682S_PWR_VREF1_BIT 15
695 #define RT5682S_PWR_MCLK0_WD (0x1 << 15)
696 #define RT5682S_PWR_MCLK0_WD_BIT 15
714 #define RT5682S_PWR_LDO_PLLA (0x1 << 15)
715 #define RT5682S_PWR_LDO_PLLA_BIT 15
740 #define RT5682S_PWR_CLK_COMP_8FS (0x1 << 15)
741 #define RT5682S_PWR_CLK_COMP_8FS_BIT 15
746 #define RT5682S_DBG_BGLDO_MB2_MASK (0x3 << 8)
747 #define RT5682S_DBG_BGLDO_MB2_SFT 8
759 #define RT5682S_SYS_CLK_DET (0x1 << 15)
760 #define RT5682S_SYS_CLK_DET_SFT 15
765 #define RT5682S_DMIC_1_EN_MASK (0x1 << 15)
766 #define RT5682S_DMIC_1_EN_SFT 15
767 #define RT5682S_DMIC_1_DIS (0x0 << 15)
768 #define RT5682S_DMIC_1_EN (0x1 << 15)
779 #define RT5682S_SEL_ADCDAT_MASK (0x1 << 15)
780 #define RT5682S_SEL_ADCDAT_OUT (0x0 << 15)
781 #define RT5682S_SEL_ADCDAT_IN (0x1 << 15)
782 #define RT5682S_SEL_ADCDAT_SFT 15
790 #define RT5682S_I2S1_RX_CHL_MASK (0x7 << 8)
791 #define RT5682S_I2S1_RX_CHL_SFT 8
792 #define RT5682S_I2S1_RX_CHL_16 (0x0 << 8)
793 #define RT5682S_I2S1_RX_CHL_20 (0x1 << 8)
794 #define RT5682S_I2S1_RX_CHL_24 (0x2 << 8)
795 #define RT5682S_I2S1_RX_CHL_32 (0x3 << 8)
796 #define RT5682S_I2S1_RX_CHL_8 (0x4 << 8)
809 #define RT5682S_I2S2_MS_MASK (0x1 << 15)
810 #define RT5682S_I2S2_MS_SFT 15
811 #define RT5682S_I2S2_MS_M (0x0 << 15)
812 #define RT5682S_I2S2_MS_S (0x1 << 15)
819 #define RT5682S_I2S_BP_MASK (0x1 << 8)
820 #define RT5682S_I2S_BP_SFT 8
821 #define RT5682S_I2S_BP_NOR (0x0 << 8)
822 #define RT5682S_I2S_BP_INV (0x1 << 8)
855 #define RT5682S_I2S_M_D_MASK (0xf << 8)
856 #define RT5682S_I2S_M_D_SFT 8
857 #define RT5682S_I2S_M_D_1 (0x0 << 8)
858 #define RT5682S_I2S_M_D_2 (0x1 << 8)
859 #define RT5682S_I2S_M_D_3 (0x2 << 8)
860 #define RT5682S_I2S_M_D_4 (0x3 << 8)
861 #define RT5682S_I2S_M_D_6 (0x4 << 8)
862 #define RT5682S_I2S_M_D_8 (0x5 << 8)
863 #define RT5682S_I2S_M_D_12 (0x6 << 8)
864 #define RT5682S_I2S_M_D_16 (0x7 << 8)
865 #define RT5682S_I2S_M_D_24 (0x8 << 8)
866 #define RT5682S_I2S_M_D_32 (0x9 << 8)
867 #define RT5682S_I2S_M_D_48 (0x10 << 8)
896 #define RT5682S_TDM_RX_CH_MASK (0x3 << 8)
897 #define RT5682S_TDM_RX_CH_2 (0x0 << 8)
898 #define RT5682S_TDM_RX_CH_4 (0x1 << 8)
899 #define RT5682S_TDM_RX_CH_6 (0x2 << 8)
900 #define RT5682S_TDM_RX_CH_8 (0x3 << 8)
910 #define RT5682S_IF1_ADC4_SEL_SFT 8
917 #define RT5682S_TDM_S_BP_MASK (0x1 << 15)
918 #define RT5682S_TDM_S_BP_SFT 15
919 #define RT5682S_TDM_S_BP_NOR (0x0 << 15)
920 #define RT5682S_TDM_S_BP_INV (0x1 << 15)
933 #define RT5682S_TDM_BCLK_MS1_MASK (0x3 << 8)
934 #define RT5682S_TDM_BCLK_MS1_SFT 8
935 #define RT5682S_TDM_BCLK_MS1_32 (0x0 << 8)
936 #define RT5682S_TDM_BCLK_MS1_64 (0x1 << 8)
937 #define RT5682S_TDM_BCLK_MS1_128 (0x2 << 8)
938 #define RT5682S_TDM_BCLK_MS1_256 (0x3 << 8)
939 #define RT5682S_TDM_BCLK_MS1_16 (0x4 << 8)
961 #define RT5682S_PLL_SRC_MASK (0x3 << 8)
962 #define RT5682S_PLL_SRC_SFT 8
963 #define RT5682S_PLL_SRC_MCLK (0x0 << 8)
964 #define RT5682S_PLL_SRC_BCLK1 (0x1 << 8)
965 #define RT5682S_PLL_SRC_RC (0x3 << 8)
972 #define RT5682S_AD_ASRC_MASK (0x1 << 8)
973 #define RT5682S_AD_ASRC_SFT 8
986 #define RT5682S_FILTER_CLK_DIV_MASK (0xf << 8)
987 #define RT5682S_FILTER_CLK_DIV_SFT 8
994 #define RT5682S_ASRCIN_FTK_M1_MASK (0x7 << 8)
995 #define RT5682S_ASRCIN_FTK_M1_SFT 8
1051 #define RT5682S_PM_HP_MASK (0x3 << 8)
1052 #define RT5682S_PM_HP_SFT 8
1053 #define RT5682S_PM_HP_LV (0x0 << 8)
1054 #define RT5682S_PM_HP_MV (0x1 << 8)
1055 #define RT5682S_PM_HP_HV (0x2 << 8)
1064 #define RT5682S_MIC2_OV_MASK (0x3 << 8)
1065 #define RT5682S_MIC2_OV_SFT 8
1066 #define RT5682S_MIC2_OV_2V7 (0x0 << 8)
1067 #define RT5682S_MIC2_OV_2V4 (0x1 << 8)
1068 #define RT5682S_MIC2_OV_2V25 (0x3 << 8)
1069 #define RT5682S_MIC2_OV_1V8 (0x4 << 8)
1076 #define RT5682S_PWR_CLK1M_MASK (0x1 << 8)
1077 #define RT5682S_PWR_CLK1M_SFT 8
1078 #define RT5682S_PWR_CLK1M_PD (0x0 << 8)
1079 #define RT5682S_PWR_CLK1M_PU (0x1 << 8)
1085 #define RT5682S_PLLA_M_MASK (0x1f << 8)
1086 #define RT5682S_PLLA_M_SFT 8
1093 #define RT5682S_PLLB_M_MASK (0x1f << 8)
1094 #define RT5682S_PLLB_M_SFT 8
1117 #define RT5682S_POW_IRQ (0x1 << 15)
1144 #define RT5682S_JD1_EN_MASK (0x1 << 15)
1145 #define RT5682S_JD1_EN_SFT 15
1146 #define RT5682S_JD1_DIS (0x0 << 15)
1147 #define RT5682S_JD1_EN (0x1 << 15)
1179 #define RT5682S_GP4_PIN_MASK (0x3 << 8)
1180 #define RT5682S_GP4_PIN_SFT 8
1181 #define RT5682S_GP4_PIN_GPIO4 (0x0 << 8)
1182 #define RT5682S_GP4_PIN_ADCDAT1 (0x1 << 8)
1183 #define RT5682S_GP4_PIN_DMIC_CLK (0x2 << 8)
1184 #define RT5682S_GP4_PIN_ADCDAT2 (0x3 << 8)
1196 #define RT5682S_GP1_PF_MASK (0x1 << 15)
1197 #define RT5682S_GP1_PF_IN (0x0 << 15)
1198 #define RT5682S_GP1_PF_OUT (0x1 << 15)
1217 #define RT5682S_GP4_OUT_MASK (0x1 << 8)
1218 #define RT5682S_GP4_OUT_L (0x0 << 8)
1219 #define RT5682S_GP4_OUT_H (0x1 << 8)
1248 #define RT5682S_4BTN_IL_MASK (0x1 << 15)
1249 #define RT5682S_4BTN_IL_EN (0x1 << 15)
1250 #define RT5682S_4BTN_IL_DIS (0x0 << 15)
1256 #define RT5682S_4BTN_IL_HOLD_WIN_MASK (0x7f << 8)
1257 #define RT5682S_4BTN_IL_HOLD_WIN_SFT 8
1290 #define RT5682S_PAD_DRV_GP4_MASK (0x1 << 8)
1291 #define RT5682S_PAD_DRV_GP4_HIGH (0x1 << 8)
1292 #define RT5682S_PAD_DRV_GP4_LOW (0x0 << 8)
1313 #define RT5682S_SEL_CLK_VOL_MASK (0x1 << 15)
1314 #define RT5682S_SEL_CLK_VOL_EN (0x1 << 15)
1315 #define RT5682S_SEL_CLK_VOL_DIS (0x0 << 15)
1322 #define RT5682S_NG2_EN_MASK (0x1 << 15)
1323 #define RT5682S_NG2_EN (0x1 << 15)
1324 #define RT5682S_NG2_DIS (0x0 << 15)
1338 #define RT5682S_SAR_BUTDET_MASK (0x1 << 15)
1339 #define RT5682S_SAR_BUTDET_EN (0x1 << 15)
1340 #define RT5682S_SAR_BUTDET_DIS (0x0 << 15)
1356 #define RT5682S_SAR_SEL_MB1_2_MASK (0x3 << 8)
1357 #define RT5682S_SAR_SEL_MB1_2_SFT 8