Lines Matching +full:asrc +full:- +full:clk +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682s.c -- RT5682I-VS ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
38 .dai_clk_names[RT5682S_DAI_WCLK_IDX] = "rt5682-dai-wclk",
39 .dai_clk_names[RT5682S_DAI_BCLK_IDX] = "rt5682-dai-bclk",
46 [RT5682S_SUPPLY_LDO1_IN] = "LDO1-IN",
69 ret = regmap_multi_reg_write(rt5682s->regmap, patch_list, ARRAY_SIZE(patch_list));
624 regmap_write(rt5682s->regmap, RT5682S_RESET, 0);
634 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type);
651 mutex_lock(&rt5682s->sar_mutex);
694 dev_err(component->dev, "Invalid SAR Power mode: %d\n", mode);
698 mutex_unlock(&rt5682s->sar_mutex);
732 * rt5682s_headset_detect - Detect headset.
781 dev_dbg(component->dev, "%s, val=%d, count=%d\n", __func__, val, count);
809 if (!rt5682s->wclk_enabled) {
823 dev_dbg(component->dev, "jack_type = %d\n", jack_type);
835 if (!rt5682s->component ||
836 !snd_soc_card_is_instantiated(rt5682s->component->card)) {
839 &rt5682s->jack_detect_work, msecs_to_jiffies(15));
843 dapm = snd_soc_component_get_dapm(rt5682s->component);
846 mutex_lock(&rt5682s->calibrate_mutex);
847 mutex_lock(&rt5682s->wclk_mutex);
849 val = snd_soc_component_read(rt5682s->component, RT5682S_AJD1_CTRL)
853 if (rt5682s->jack_type == 0) {
855 rt5682s->jack_type = rt5682s_headset_detect(rt5682s->component, 1);
856 rt5682s->irq_work_delay_time = 0;
857 } else if ((rt5682s->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) {
859 rt5682s->jack_type = SND_JACK_HEADSET;
860 btn_type = rt5682s_button_detect(rt5682s->component);
872 rt5682s->jack_type |= SND_JACK_BTN_0;
877 rt5682s->jack_type |= SND_JACK_BTN_1;
882 rt5682s->jack_type |= SND_JACK_BTN_2;
887 rt5682s->jack_type |= SND_JACK_BTN_3;
892 dev_err(rt5682s->component->dev,
899 rt5682s->jack_type = rt5682s_headset_detect(rt5682s->component, 0);
900 rt5682s->irq_work_delay_time = 50;
903 mutex_unlock(&rt5682s->wclk_mutex);
904 mutex_unlock(&rt5682s->calibrate_mutex);
907 snd_soc_jack_report(rt5682s->hs_jack, rt5682s->jack_type,
911 if (rt5682s->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
913 schedule_delayed_work(&rt5682s->jd_check_work, 0);
915 cancel_delayed_work_sync(&rt5682s->jd_check_work);
923 if (snd_soc_component_read(rt5682s->component, RT5682S_AJD1_CTRL) & RT5682S_JDH_RS_MASK) {
925 schedule_delayed_work(&rt5682s->jack_detect_work, 0);
927 schedule_delayed_work(&rt5682s->jd_check_work, 500);
935 mod_delayed_work(system_power_efficient_wq, &rt5682s->jack_detect_work,
936 msecs_to_jiffies(rt5682s->irq_work_delay_time));
947 rt5682s->hs_jack = hs_jack;
950 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
952 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
954 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
959 switch (rt5682s->pdata.jd_src) {
961 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_5,
963 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_2,
965 regmap_update_bits(rt5682s->regmap, RT5682S_CBJ_CTRL_1,
970 regmap_update_bits(rt5682s->regmap, RT5682S_SAR_IL_CMD_1,
972 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
974 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_3,
976 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_2,
978 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
980 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
983 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_4,
986 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_5,
989 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_6,
992 regmap_update_bits(rt5682s->regmap, RT5682S_4BTN_IL_CMD_7,
997 &rt5682s->jack_detect_work, msecs_to_jiffies(250));
1001 regmap_update_bits(rt5682s->regmap, RT5682S_IRQ_CTRL_2,
1003 regmap_update_bits(rt5682s->regmap, RT5682S_RC_CLK_CTRL,
1008 dev_warn(component->dev, "Wrong JD source\n");
1015 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -9562, 75, 0);
1016 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
1018 static const DECLARE_TLV_DB_SCALE(cbj_bst_tlv, -1200, 150, 0);
1041 * rt5682s_sel_asrc_clk_src - select ASRC clock source for a set of filters
1046 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5682S can
1047 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
1049 * ASRC function will track i2s clock and generate a corresponding system clock
1052 * ASRC for these filters if ASRC is selected as their clock source.
1064 return -EINVAL;
1089 if (rt5682s->sysclk < target) {
1090 dev_err(rt5682s->component->dev,
1091 "sysclk rate %d is too low\n", rt5682s->sysclk);
1095 for (i = 0; i < size - 1; i++) {
1096 dev_dbg(rt5682s->component->dev, "div[%d]=%d\n", i, div[i]);
1097 if (target * div[i] == rt5682s->sysclk)
1099 if (target * div[i + 1] > rt5682s->sysclk) {
1100 dev_dbg(rt5682s->component->dev,
1101 "can't find div for sysclk %d\n", rt5682s->sysclk);
1106 if (target * div[i] < rt5682s->sysclk)
1107 dev_err(rt5682s->component->dev,
1108 "sysclk rate %d is too high\n", rt5682s->sysclk);
1110 return size - 1;
1119 return -EINVAL;
1126 return -EINVAL;
1130 * set_dmic_clk - Set parameter of dmic.
1142 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1147 if (rt5682s->pdata.dmic_clk_rate)
1148 dmic_clk_rate = rt5682s->pdata.dmic_clk_rate;
1161 struct snd_soc_component *component = rt5682s->component;
1181 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1185 if (rt5682s->wclk_enabled)
1198 struct snd_soc_component *component = rt5682s->component;
1210 if (rt5682s->sysclk <= 12288000 * div_o[idx])
1222 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1229 if (w->shift == RT5682S_PWR_ADC_S1F_BIT && val == RT5682S_GP4_PIN_ADCDAT2)
1230 ref = 256 * rt5682s->lrck[RT5682S_AIF2];
1232 ref = 256 * rt5682s->lrck[RT5682S_AIF1];
1234 if (w->shift == RT5682S_PWR_ADC_S1F_BIT)
1247 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1251 if (rt5682s->pdata.dmic_delay)
1252 delay = rt5682s->pdata.dmic_delay;
1268 if (!rt5682s->jack_type && !rt5682s->wclk_enabled) {
1280 struct snd_soc_component *component = rt5682s->component;
1301 if (on && rt5682s->master[id]) {
1302 pre_div = get_clk_info(rt5682s->sysclk, rt5682s->lrck[id]);
1304 dev_err(component->dev, "get pre_div failed\n");
1308 dev_dbg(component->dev, "lrck is %dHz and pre_div is %d for iis %d master\n",
1309 rt5682s->lrck[id], pre_div, id);
1319 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1326 if (!snd_soc_dapm_widget_name_cmp(w, "I2S1") && !rt5682s->wclk_enabled)
1337 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1340 if ((rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL1) ||
1341 (rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL2 && rt5682s->pll_comb == USE_PLLAB))
1350 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1353 if (rt5682s->sysclk_src == RT5682S_CLK_SRC_PLL2)
1363 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1365 switch (w->shift) {
1391 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1436 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1440 if (rt5682s->pdata.amic_delay)
1441 delay = rt5682s->pdata.amic_delay;
1461 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1464 if ((rt5682s->jack_type & SND_JACK_HEADSET) != SND_JACK_HEADSET)
1569 /* MX-26 [13] [5] */
1587 /* MX-26 [11:10] [3:2] */
1605 /* MX-26 [12] [4] */
1622 /* MX-79 [6:4] I2S1 ADC data location */
1639 /* MX-2B [4], MX-2B [0]*/
1691 /* ASRC */
1692 SND_SOC_DAPM_SUPPLY_S("DAC STO1 ASRC", 1, RT5682S_PLL_TRACK_1,
1694 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5682S_PLL_TRACK_1,
1696 SND_SOC_DAPM_SUPPLY_S("AD ASRC", 1, RT5682S_PLL_TRACK_1,
1698 SND_SOC_DAPM_SUPPLY_S("DA ASRC", 1, RT5682S_PLL_TRACK_1,
1700 SND_SOC_DAPM_SUPPLY_S("DMIC ASRC", 1, RT5682S_PLL_TRACK_1,
1715 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1830 /* CLK DET */
1857 /*ASRC*/
1858 {"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
1859 {"DAC Stereo1 Filter", NULL, "DAC STO1 ASRC", is_using_asrc},
1860 {"ADC STO1 ASRC", NULL, "AD ASRC"},
1861 {"ADC STO1 ASRC", NULL, "DA ASRC"},
1862 {"DAC STO1 ASRC", NULL, "AD ASRC"},
1863 {"DAC STO1 ASRC", NULL, "DA ASRC"},
1882 {"DMIC L1", NULL, "DMIC CLK"},
1884 {"DMIC R1", NULL, "DMIC CLK"},
1886 {"DMIC CLK", NULL, "DMIC ASRC"},
1983 struct snd_soc_component *component = dai->component;
1997 dev_err(component->dev, "Invalid or oversized Tx slots.\n");
1998 return -EINVAL;
2000 val |= (tx_slotnum - 1) << RT5682S_TDM_ADC_DL_SFT;
2019 return -EINVAL;
2029 return -EINVAL;
2049 return -EINVAL;
2063 struct snd_soc_component *component = dai->component;
2068 rt5682s->lrck[dai->id] = params_rate(params);
2072 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2073 return -EINVAL;
2096 return -EINVAL;
2099 switch (dai->id) {
2121 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2122 return -EINVAL;
2130 struct snd_soc_component *component = dai->component;
2136 rt5682s->master[dai->id] = 1;
2139 rt5682s->master[dai->id] = 0;
2142 return -EINVAL;
2153 if (dai->id == RT5682S_AIF1)
2156 return -EINVAL;
2159 if (dai->id == RT5682S_AIF1)
2163 return -EINVAL;
2166 return -EINVAL;
2185 return -EINVAL;
2188 switch (dai->id) {
2196 tdm_ctrl | rt5682s->master[dai->id]);
2199 if (rt5682s->master[dai->id] == 0)
2206 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2207 return -EINVAL;
2218 if (freq == rt5682s->sysclk && clk_id == rt5682s->sysclk_src)
2235 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2236 return -EINVAL;
2246 rt5682s->sysclk = freq;
2247 rt5682s->sysclk_src = clk_id;
2249 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
2313 for (i = ARRAY_SIZE(plla_table) - 1; i >= 0; i--) {
2315 for (j = ARRAY_SIZE(pllb_table) - 1; j >= 0; j--) {
2326 return -EINVAL;
2336 if (source == rt5682s->pll_src[pll_id] && freq_in == rt5682s->pll_in[pll_id] &&
2337 freq_out == rt5682s->pll_out[pll_id])
2341 dev_dbg(component->dev, "PLL disabled\n");
2342 rt5682s->pll_in[pll_id] = 0;
2343 rt5682s->pll_out[pll_id] = 0;
2359 dev_err(component->dev, "Unknown PLL Source %d\n", source);
2360 return -EINVAL;
2363 rt5682s->pll_comb = find_pll_inter_combination(freq_in, freq_out,
2366 if ((pll_id == RT5682S_PLL1 && rt5682s->pll_comb == USE_PLLA) ||
2367 (pll_id == RT5682S_PLL2 && (rt5682s->pll_comb == USE_PLLB ||
2368 rt5682s->pll_comb == USE_PLLAB))) {
2369 dev_dbg(component->dev,
2370 "Supported freq conversion for PLL%d:(%d->%d): %d\n",
2371 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb);
2373 dev_err(component->dev,
2374 "Unsupported freq conversion for PLL%d:(%d->%d): %d\n",
2375 pll_id + 1, freq_in, freq_out, rt5682s->pll_comb);
2376 return -EINVAL;
2379 if (rt5682s->pll_comb == USE_PLLA || rt5682s->pll_comb == USE_PLLAB) {
2380 dev_dbg(component->dev,
2395 if (rt5682s->pll_comb == USE_PLLB || rt5682s->pll_comb == USE_PLLAB) {
2396 dev_dbg(component->dev,
2415 if (rt5682s->pll_comb == USE_PLLB)
2419 rt5682s->pll_in[pll_id] = freq_in;
2420 rt5682s->pll_out[pll_id] = freq_out;
2421 rt5682s->pll_src[pll_id] = source;
2429 struct snd_soc_component *component = dai->component;
2432 rt5682s->bclk[dai->id] = ratio;
2452 dev_err(dai->dev, "Invalid bclk1 ratio %d\n", ratio);
2453 return -EINVAL;
2461 struct snd_soc_component *component = dai->component;
2464 rt5682s->bclk[dai->id] = ratio;
2476 dev_err(dai->dev, "Invalid bclk2 ratio %d\n", ratio);
2477 return -EINVAL;
2490 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2495 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2499 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1, RT5682S_PWR_LDO, 0);
2500 if (!rt5682s->wclk_enabled)
2501 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_1,
2518 if (!rt5682s->master[RT5682S_AIF1]) {
2519 dev_dbg(rt5682s->component->dev, "dai clk fmt not set correctly\n");
2529 struct snd_soc_component *component = rt5682s->component;
2533 return -EINVAL;
2535 mutex_lock(&rt5682s->wclk_mutex);
2551 ref = 256 * rt5682s->lrck[RT5682S_AIF1];
2555 rt5682s->wclk_enabled = 1;
2557 mutex_unlock(&rt5682s->wclk_mutex);
2566 struct snd_soc_component *component = rt5682s->component;
2571 mutex_lock(&rt5682s->wclk_mutex);
2573 if (!rt5682s->jack_type)
2585 rt5682s->wclk_enabled = 0;
2587 mutex_unlock(&rt5682s->wclk_mutex);
2595 struct snd_soc_component *component = rt5682s->component;
2603 if (rt5682s->lrck[RT5682S_AIF1] != CLK_48 &&
2604 rt5682s->lrck[RT5682S_AIF1] != CLK_44) {
2605 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n",
2610 return rt5682s->lrck[RT5682S_AIF1];
2618 struct snd_soc_component *component = rt5682s->component;
2622 return -EINVAL;
2628 dev_warn(component->dev, "%s: clk %s only support %d or %d Hz output\n",
2641 struct snd_soc_component *component = rt5682s->component;
2642 struct clk *parent_clk;
2647 return -EINVAL;
2650 * Whether the wclk's parent clk (mclk) exists or not, please ensure
2652 * temporary limitation. Only accept 48MHz clk as the clk provider.
2656 parent_clk = clk_get_parent(hw->clk);
2658 dev_warn(component->dev,
2663 dev_warn(component->dev, "clk %s only support %d Hz input\n",
2677 rt5682s->lrck[RT5682S_AIF1] = rate;
2687 struct snd_soc_component *component = rt5682s->component;
2730 return -EINVAL;
2749 struct snd_soc_component *component = rt5682s->component;
2754 return -EINVAL;
2759 if (dai->id == RT5682S_AIF1)
2762 dev_err(component->dev, "dai %d not found in component\n",
2764 return -ENODEV;
2784 struct device *dev = component->dev;
2786 struct rt5682s_platform_data *pdata = &rt5682s->pdata;
2795 dai_clk_hw = &rt5682s->dai_clks_hw[i];
2800 if (rt5682s->mclk) {
2810 parent = &rt5682s->dai_clks_hw[RT5682S_DAI_WCLK_IDX];
2816 return -EINVAL;
2819 init.name = pdata->dai_clk_names[i];
2822 dai_clk_hw->init = &init;
2830 if (dev->of_node) {
2851 rt5682s->mclk = devm_clk_get_optional(component->dev, "mclk");
2852 if (IS_ERR(rt5682s->mclk))
2853 return PTR_ERR(rt5682s->mclk);
2861 rt5682s->lrck[RT5682S_AIF1] = CLK_48;
2876 rt5682s->component = component;
2893 if (rt5682s->irq)
2894 disable_irq(rt5682s->irq);
2896 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
2897 cancel_delayed_work_sync(&rt5682s->jd_check_work);
2899 if (rt5682s->hs_jack)
2900 rt5682s->jack_type = rt5682s_headset_detect(component, 0);
2902 regcache_cache_only(rt5682s->regmap, true);
2903 regcache_mark_dirty(rt5682s->regmap);
2912 regcache_cache_only(rt5682s->regmap, false);
2913 regcache_sync(rt5682s->regmap);
2915 if (rt5682s->hs_jack) {
2917 &rt5682s->jack_detect_work, msecs_to_jiffies(0));
2920 if (rt5682s->irq)
2921 enable_irq(rt5682s->irq);
2964 device_property_read_u32(dev, "realtek,dmic1-data-pin",
2965 &rt5682s->pdata.dmic1_data_pin);
2966 device_property_read_u32(dev, "realtek,dmic1-clk-pin",
2967 &rt5682s->pdata.dmic1_clk_pin);
2968 device_property_read_u32(dev, "realtek,jd-src",
2969 &rt5682s->pdata.jd_src);
2970 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz",
2971 &rt5682s->pdata.dmic_clk_rate);
2972 device_property_read_u32(dev, "realtek,dmic-delay-ms",
2973 &rt5682s->pdata.dmic_delay);
2974 device_property_read_u32(dev, "realtek,amic-delay-ms",
2975 &rt5682s->pdata.amic_delay);
2976 device_property_read_u32(dev, "realtek,ldo-sel",
2977 &rt5682s->pdata.ldo_dacref);
2979 if (device_property_read_string_array(dev, "clock-output-names",
2980 rt5682s->pdata.dai_clk_names,
2982 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
2983 rt5682s->pdata.dai_clk_names[RT5682S_DAI_WCLK_IDX],
2984 rt5682s->pdata.dai_clk_names[RT5682S_DAI_BCLK_IDX]);
2986 rt5682s->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
2987 "realtek,dmic-clk-driving-high");
2996 mutex_lock(&rt5682s->calibrate_mutex);
2998 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0xaa80);
3000 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0xfa80);
3001 regmap_write(rt5682s->regmap, RT5682S_PWR_DIG_1, 0x01c0);
3002 regmap_write(rt5682s->regmap, RT5682S_MICBIAS_2, 0x0380);
3003 regmap_write(rt5682s->regmap, RT5682S_GLB_CLK, 0x8000);
3004 regmap_write(rt5682s->regmap, RT5682S_ADDA_CLK_1, 0x1001);
3005 regmap_write(rt5682s->regmap, RT5682S_CHOP_DAC_2, 0x3030);
3006 regmap_write(rt5682s->regmap, RT5682S_CHOP_ADC, 0xb000);
3007 regmap_write(rt5682s->regmap, RT5682S_STO1_ADC_MIXER, 0x686c);
3008 regmap_write(rt5682s->regmap, RT5682S_CAL_REC, 0x5151);
3009 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_2, 0x0321);
3010 regmap_write(rt5682s->regmap, RT5682S_HP_LOGIC_CTRL_2, 0x0004);
3011 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_1, 0x7c00);
3012 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_1, 0xfc00);
3015 regmap_read(rt5682s->regmap, RT5682S_HP_CALIB_ST_1, &value);
3023 dev_err(rt5682s->component->dev, "HP Calibration Failure\n");
3026 regmap_write(rt5682s->regmap, RT5682S_MICBIAS_2, 0x0180);
3027 regmap_write(rt5682s->regmap, RT5682S_CAL_REC, 0x5858);
3028 regmap_write(rt5682s->regmap, RT5682S_STO1_ADC_MIXER, 0xc0c4);
3029 regmap_write(rt5682s->regmap, RT5682S_HP_CALIB_CTRL_2, 0x0320);
3030 regmap_write(rt5682s->regmap, RT5682S_PWR_DIG_1, 0x00c0);
3031 regmap_write(rt5682s->regmap, RT5682S_PWR_ANLG_1, 0x0800);
3032 regmap_write(rt5682s->regmap, RT5682S_GLB_CLK, 0x0000);
3034 mutex_unlock(&rt5682s->calibrate_mutex);
3052 .name = "rt5682s-aif1",
3071 .name = "rt5682s-aif2",
3087 struct device *dev = regmap_get_device(rt5682s->regmap);
3090 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_AVDD].consumer);
3094 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_DBVDD].consumer);
3098 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_LDO1_IN].consumer);
3100 dev_err(dev, "Failed to disable supply LDO1-IN: %d\n", ret);
3104 ret = regulator_disable(rt5682s->supplies[RT5682S_SUPPLY_MICVDD].consumer);
3111 struct rt5682s_platform_data *pdata = dev_get_platdata(&i2c->dev);
3116 rt5682s = devm_kzalloc(&i2c->dev, sizeof(struct rt5682s_priv), GFP_KERNEL);
3118 return -ENOMEM;
3122 rt5682s->pdata = i2s_default_platform_data;
3125 rt5682s->pdata = *pdata;
3127 rt5682s_parse_dt(rt5682s, &i2c->dev);
3129 rt5682s->regmap = devm_regmap_init_i2c(i2c, &rt5682s_regmap);
3130 if (IS_ERR(rt5682s->regmap)) {
3131 ret = PTR_ERR(rt5682s->regmap);
3132 dev_err(&i2c->dev, "Failed to allocate register map: %d\n", ret);
3136 for (i = 0; i < ARRAY_SIZE(rt5682s->supplies); i++)
3137 rt5682s->supplies[i].supply = rt5682s_supply_names[i];
3139 ret = devm_regulator_bulk_get(&i2c->dev,
3140 ARRAY_SIZE(rt5682s->supplies), rt5682s->supplies);
3142 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
3146 ret = devm_add_action_or_reset(&i2c->dev, rt5682s_i2c_disable_regulators, rt5682s);
3150 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_MICVDD].consumer);
3152 dev_err(&i2c->dev, "Failed to enable supply MICVDD: %d\n", ret);
3157 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_AVDD].consumer);
3159 dev_err(&i2c->dev, "Failed to enable supply AVDD: %d\n", ret);
3163 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_DBVDD].consumer);
3165 dev_err(&i2c->dev, "Failed to enable supply DBVDD: %d\n", ret);
3169 ret = regulator_enable(rt5682s->supplies[RT5682S_SUPPLY_LDO1_IN].consumer);
3171 dev_err(&i2c->dev, "Failed to enable supply LDO1-IN: %d\n", ret);
3175 rt5682s->ldo1_en = devm_gpiod_get_optional(&i2c->dev,
3176 "realtek,ldo1-en",
3178 if (IS_ERR(rt5682s->ldo1_en)) {
3179 dev_err(&i2c->dev, "Fail gpio request ldo1_en\n");
3180 return PTR_ERR(rt5682s->ldo1_en);
3186 regmap_read(rt5682s->regmap, RT5682S_DEVICE_ID, &val);
3188 dev_err(&i2c->dev, "Device with ID register %x is not rt5682s\n", val);
3189 return -ENODEV;
3193 rt5682s_apply_patch_list(rt5682s, &i2c->dev);
3195 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_DIG_2,
3199 mutex_init(&rt5682s->calibrate_mutex);
3200 mutex_init(&rt5682s->sar_mutex);
3201 mutex_init(&rt5682s->wclk_mutex);
3204 regmap_update_bits(rt5682s->regmap, RT5682S_MICBIAS_2,
3207 regmap_update_bits(rt5682s->regmap, RT5682S_PWR_ANLG_1,
3209 regmap_update_bits(rt5682s->regmap, RT5682S_HP_LOGIC_CTRL_2,
3211 regmap_update_bits(rt5682s->regmap, RT5682S_HP_CHARGE_PUMP_2,
3213 regmap_update_bits(rt5682s->regmap, RT5682S_HP_AMP_DET_CTL_1,
3217 switch (rt5682s->pdata.dmic1_data_pin) {
3221 regmap_update_bits(rt5682s->regmap, RT5682S_DMIC_CTRL_1,
3223 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3227 regmap_update_bits(rt5682s->regmap, RT5682S_DMIC_CTRL_1,
3229 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3233 dev_warn(&i2c->dev, "invalid DMIC_DAT pin\n");
3237 /* DMIC clk pin */
3238 switch (rt5682s->pdata.dmic1_clk_pin) {
3242 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3246 regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
3248 if (rt5682s->pdata.dmic_clk_driving_high)
3249 regmap_update_bits(rt5682s->regmap, RT5682S_PAD_DRIVING_CTRL,
3253 dev_warn(&i2c->dev, "invalid DMIC_CLK pin\n");
3258 switch (rt5682s->pdata.ldo_dacref) {
3262 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3266 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3270 regmap_update_bits(rt5682s->regmap, RT5682S_BIAS_CUR_CTRL_7,
3274 dev_warn(&i2c->dev, "invalid LDO output setting.\n");
3278 INIT_DELAYED_WORK(&rt5682s->jack_detect_work, rt5682s_jack_detect_handler);
3279 INIT_DELAYED_WORK(&rt5682s->jd_check_work, rt5682s_jd_check_handler);
3281 if (i2c->irq) {
3282 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rt5682s_irq,
3286 rt5682s->irq = i2c->irq;
3288 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
3291 return devm_snd_soc_register_component(&i2c->dev, &rt5682s_soc_component_dev,
3299 disable_irq(client->irq);
3300 cancel_delayed_work_sync(&rt5682s->jack_detect_work);
3301 cancel_delayed_work_sync(&rt5682s->jd_check_work);
3343 MODULE_DESCRIPTION("ASoC RT5682I-VS driver");