Lines Matching +full:rt5682 +full:- +full:dai +full:- +full:bclk
1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt5682.c -- RT5682 ALSA SoC audio component driver
25 #include <sound/soc-dapm.h>
28 #include <sound/rt5682.h>
31 #include "rt5682.h"
38 "LDO1-IN",
56 void rt5682_apply_patch_list(struct rt5682_priv *rt5682, struct device *dev)
60 ret = regmap_multi_reg_write(rt5682->regmap, patch_list,
751 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -6525, 75, 0);
752 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -1725, 75, 0);
817 void rt5682_reset(struct rt5682_priv *rt5682)
819 regmap_write(rt5682->regmap, RT5682_RESET, 0);
820 if (!rt5682->is_sdw)
821 regmap_write(rt5682->regmap, RT5682_I2C_MODE, 1);
826 * rt5682_sel_asrc_clk_src - select ASRC clock source for a set of filters
831 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5682 can
849 return -EINVAL;
875 dev_dbg(component->dev, "%s btn_type=%x\n", __func__, btn_type);
885 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
896 if (rt5682->is_sdw)
920 * rt5682_headset_detect - Detect headset.
930 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
931 struct snd_soc_dapm_context *dapm = &component->dapm;
968 rt5682->jack_type = SND_JACK_HEADSET;
974 rt5682->jack_type = SND_JACK_HEADPHONE;
1007 rt5682->jack_type = 0;
1010 dev_dbg(component->dev, "jack_type = %d\n", rt5682->jack_type);
1011 return rt5682->jack_type;
1017 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
1019 rt5682->hs_jack = hs_jack;
1021 if (rt5682->is_sdw && !rt5682->first_hw_init)
1025 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
1027 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
1029 cancel_delayed_work_sync(&rt5682->jack_detect_work);
1034 if (!rt5682->is_sdw) {
1035 switch (rt5682->pdata.jd_src) {
1050 regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
1052 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
1056 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_2,
1058 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
1061 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_4,
1062 0x7f7f, (rt5682->pdata.btndet_delay << 8 |
1063 rt5682->pdata.btndet_delay));
1064 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_5,
1065 0x7f7f, (rt5682->pdata.btndet_delay << 8 |
1066 rt5682->pdata.btndet_delay));
1067 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_6,
1068 0x7f7f, (rt5682->pdata.btndet_delay << 8 |
1069 rt5682->pdata.btndet_delay));
1070 regmap_update_bits(rt5682->regmap, RT5682_4BTN_IL_CMD_7,
1071 0x7f7f, (rt5682->pdata.btndet_delay << 8 |
1072 rt5682->pdata.btndet_delay));
1074 &rt5682->jack_detect_work,
1079 regmap_update_bits(rt5682->regmap, RT5682_IRQ_CTRL_2,
1081 regmap_update_bits(rt5682->regmap, RT5682_RC_CLK_CTRL,
1086 dev_warn(component->dev, "Wrong JD source\n");
1096 struct rt5682_priv *rt5682 =
1101 if (!rt5682->component ||
1102 !snd_soc_card_is_instantiated(rt5682->component->card)) {
1105 &rt5682->jack_detect_work, msecs_to_jiffies(15));
1109 if (rt5682->is_sdw) {
1110 if (pm_runtime_status_suspended(rt5682->slave->dev.parent)) {
1111 dev_dbg(&rt5682->slave->dev,
1118 dapm = snd_soc_component_get_dapm(rt5682->component);
1121 mutex_lock(&rt5682->calibrate_mutex);
1123 val = snd_soc_component_read(rt5682->component, RT5682_AJD1_CTRL)
1127 if (rt5682->jack_type == 0) {
1129 rt5682->jack_type =
1130 rt5682_headset_detect(rt5682->component, 1);
1131 rt5682->irq_work_delay_time = 0;
1132 } else if ((rt5682->jack_type & SND_JACK_HEADSET) ==
1135 rt5682->jack_type = SND_JACK_HEADSET;
1136 btn_type = rt5682_button_detect(rt5682->component);
1138 * rt5682 can report three kinds of button behavior,
1148 rt5682->jack_type |= SND_JACK_BTN_0;
1153 rt5682->jack_type |= SND_JACK_BTN_1;
1158 rt5682->jack_type |= SND_JACK_BTN_2;
1163 rt5682->jack_type |= SND_JACK_BTN_3;
1168 dev_err(rt5682->component->dev,
1176 rt5682->jack_type = rt5682_headset_detect(rt5682->component, 0);
1177 rt5682->irq_work_delay_time = 50;
1180 mutex_unlock(&rt5682->calibrate_mutex);
1183 snd_soc_jack_report(rt5682->hs_jack, rt5682->jack_type,
1188 if (!rt5682->is_sdw) {
1189 if (rt5682->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1191 schedule_delayed_work(&rt5682->jd_check_work, 0);
1193 cancel_delayed_work_sync(&rt5682->jd_check_work);
1219 static int rt5682_div_sel(struct rt5682_priv *rt5682,
1224 if (rt5682->sysclk < target) {
1225 dev_err(rt5682->component->dev,
1226 "sysclk rate %d is too low\n", rt5682->sysclk);
1230 for (i = 0; i < size - 1; i++) {
1231 dev_dbg(rt5682->component->dev, "div[%d]=%d\n", i, div[i]);
1232 if (target * div[i] == rt5682->sysclk)
1234 if (target * div[i + 1] > rt5682->sysclk) {
1235 dev_dbg(rt5682->component->dev,
1237 rt5682->sysclk);
1242 if (target * div[i] < rt5682->sysclk)
1243 dev_err(rt5682->component->dev,
1244 "sysclk rate %d is too high\n", rt5682->sysclk);
1246 return size - 1;
1250 * set_dmic_clk - Set parameter of dmic.
1263 snd_soc_dapm_to_component(w->dapm);
1264 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
1268 if (rt5682->pdata.dmic_clk_rate)
1269 dmic_clk_rate = rt5682->pdata.dmic_clk_rate;
1271 idx = rt5682_div_sel(rt5682, dmic_clk_rate, div, ARRAY_SIZE(div));
1283 snd_soc_dapm_to_component(w->dapm);
1284 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
1289 if (rt5682->is_sdw)
1294 if (w->shift == RT5682_PWR_ADC_S1F_BIT &&
1296 ref = 256 * rt5682->lrck[RT5682_AIF2];
1298 ref = 256 * rt5682->lrck[RT5682_AIF1];
1300 idx = rt5682_div_sel(rt5682, ref, div_f, ARRAY_SIZE(div_f));
1302 if (w->shift == RT5682_PWR_ADC_S1F_BIT)
1312 if (rt5682->sysclk <= 12288000 * div_o[idx])
1328 snd_soc_dapm_to_component(w->dapm);
1343 snd_soc_dapm_to_component(w->dapm);
1358 snd_soc_dapm_to_component(w->dapm);
1360 switch (w->shift) {
1433 /* MX-26 [13] [5] */
1453 /* MX-26 [11:10] [3:2] */
1473 /* MX-26 [12] [4] */
1492 /* MX-79 [6:4] I2S1 ADC data location */
1512 /* MX-2B [4], MX-2B [0]*/
1543 snd_soc_dapm_to_component(w->dapm);
1582 snd_soc_dapm_to_component(w->dapm);
1583 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
1586 if (rt5682->pdata.dmic_delay)
1587 delay = rt5682->pdata.dmic_delay;
1604 if (!rt5682->jack_type) {
1605 if (!snd_soc_dapm_get_pin_status(w->dapm, "MICBIAS"))
1608 if (!snd_soc_dapm_get_pin_status(w->dapm, "Vref2"))
1622 snd_soc_dapm_to_component(w->dapm);
1626 switch (w->shift) {
1641 switch (w->shift) {
2063 static int rt5682_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2066 struct snd_soc_component *component = dai->component;
2092 return -EINVAL;
2101 return -EINVAL;
2121 return -EINVAL;
2133 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2135 struct snd_soc_component *component = dai->component;
2136 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2140 rt5682->lrck[dai->id] = params_rate(params);
2141 pre_div = rl6231_get_clk_info(rt5682->sysclk, rt5682->lrck[dai->id]);
2145 dev_err(component->dev, "Unsupported frame size: %d\n",
2147 return -EINVAL;
2150 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
2151 rt5682->lrck[dai->id], pre_div, dai->id);
2173 return -EINVAL;
2176 switch (dai->id) {
2180 if (rt5682->master[RT5682_AIF1]) {
2185 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT);
2199 if (rt5682->master[RT5682_AIF2]) {
2214 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2215 return -EINVAL;
2221 static int rt5682_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2223 struct snd_soc_component *component = dai->component;
2224 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2229 rt5682->master[dai->id] = 1;
2232 rt5682->master[dai->id] = 0;
2235 return -EINVAL;
2246 if (dai->id == RT5682_AIF1)
2249 return -EINVAL;
2252 if (dai->id == RT5682_AIF1)
2256 return -EINVAL;
2259 return -EINVAL;
2278 return -EINVAL;
2281 switch (dai->id) {
2289 tdm_ctrl | rt5682->master[dai->id]);
2292 if (rt5682->master[dai->id] == 0)
2299 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2300 return -EINVAL;
2308 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2311 if (freq == rt5682->sysclk && clk_id == rt5682->sysclk_src)
2332 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2333 return -EINVAL;
2338 if (rt5682->master[RT5682_AIF2]) {
2344 rt5682->sysclk = freq;
2345 rt5682->sysclk_src = clk_id;
2347 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
2357 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2362 if (source == rt5682->pll_src[pll_id] &&
2363 freq_in == rt5682->pll_in[pll_id] &&
2364 freq_out == rt5682->pll_out[pll_id])
2368 dev_dbg(component->dev, "PLL disabled\n");
2370 rt5682->pll_in[pll_id] = 0;
2371 rt5682->pll_out[pll_id] = 0;
2385 dev_err(component->dev, "Unknown PLL2 Source %d\n",
2387 return -EINVAL;
2397 dev_err(component->dev, "Unsupported input clock %d\n",
2401 dev_dbg(component->dev, "PLL2F: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n",
2409 dev_err(component->dev, "Unsupported input clock %d\n",
2413 dev_dbg(component->dev, "PLL2B: fin=%d fout=%d bypass=%d m=%d n=%d k=%d\n",
2453 dev_err(component->dev, "Unknown PLL1 Source %d\n",
2455 return -EINVAL;
2460 dev_err(component->dev, "Unsupported input clock %d\n",
2465 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2476 rt5682->pll_in[pll_id] = freq_in;
2477 rt5682->pll_out[pll_id] = freq_out;
2478 rt5682->pll_src[pll_id] = source;
2483 static int rt5682_set_bclk1_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2485 struct snd_soc_component *component = dai->component;
2486 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2488 rt5682->bclk[dai->id] = ratio;
2508 dev_err(dai->dev, "Invalid bclk1 ratio %d\n", ratio);
2509 return -EINVAL;
2515 static int rt5682_set_bclk2_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2517 struct snd_soc_component *component = dai->component;
2518 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2520 rt5682->bclk[dai->id] = ratio;
2534 dev_err(dai->dev, "Invalid bclk2 ratio %d\n", ratio);
2535 return -EINVAL;
2544 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2548 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
2550 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1,
2556 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1,
2560 regmap_update_bits(rt5682->regmap, RT5682_PWR_DIG_1,
2562 regmap_update_bits(rt5682->regmap, RT5682_PWR_ANLG_1,
2577 static bool rt5682_clk_check(struct rt5682_priv *rt5682)
2579 if (!rt5682->master[RT5682_AIF1]) {
2580 dev_dbg(rt5682->i2c_dev, "sysclk/dai not set correctly\n");
2588 struct rt5682_priv *rt5682 =
2594 if (!rt5682_clk_check(rt5682))
2595 return -EINVAL;
2597 component = rt5682->component;
2626 struct rt5682_priv *rt5682 =
2632 if (!rt5682_clk_check(rt5682))
2635 component = rt5682->component;
2642 if (!rt5682->jack_type)
2658 struct rt5682_priv *rt5682 =
2663 if (!rt5682_clk_check(rt5682))
2668 if (rt5682->lrck[RT5682_AIF1] != CLK_48 &&
2669 rt5682->lrck[RT5682_AIF1] != CLK_44) {
2670 dev_warn(rt5682->i2c_dev, "%s: clk %s only support %d or %d Hz output\n",
2675 return rt5682->lrck[RT5682_AIF1];
2681 struct rt5682_priv *rt5682 =
2686 if (!rt5682_clk_check(rt5682))
2687 return -EINVAL;
2693 dev_warn(rt5682->i2c_dev, "%s: clk %s only support %d or %d Hz output\n",
2704 struct rt5682_priv *rt5682 =
2713 if (!rt5682_clk_check(rt5682))
2714 return -EINVAL;
2716 component = rt5682->component;
2727 dev_warn(rt5682->i2c_dev,
2732 dev_warn(rt5682->i2c_dev, "clk %s only support %d Hz input\n",
2746 rt5682->lrck[RT5682_AIF1] = rate;
2748 pre_div = rl6231_get_clk_info(rt5682->sysclk, rate);
2753 (rt5682->sysclk_src) << RT5682_I2S_CLK_SRC_SFT);
2761 struct rt5682_priv *rt5682 =
2766 regmap_read(rt5682->regmap, RT5682_TDM_TCON_CTRL, &bclks_per_wclk);
2801 struct rt5682_priv *rt5682 =
2806 if (!*parent_rate || !rt5682_clk_check(rt5682))
2807 return -EINVAL;
2810 * BCLK rates are set as a multiplier of WCLK in HW.
2813 * and find the appropriate multiplier of BCLK to
2814 * get the rounded down BCLK value.
2824 struct rt5682_priv *rt5682 =
2828 struct snd_soc_dai *dai;
2831 if (!rt5682_clk_check(rt5682))
2832 return -EINVAL;
2834 component = rt5682->component;
2838 for_each_component_dais(component, dai)
2839 if (dai->id == RT5682_AIF1)
2840 return rt5682_set_bclk1_ratio(dai, factor);
2842 dev_err(rt5682->i2c_dev, "dai %d not found in component\n",
2844 return -ENODEV;
2862 int rt5682_register_dai_clks(struct rt5682_priv *rt5682)
2864 struct device *dev = rt5682->i2c_dev;
2865 struct rt5682_platform_data *pdata = &rt5682->pdata;
2873 dai_clk_hw = &rt5682->dai_clks_hw[i];
2878 if (rt5682->mclk) {
2879 parent = __clk_get_hw(rt5682->mclk);
2885 /* Make WCLK the parent of BCLK */
2886 parent = &rt5682->dai_clks_hw[RT5682_DAI_WCLK_IDX];
2892 return -EINVAL;
2895 init.name = pdata->dai_clk_names[i];
2898 dai_clk_hw->init = &init;
2907 if (dev->of_node) {
2928 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2931 struct snd_soc_dapm_context *dapm = &component->dapm;
2933 rt5682->component = component;
2935 if (rt5682->is_sdw) {
2936 slave = rt5682->slave;
2938 &slave->initialization_complete,
2941 dev_err(&slave->dev, "Initialization not complete, timed out\n");
2942 return -ETIMEDOUT;
2954 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2956 rt5682_reset(rt5682);
2962 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
2965 if (rt5682->is_sdw)
2968 if (rt5682->irq)
2969 disable_irq(rt5682->irq);
2971 cancel_delayed_work_sync(&rt5682->jack_detect_work);
2972 cancel_delayed_work_sync(&rt5682->jd_check_work);
2973 if (rt5682->hs_jack && (rt5682->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) {
3008 regcache_cache_only(rt5682->regmap, true);
3009 regcache_mark_dirty(rt5682->regmap);
3015 struct rt5682_priv *rt5682 = snd_soc_component_get_drvdata(component);
3017 if (rt5682->is_sdw)
3020 regcache_cache_only(rt5682->regmap, false);
3021 regcache_sync(rt5682->regmap);
3023 if (rt5682->hs_jack && (rt5682->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) {
3035 rt5682->jack_type = 0;
3037 &rt5682->jack_detect_work, msecs_to_jiffies(0));
3039 if (rt5682->irq)
3040 enable_irq(rt5682->irq);
3084 int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev)
3087 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3088 &rt5682->pdata.dmic1_data_pin);
3089 device_property_read_u32(dev, "realtek,dmic1-clk-pin",
3090 &rt5682->pdata.dmic1_clk_pin);
3091 device_property_read_u32(dev, "realtek,jd-src",
3092 &rt5682->pdata.jd_src);
3093 device_property_read_u32(dev, "realtek,btndet-delay",
3094 &rt5682->pdata.btndet_delay);
3095 device_property_read_u32(dev, "realtek,dmic-clk-rate-hz",
3096 &rt5682->pdata.dmic_clk_rate);
3097 device_property_read_u32(dev, "realtek,dmic-delay-ms",
3098 &rt5682->pdata.dmic_delay);
3100 if (device_property_read_string_array(dev, "clock-output-names",
3101 rt5682->pdata.dai_clk_names,
3103 dev_warn(dev, "Using default DAI clk names: %s, %s\n",
3104 rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX],
3105 rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]);
3107 rt5682->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
3108 "realtek,dmic-clk-driving-high");
3114 int rt5682_get_ldo1(struct rt5682_priv *rt5682, struct device *dev)
3116 rt5682->ldo1_en = devm_gpiod_get_optional(dev,
3117 "realtek,ldo1-en",
3119 if (IS_ERR(rt5682->ldo1_en)) {
3121 return PTR_ERR(rt5682->ldo1_en);
3128 void rt5682_calibrate(struct rt5682_priv *rt5682)
3132 mutex_lock(&rt5682->calibrate_mutex);
3134 rt5682_reset(rt5682);
3135 regmap_write(rt5682->regmap, RT5682_I2C_CTRL, 0x000f);
3136 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xa2af);
3138 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0xf2af);
3139 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0300);
3140 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x8000);
3141 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0100);
3142 regmap_write(rt5682->regmap, RT5682_HP_IMP_SENS_CTRL_19, 0x3800);
3143 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x3000);
3144 if (rt5682->ve_ic)
3145 regmap_write(rt5682->regmap, RT5682_CHOP_ADC, 0x7005);
3147 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x7005);
3148 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0x686c);
3149 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0d0d);
3150 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_2, 0x0321);
3151 regmap_write(rt5682->regmap, RT5682_HP_LOGIC_CTRL_2, 0x0004);
3152 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00);
3153 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_3, 0x06a1);
3154 regmap_write(rt5682->regmap, RT5682_A_DAC1_MUX, 0x0311);
3155 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0x7c00);
3157 regmap_write(rt5682->regmap, RT5682_HP_CALIB_CTRL_1, 0xfc00);
3160 regmap_read(rt5682->regmap, RT5682_HP_CALIB_STA_1, &value);
3168 dev_err(rt5682->component->dev, "HP Calibration Failure\n");
3171 regmap_write(rt5682->regmap, RT5682_PWR_ANLG_1, 0x002f);
3172 regmap_write(rt5682->regmap, RT5682_MICBIAS_2, 0x0080);
3173 regmap_write(rt5682->regmap, RT5682_GLB_CLK, 0x0000);
3174 regmap_write(rt5682->regmap, RT5682_PWR_DIG_1, 0x0000);
3175 regmap_write(rt5682->regmap, RT5682_CHOP_DAC, 0x2000);
3176 if (rt5682->ve_ic)
3177 regmap_write(rt5682->regmap, RT5682_CHOP_ADC, 0x2005);
3179 regmap_write(rt5682->regmap, RT5682_CALIB_ADC_CTRL, 0x2005);
3180 regmap_write(rt5682->regmap, RT5682_STO1_ADC_MIXER, 0xc0c4);
3181 regmap_write(rt5682->regmap, RT5682_CAL_REC, 0x0c0c);
3183 mutex_unlock(&rt5682->calibrate_mutex);
3187 MODULE_DESCRIPTION("ASoC RT5682 driver");