44 #define RT5677_SPI_WRITE_BURST	0x5
45 #define RT5677_SPI_READ_BURST	0x4
46 #define RT5677_SPI_WRITE_32	0x3
47 #define RT5677_SPI_READ_32	0x2
48 #define RT5677_SPI_WRITE_16	0x1
49 #define RT5677_SPI_READ_16	0x0
51 #define RT5677_BUF_BYTES_TOTAL		0x20000
52 #define RT5677_MIC_BUF_ADDR		0x60030000
53 #define RT5677_MODEL_ADDR		0x5FFC9800
56 #define RT5677_MIC_BUF_FIRST_READ_SIZE	0x10000
92 	.id = 0,
108 	return 0;  in rt5677_spi_pcm_open()
125 	return 0;  in rt5677_spi_pcm_close()
140 	return 0;  in rt5677_spi_hw_params()
154 	return 0;  in rt5677_spi_hw_free()
170 	rt5677_dsp->dma_offset = 0;  in rt5677_spi_prepare()
171 	rt5677_dsp->avail_bytes = 0;  in rt5677_spi_prepare()
172 	return 0;  in rt5677_spi_prepare()
199 	return *mic_write_offset < RT5677_MIC_BUF_BYTES ? 0 : -EFAULT;  in rt5677_spi_mic_write_offset()
228 		return 0;  in rt5677_spi_copy_block()
238 	second_chunk_len = 0;  in rt5677_spi_copy_block()
254 		rt5677_dsp->dma_offset = 0;  in rt5677_spi_copy_block()
277 	int ret = 0;  in rt5677_spi_copy()
280 	if (amount == 0)  in rt5677_spi_copy()
291 		ret |= rt5677_spi_copy_block(rt5677_dsp, 0, target);  in rt5677_spi_copy()
311 	int ret = 0;  in rt5677_spi_copy_work()
363 			rt5677_dsp->avail_bytes = 0;  in rt5677_spi_copy_work()
378 				       NULL, 0, 0);  in rt5677_spi_pcm_new()
379 	return 0;  in rt5677_spi_pcm_new()
395 	return 0;  in rt5677_spi_pcm_probe()
422  * 0x18020000 ~ 0x18021000
424  * For example, reading 256 bytes at 0x60030004 uses the following commands:
425  * 0x60030004 RT5677_SPI_READ_32	4 bytes
426  * 0x60030008 RT5677_SPI_READ_BURST	240 bytes
427  * 0x600300F8 RT5677_SPI_READ_BURST	8 bytes
428  * 0x60030100 RT5677_SPI_READ_32	4 bytes
462 	for (w = 0; w < dstlen; w += word_size) {  in rt5677_spi_reverse()
463 		for (i = 0; i < word_size && i + w < dstlen; i++) {  in rt5677_spi_reverse()
465 			dst[w + i] = si < srclen ? src[si] : 0;  in rt5677_spi_reverse()
474 	int status = 0;  in rt5677_spi_read()
487 		dev_err(&g_spi->dev, "Bad read align 0x%x(%zu)\n", addr, len);  in rt5677_spi_read()
491 	memset(t, 0, sizeof(t));  in rt5677_spi_read()
492 	t[0].tx_buf = header;  in rt5677_spi_read()
493 	t[0].len = sizeof(header);  in rt5677_spi_read()
494 	t[0].speed_hz = RT5677_SPI_FREQ;  in rt5677_spi_read()
499 	for (offset = 0; offset < len; offset += t[1].len) {  in rt5677_spi_read()
504 		header[0] = spi_cmd;  in rt5677_spi_read()
505 		header[1] = ((addr + offset) & 0xff000000) >> 24;  in rt5677_spi_read()
506 		header[2] = ((addr + offset) & 0x00ff0000) >> 16;  in rt5677_spi_read()
507 		header[3] = ((addr + offset) & 0x0000ff00) >> 8;  in rt5677_spi_read()
508 		header[4] = ((addr + offset) & 0x000000ff) >> 0;  in rt5677_spi_read()
529 	int status = 0;  in rt5677_spi_write()
542 		dev_err(&g_spi->dev, "Bad write align 0x%x(%zu)\n", addr, len);  in rt5677_spi_write()
546 	memset(&t, 0, sizeof(t));  in rt5677_spi_write()
551 	for (offset = 0; offset < len;) {  in rt5677_spi_write()
556 		buf[0] = spi_cmd;  in rt5677_spi_write()
557 		buf[1] = ((addr + offset) & 0xff000000) >> 24;  in rt5677_spi_write()
558 		buf[2] = ((addr + offset) & 0x00ff0000) >> 16;  in rt5677_spi_write()
559 		buf[3] = ((addr + offset) & 0x0000ff00) >> 8;  in rt5677_spi_write()
560 		buf[4] = ((addr + offset) & 0x000000ff) >> 0;  in rt5677_spi_write()
599 	schedule_delayed_work(&rt5677_dsp->copy_work, 0);  in rt5677_spi_hotword_detected()
612 	if (ret < 0)  in rt5677_spi_probe()
620 	{ "RT5677AA", 0 },