Lines Matching +full:15 +full:- +full:9
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
213 #define RT5670_L_MUTE (0x1 << 15)
214 #define RT5670_L_MUTE_SFT 15
231 #define RT5670_CBJ_JD_HP_EN (0x1 << 9)
251 #define RT5670_INL_SEL_MASK (0x1 << 15)
252 #define RT5670_INL_SEL_SFT 15
253 #define RT5670_INL_SEL_IN4P (0x0 << 15)
254 #define RT5670_INL_SEL_MONOP (0x1 << 15)
265 #define RT5670_ST_SEL_MASK (0x7 << 9)
266 #define RT5670_ST_SEL_SFT 9
323 #define RT5670_STO2_ADC_SRC_MASK (0x1 << 15)
324 #define RT5670_STO2_ADC_SRC_SFT 15
377 #define RT5670_M_ADCMIX_L (0x1 << 15)
378 #define RT5670_M_ADCMIX_L_SFT 15
407 #define RT5670_M_DAC_R1_STO_L (0x1 << 9)
408 #define RT5670_M_DAC_R1_STO_L_SFT 9
435 #define RT5670_DAC_R2_MONO_L_VOL_MASK (0x1 << 9)
436 #define RT5670_DAC_R2_MONO_L_VOL_SFT 9
451 #define RT5670_M_STO_L_DAC_L (0x1 << 15)
452 #define RT5670_M_STO_L_DAC_L_SFT 15
463 #define RT5670_M_DAC_R2_DAC_R (0x1 << 9)
464 #define RT5670_M_DAC_R2_DAC_R_SFT 9
503 #define RT5670_IF1_ADC2_IN_SEL (0x1 << 15)
504 #define RT5670_IF1_ADC2_IN_SFT 15
517 #define RT5670_PDM1_L_MASK (0x1 << 15)
518 #define RT5670_PDM1_L_SFT 15
529 #define RT5670_PDM2_R_MASK (0x1 << 9)
530 #define RT5670_PDM2_R_SFT 9
584 #define RT5670_M_DAC2_HM (0x1 << 15)
585 #define RT5670_M_DAC2_HM_SFT 15
602 #define RT5670_M_DAC_R2_MA (0x1 << 15)
603 #define RT5670_M_DAC_R2_MA_SFT 15
612 #define RT5670_M_DAC_R2_MM (0x1 << 9)
613 #define RT5670_M_DAC_R2_MM_SFT 9
680 #define RT5670_M_DAC_L1_LM (0x1 << 15)
681 #define RT5670_M_DAC_L1_LM_SFT 15
692 #define RT5670_PWR_I2S1 (0x1 << 15)
693 #define RT5670_PWR_I2S1_BIT 15
712 #define RT5670_PWR_ADC_S1F (0x1 << 15)
713 #define RT5670_PWR_ADC_S1F_BIT 15
724 #define RT5670_PWR_DAC_MF_R (0x1 << 9)
725 #define RT5670_PWR_DAC_MF_R_BIT 9
734 #define RT5670_PWR_VREF1 (0x1 << 15)
735 #define RT5670_PWR_VREF1_BIT 15
758 #define RT5670_PWR_BST1 (0x1 << 15)
759 #define RT5670_PWR_BST1_BIT 15
766 #define RT5670_PWR_PLL (0x1 << 9)
767 #define RT5670_PWR_PLL_BIT 9
778 #define RT5670_PWR_OM_L (0x1 << 15)
779 #define RT5670_PWR_OM_L_BIT 15
792 #define RT5670_PWR_IN_L (0x1 << 9)
793 #define RT5670_PWR_IN_L_BIT 9
800 #define RT5670_I2S_MS_MASK (0x1 << 15)
801 #define RT5670_I2S_MS_SFT 15
802 #define RT5670_I2S_MS_M (0x0 << 15)
803 #define RT5670_I2S_MS_S (0x1 << 15)
840 #define RT5670_I2S_BCLK_MS1_MASK (0x1 << 15)
841 #define RT5670_I2S_BCLK_MS1_SFT 15
842 #define RT5670_I2S_BCLK_MS1_32 (0x0 << 15)
843 #define RT5670_I2S_BCLK_MS1_64 (0x1 << 15)
914 #define RT5670_DMIC_1_EN_MASK (0x1 << 15)
915 #define RT5670_DMIC_1_EN_SFT 15
916 #define RT5670_DMIC_1_DIS (0x0 << 15)
917 #define RT5670_DMIC_1_EN (0x1 << 15)
934 #define RT5670_DMIC_2L_LH_MASK (0x1 << 9)
935 #define RT5670_DMIC_2L_LH_SFT 9
936 #define RT5670_DMIC_2L_LH_FALLING (0x0 << 9)
937 #define RT5670_DMIC_2L_LH_RISING (0x1 << 9)
966 #define RT5670_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
996 #define RT5670_STO_T_MASK (0x1 << 15)
997 #define RT5670_STO_T_SFT 15
998 #define RT5670_STO_T_SCLK (0x0 << 15)
999 #define RT5670_STO_T_LRCK1 (0x1 << 15)
1008 #define RT5670_DMIC_1_M_MASK (0x1 << 9)
1009 #define RT5670_DMIC_1_M_SFT 9
1010 #define RT5670_DMIC_1_M_NOR (0x0 << 9)
1011 #define RT5670_DMIC_1_M_ASYN (0x1 << 9)
1064 #define RT5670_CLSD_OC_MASK (0x1 << 9)
1065 #define RT5670_CLSD_OC_SFT 9
1066 #define RT5670_CLSD_OC_PU (0x0 << 9)
1067 #define RT5670_CLSD_OC_PD (0x1 << 9)
1088 #define RT5670_SMT_TRIG_MASK (0x1 << 15)
1089 #define RT5670_SMT_TRIG_SFT 15
1090 #define RT5670_SMT_TRIG_DIS (0x0 << 15)
1091 #define RT5670_SMT_TRIG_EN (0x1 << 15)
1092 #define RT5670_HP_L_SMT_MASK (0x1 << 9)
1093 #define RT5670_HP_L_SMT_SFT 9
1094 #define RT5670_HP_L_SMT_DIS (0x0 << 9)
1095 #define RT5670_HP_L_SMT_EN (0x1 << 9)
1207 #define RT5670_PVDD_DET_MASK (0x1 << 15)
1208 #define RT5670_PVDD_DET_SFT 15
1209 #define RT5670_PVDD_DET_DIS (0x0 << 15)
1210 #define RT5670_PVDD_DET_EN (0x1 << 15)
1217 #define RT5670_MIC1_BS_MASK (0x1 << 15)
1218 #define RT5670_MIC1_BS_SFT 15
1219 #define RT5670_MIC1_BS_9AV (0x0 << 15)
1220 #define RT5670_MIC1_BS_75AV (0x1 << 15)
1237 #define RT5670_MIC1_OVTH_MASK (0x3 << 9)
1238 #define RT5670_MIC1_OVTH_SFT 9
1239 #define RT5670_MIC1_OVTH_600UA (0x0 << 9)
1240 #define RT5670_MIC1_OVTH_1500UA (0x1 << 9)
1241 #define RT5670_MIC1_OVTH_2000UA (0x2 << 9)
1271 #define RT5670_EQ_SRC_MASK (0x1 << 15)
1272 #define RT5670_EQ_SRC_SFT 15
1273 #define RT5670_EQ_SRC_DAC (0x0 << 15)
1274 #define RT5670_EQ_SRC_ADC (0x1 << 15)
1328 #define RT5670_MT_MASK (0x1 << 15)
1329 #define RT5670_MT_SFT 15
1330 #define RT5670_MT_DIS (0x0 << 15)
1331 #define RT5670_MT_EN (0x1 << 15)
1334 #define RT5670_DRC_AGC_P_MASK (0x1 << 15)
1335 #define RT5670_DRC_AGC_P_SFT 15
1336 #define RT5670_DRC_AGC_P_DAC (0x0 << 15)
1337 #define RT5670_DRC_AGC_P_ADC (0x1 << 15)
1407 #define RT5670_JD_SPL_MASK (0x1 << 9)
1408 #define RT5670_JD_SPL_SFT 9
1409 #define RT5670_JD_SPL_DIS (0x0 << 9)
1410 #define RT5670_JD_SPL_EN (0x1 << 9)
1449 #define RT5670_IRQ_JD_MASK (0x1 << 15)
1450 #define RT5670_IRQ_JD_SFT 15
1451 #define RT5670_IRQ_JD_BP (0x0 << 15)
1452 #define RT5670_IRQ_JD_NOR (0x1 << 15)
1473 #define RT5670_JD1_1_EN_MASK (0x1 << 9)
1474 #define RT5670_JD1_1_EN_SFT 9
1475 #define RT5670_JD1_1_DIS (0x0 << 9)
1476 #define RT5670_JD1_1_EN (0x1 << 9)
1479 #define RT5670_IRQ_MB1_OC_MASK (0x1 << 15)
1480 #define RT5670_IRQ_MB1_OC_SFT 15
1481 #define RT5670_IRQ_MB1_OC_BP (0x0 << 15)
1482 #define RT5670_IRQ_MB1_OC_NOR (0x1 << 15)
1509 #define RT5670_GP1_PIN_MASK (0x1 << 15)
1510 #define RT5670_GP1_PIN_SFT 15
1511 #define RT5670_GP1_PIN_GPIO1 (0x0 << 15)
1512 #define RT5670_GP1_PIN_IRQ (0x1 << 15)
1530 #define RT5670_GPIO_M_MASK (0x1 << 9)
1531 #define RT5670_GPIO_M_SFT 9
1532 #define RT5670_GPIO_M_FLT (0x0 << 9)
1533 #define RT5670_GPIO_M_PH (0x1 << 9)
1574 #define RT5670_GP4_P_MASK (0x1 << 9)
1575 #define RT5670_GP4_P_SFT 9
1576 #define RT5670_GP4_P_NOR (0x0 << 9)
1577 #define RT5670_GP4_P_INV (0x1 << 9)
1620 #define RT5670_SCB_SWAP_MASK (0x1 << 15)
1621 #define RT5670_SCB_SWAP_SFT 15
1622 #define RT5670_SCB_SWAP_DIS (0x0 << 15)
1623 #define RT5670_SCB_SWAP_EN (0x1 << 15)
1630 #define RT5670_BB_MASK (0x1 << 15)
1631 #define RT5670_BB_SFT 15
1632 #define RT5670_BB_DIS (0x0 << 15)
1633 #define RT5670_BB_EN (0x1 << 15)
1640 #define RT5670_M_BB_L_MASK (0x1 << 9)
1641 #define RT5670_M_BB_L_SFT 9
1652 #define RT5670_M_MP3_L_MASK (0x1 << 15)
1653 #define RT5670_M_MP3_L_SFT 15
1682 #define RT5670_3D_CF_MASK (0x1 << 15)
1683 #define RT5670_3D_CF_SFT 15
1684 #define RT5670_3D_CF_DIS (0x0 << 15)
1685 #define RT5670_3D_CF_EN (0x1 << 15)
1700 #define RT5670_M_3D_HRTF_MASK (0x1 << 9)
1701 #define RT5670_M_3D_HRTF_SFT 9
1710 #define RT5670_2ND_HPF_MASK (0x1 << 15)
1711 #define RT5670_2ND_HPF_SFT 15
1712 #define RT5670_2ND_HPF_DIS (0x0 << 15)
1713 #define RT5670_2ND_HPF_EN (0x1 << 15)
1740 #define RT5670_DC_CAL_MASK (0x1 << 9)
1741 #define RT5670_DC_CAL_SFT 9
1742 #define RT5670_DC_CAL_DIS (0x0 << 9)
1743 #define RT5670_DC_CAL_EN (0x1 << 9)
1769 #define RT5670_SV_MASK (0x1 << 15)
1770 #define RT5670_SV_SFT 15
1771 #define RT5670_SV_DIS (0x0 << 15)
1772 #define RT5670_SV_EN (0x1 << 15)
1795 #define RT5670_M_ZCD_RM_L (0x1 << 9)
1805 #define RT5670_ZCD_HP_MASK (0x1 << 15)
1806 #define RT5670_ZCD_HP_SFT 15
1807 #define RT5670_ZCD_HP_DIS (0x0 << 15)
1808 #define RT5670_ZCD_HP_EN (0x1 << 15)
1817 #define RT5670_3D_SPK_MASK (0x1 << 15)
1818 #define RT5670_3D_SPK_SFT 15
1819 #define RT5670_3D_SPK_DIS (0x0 << 15)
1820 #define RT5670_3D_SPK_EN (0x1 << 15)
1829 #define RT5670_WND_MASK (0x1 << 15)
1830 #define RT5670_WND_SFT 15
1831 #define RT5670_WND_DIS (0x0 << 15)
1832 #define RT5670_WND_EN (0x1 << 15)
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1857 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */