Lines Matching full:13
287 #define RT5670_M_DAC_L2_VOL (0x1 << 13)
288 #define RT5670_M_DAC_L2_VOL_SFT 13
329 #define RT5670_M_ADC_L2 (0x1 << 13)
330 #define RT5670_M_ADC_L2_SFT 13
351 #define RT5670_M_MONO_ADC_L2 (0x1 << 13)
352 #define RT5670_M_MONO_ADC_L2_SFT 13
401 #define RT5670_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
402 #define RT5670_DAC_L1_STO_L_VOL_SFT 13
427 #define RT5670_DAC_L1_MONO_L_VOL_MASK (0x1 << 13)
428 #define RT5670_DAC_L1_MONO_L_VOL_SFT 13
455 #define RT5670_M_DAC_L2_DAC_L (0x1 << 13)
456 #define RT5670_M_DAC_L2_DAC_L_SFT 13
477 #define RT5670_RXDP_SEL_MASK (0x7 << 13)
478 #define RT5670_RXDP_SEL_SFT 13
521 #define RT5670_PDM1_R_MASK (0x1 << 13)
522 #define RT5670_PDM1_R_SFT 13
540 #define RT5670_G_HP_L_RM_L_MASK (0x7 << 13)
541 #define RT5670_G_HP_L_RM_L_SFT 13
552 #define RT5670_G_BST1_RM_L_MASK (0x7 << 13)
553 #define RT5670_G_BST1_RM_L_SFT 13
562 #define RT5670_G_HP_R_RM_R_MASK (0x7 << 13)
563 #define RT5670_G_HP_R_RM_R_SFT 13
574 #define RT5670_G_BST1_RM_R_MASK (0x7 << 13)
575 #define RT5670_G_BST1_RM_R_SFT 13
588 #define RT5670_M_DAC1_HM (0x1 << 13)
589 #define RT5670_M_DAC1_HM_SFT 13
606 #define RT5670_M_OV_R_MM (0x1 << 13)
607 #define RT5670_M_OV_R_MM_SFT 13
620 #define RT5670_G_BST3_OM_L_MASK (0x7 << 13)
621 #define RT5670_G_BST3_OM_L_SFT 13
632 #define RT5670_G_DAC_R2_OM_L_MASK (0x7 << 13)
633 #define RT5670_G_DAC_R2_OM_L_SFT 13
650 #define RT5670_G_BST4_OM_R_MASK (0x7 << 13)
651 #define RT5670_G_BST4_OM_R_SFT 13
662 #define RT5670_G_DAC_L2_OM_R_MASK (0x7 << 13)
663 #define RT5670_G_DAC_L2_OM_R_SFT 13
684 #define RT5670_M_OV_L_LM (0x1 << 13)
685 #define RT5670_M_OV_L_LM_SFT 13
716 #define RT5670_PWR_ADC_MF_R (0x1 << 13)
717 #define RT5670_PWR_ADC_MF_R_BIT 13
738 #define RT5670_PWR_MB (0x1 << 13)
739 #define RT5670_PWR_MB_BIT 13
760 #define RT5670_PWR_BST2 (0x1 << 13)
761 #define RT5670_PWR_BST2_BIT 13
922 #define RT5670_DMIC_1L_LH_MASK (0x1 << 13)
923 #define RT5670_DMIC_1L_LH_SFT 13
924 #define RT5670_DMIC_1L_LH_FALLING (0x0 << 13)
925 #define RT5670_DMIC_1L_LH_RISING (0x1 << 13)
1134 #define RT5670_DEPOP_MASK (0x1 << 13)
1135 #define RT5670_DEPOP_SFT 13
1136 #define RT5670_DEPOP_AUTO (0x0 << 13)
1137 #define RT5670_DEPOP_MAN (0x1 << 13)
1225 #define RT5670_MIC1_CLK_MASK (0x1 << 13)
1226 #define RT5670_MIC1_CLK_SFT 13
1227 #define RT5670_MIC1_CLK_DIS (0x0 << 13)
1228 #define RT5670_MIC1_CLK_EN (0x1 << 13)
1277 #define RT5670_EQ_CD_MASK (0x1 << 13)
1278 #define RT5670_EQ_CD_SFT 13
1279 #define RT5670_EQ_CD_DIS (0x0 << 13)
1280 #define RT5670_EQ_CD_EN (0x1 << 13)
1342 #define RT5670_DRC_AGC_UPD (0x1 << 13)
1343 #define RT5670_DRC_AGC_UPD_BIT 13
1390 #define RT5670_JD_MASK (0x7 << 13)
1391 #define RT5670_JD_SFT 13
1392 #define RT5670_JD_DIS (0x0 << 13)
1393 #define RT5670_JD_GPIO1 (0x1 << 13)
1394 #define RT5670_JD_JD1_IN4P (0x2 << 13)
1395 #define RT5670_JD_JD2_IN4N (0x3 << 13)
1396 #define RT5670_JD_GPIO2 (0x4 << 13)
1397 #define RT5670_JD_GPIO3 (0x5 << 13)
1398 #define RT5670_JD_GPIO4 (0x6 << 13)
1457 #define RT5670_JD_STKY_MASK (0x1 << 13)
1458 #define RT5670_JD_STKY_SFT 13
1459 #define RT5670_JD_STKY_DIS (0x0 << 13)
1460 #define RT5670_JD_STKY_EN (0x1 << 13)
1656 #define RT5670_M_MP3_MASK (0x1 << 13)
1657 #define RT5670_M_MP3_SFT 13
1658 #define RT5670_M_MP3_DIS (0x0 << 13)
1659 #define RT5670_M_MP3_EN (0x1 << 13)
1672 #define RT5670_MP3_WT_MASK (0x1 << 13)
1673 #define RT5670_MP3_WT_SFT 13
1674 #define RT5670_MP3_WT_1_4 (0x0 << 13)
1675 #define RT5670_MP3_WT_1_2 (0x1 << 13)
1690 #define RT5670_3D_BT_MASK (0x1 << 13)
1691 #define RT5670_3D_BT_SFT 13
1692 #define RT5670_3D_BT_DIS (0x0 << 13)
1693 #define RT5670_3D_BT_EN (0x1 << 13)
1777 #define RT5670_OUT_SV_MASK (0x1 << 13)
1778 #define RT5670_OUT_SV_SFT 13
1779 #define RT5670_OUT_SV_DIS (0x0 << 13)
1780 #define RT5670_OUT_SV_EN (0x1 << 13)
1821 #define RT5670_3D_SPK_M_MASK (0x3 << 13)
1822 #define RT5670_3D_SPK_M_SFT 13
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1856 #define RT5670_WND_WIND_SFT 13
1905 #define RT5670_RST_DSP (0x1 << 13)