Lines Matching +full:asrc +full:- +full:clk +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5668.c -- RT5668B ALSA SoC audio component driver
26 #include <sound/soc-dapm.h>
746 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
747 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
748 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
803 * rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters
808 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can
809 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
811 * ASRC function will track i2s clock and generate a corresponding system clock
814 * ASRC for these filters if ASRC is selected as their clock source.
827 return -EINVAL;
887 * rt5668_headset_detect - Detect headset.
922 rt5668->jack_type = SND_JACK_HEADSET;
926 rt5668->jack_type = SND_JACK_HEADPHONE;
936 rt5668->jack_type = 0;
939 dev_dbg(component->dev, "jack_type = %d\n", rt5668->jack_type);
940 return rt5668->jack_type;
948 &rt5668->jack_detect_work, msecs_to_jiffies(250));
958 if (snd_soc_component_read(rt5668->component, RT5668_AJD1_CTRL)
961 rt5668->jack_type = rt5668_headset_detect(rt5668->component, 0);
963 snd_soc_jack_report(rt5668->hs_jack, rt5668->jack_type,
968 schedule_delayed_work(&rt5668->jd_check_work, 500);
977 switch (rt5668->pdata.jd_src) {
986 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
988 regmap_update_bits(rt5668->regmap, RT5668_RC_CLK_CTRL,
992 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_2,
995 regmap_update_bits(rt5668->regmap, RT5668_IRQ_CTRL_2,
999 &rt5668->jack_detect_work, msecs_to_jiffies(250));
1003 regmap_update_bits(rt5668->regmap, RT5668_IRQ_CTRL_2,
1005 regmap_update_bits(rt5668->regmap, RT5668_RC_CLK_CTRL,
1010 dev_warn(component->dev, "Wrong JD source\n");
1014 rt5668->hs_jack = hs_jack;
1025 if (!rt5668->component ||
1026 !snd_soc_card_is_instantiated(rt5668->component->card)) {
1029 &rt5668->jack_detect_work, msecs_to_jiffies(15));
1033 mutex_lock(&rt5668->calibrate_mutex);
1035 val = snd_soc_component_read(rt5668->component, RT5668_AJD1_CTRL)
1039 if (rt5668->jack_type == 0) {
1041 rt5668->jack_type =
1042 rt5668_headset_detect(rt5668->component, 1);
1045 rt5668->jack_type = SND_JACK_HEADSET;
1046 btn_type = rt5668_button_detect(rt5668->component);
1058 rt5668->jack_type |= SND_JACK_BTN_0;
1063 rt5668->jack_type |= SND_JACK_BTN_1;
1068 rt5668->jack_type |= SND_JACK_BTN_2;
1073 rt5668->jack_type |= SND_JACK_BTN_3;
1079 dev_err(rt5668->component->dev,
1087 rt5668->jack_type = rt5668_headset_detect(rt5668->component, 0);
1090 snd_soc_jack_report(rt5668->hs_jack, rt5668->jack_type,
1095 if (rt5668->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1097 schedule_delayed_work(&rt5668->jd_check_work, 0);
1099 cancel_delayed_work_sync(&rt5668->jd_check_work);
1101 mutex_unlock(&rt5668->calibrate_mutex);
1135 if (rt5668->sysclk < target) {
1137 rt5668->sysclk);
1141 for (i = 0; i < size - 1; i++) {
1143 if (target * div[i] == rt5668->sysclk)
1145 if (target * div[i + 1] > rt5668->sysclk) {
1147 rt5668->sysclk);
1152 if (target * div[i] < rt5668->sysclk)
1154 rt5668->sysclk);
1156 return size - 1;
1161 * set_dmic_clk - Set parameter of dmic.
1174 snd_soc_dapm_to_component(w->dapm);
1191 snd_soc_dapm_to_component(w->dapm);
1198 if (w->shift == RT5668_PWR_ADC_S1F_BIT &&
1200 ref = 256 * rt5668->lrck[RT5668_AIF2];
1202 ref = 256 * rt5668->lrck[RT5668_AIF1];
1206 if (w->shift == RT5668_PWR_ADC_S1F_BIT)
1222 snd_soc_dapm_to_component(w->dapm);
1237 snd_soc_dapm_to_component(w->dapm);
1239 switch (w->shift) {
1313 /* MX-26 [13] [5] */
1333 /* MX-26 [11:10] [3:2] */
1353 /* MX-26 [12] [4] */
1372 /* MX-79 [6:4] I2S1 ADC data location */
1392 /* MX-2B [4], MX-2B [0]*/
1423 snd_soc_dapm_to_component(w->dapm);
1472 snd_soc_dapm_to_component(w->dapm);
1476 switch (w->shift) {
1494 switch (w->shift) {
1550 /* ASRC */
1551 SND_SOC_DAPM_SUPPLY_S("DAC STO1 ASRC", 1, RT5668_PLL_TRACK_1,
1553 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5668_PLL_TRACK_1,
1555 SND_SOC_DAPM_SUPPLY_S("AD ASRC", 1, RT5668_PLL_TRACK_1,
1557 SND_SOC_DAPM_SUPPLY_S("DA ASRC", 1, RT5668_PLL_TRACK_1,
1559 SND_SOC_DAPM_SUPPLY_S("DMIC ASRC", 1, RT5668_PLL_TRACK_1,
1574 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1712 /* CLK DET */
1733 /*ASRC*/
1734 {"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
1735 {"DAC Stereo1 Filter", NULL, "DAC STO1 ASRC", is_using_asrc},
1736 {"ADC STO1 ASRC", NULL, "AD ASRC"},
1737 {"DAC STO1 ASRC", NULL, "DA ASRC"},
1760 {"DMIC L1", NULL, "DMIC CLK"},
1762 {"DMIC R1", NULL, "DMIC CLK"},
1764 {"DMIC CLK", NULL, "DMIC ASRC"},
1870 struct snd_soc_component *component = dai->component;
1889 return -EINVAL;
1909 return -EINVAL;
1922 struct snd_soc_component *component = dai->component;
1927 rt5668->lrck[dai->id] = params_rate(params);
1928 pre_div = rl6231_get_clk_info(rt5668->sysclk, rt5668->lrck[dai->id]);
1932 dev_err(component->dev, "Unsupported frame size: %d\n",
1934 return -EINVAL;
1937 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
1938 rt5668->lrck[dai->id], pre_div, dai->id);
1960 return -EINVAL;
1963 switch (dai->id) {
1967 if (rt5668->master[RT5668_AIF1]) {
1984 if (rt5668->master[RT5668_AIF2]) {
1999 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2000 return -EINVAL;
2008 struct snd_soc_component *component = dai->component;
2014 rt5668->master[dai->id] = 1;
2017 rt5668->master[dai->id] = 0;
2020 return -EINVAL;
2031 if (dai->id == RT5668_AIF1)
2034 return -EINVAL;
2037 if (dai->id == RT5668_AIF1)
2041 return -EINVAL;
2044 return -EINVAL;
2063 return -EINVAL;
2066 switch (dai->id) {
2074 tdm_ctrl | rt5668->master[dai->id]);
2077 if (rt5668->master[dai->id] == 0)
2084 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2085 return -EINVAL;
2096 if (freq == rt5668->sysclk && clk_id == rt5668->sysclk_src)
2117 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2118 return -EINVAL;
2123 if (rt5668->master[RT5668_AIF2]) {
2129 rt5668->sysclk = freq;
2130 rt5668->sysclk_src = clk_id;
2132 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
2146 if (source == rt5668->pll_src && freq_in == rt5668->pll_in &&
2147 freq_out == rt5668->pll_out)
2151 dev_dbg(component->dev, "PLL disabled\n");
2153 rt5668->pll_in = 0;
2154 rt5668->pll_out = 0;
2170 dev_err(component->dev, "Unknown PLL Source %d\n", source);
2171 return -EINVAL;
2176 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
2180 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2190 rt5668->pll_in = freq_in;
2191 rt5668->pll_out = freq_out;
2192 rt5668->pll_src = source;
2199 struct snd_soc_component *component = dai->component;
2202 rt5668->bclk[dai->id] = ratio;
2216 dev_err(dai->dev, "Invalid bclk ratio %d\n", ratio);
2217 return -EINVAL;
2230 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2233 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2239 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2241 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2245 regmap_update_bits(rt5668->regmap, RT5668_PWR_DIG_1,
2247 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2262 rt5668->component = component;
2271 rt5668_reset(rt5668->regmap);
2279 regcache_cache_only(rt5668->regmap, true);
2280 regcache_mark_dirty(rt5668->regmap);
2288 regcache_cache_only(rt5668->regmap, false);
2289 regcache_sync(rt5668->regmap);
2316 .name = "rt5668-aif1",
2335 .name = "rt5668-aif2",
2389 of_property_read_u32(dev->of_node, "realtek,dmic1-data-pin",
2390 &rt5668->pdata.dmic1_data_pin);
2391 of_property_read_u32(dev->of_node, "realtek,dmic1-clk-pin",
2392 &rt5668->pdata.dmic1_clk_pin);
2393 of_property_read_u32(dev->of_node, "realtek,jd-src",
2394 &rt5668->pdata.jd_src);
2403 mutex_lock(&rt5668->calibrate_mutex);
2405 rt5668_reset(rt5668->regmap);
2406 regmap_write(rt5668->regmap, RT5668_PWR_ANLG_1, 0xa2bf);
2408 regmap_write(rt5668->regmap, RT5668_PWR_ANLG_1, 0xf2bf);
2409 regmap_write(rt5668->regmap, RT5668_MICBIAS_2, 0x0380);
2410 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x8001);
2411 regmap_write(rt5668->regmap, RT5668_TEST_MODE_CTRL_1, 0x0000);
2412 regmap_write(rt5668->regmap, RT5668_STO1_DAC_MIXER, 0x2080);
2413 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0x4040);
2414 regmap_write(rt5668->regmap, RT5668_DEPOP_1, 0x0069);
2415 regmap_write(rt5668->regmap, RT5668_CHOP_DAC, 0x3000);
2416 regmap_write(rt5668->regmap, RT5668_HP_CTRL_2, 0x6000);
2417 regmap_write(rt5668->regmap, RT5668_HP_CHARGE_PUMP_1, 0x0f26);
2418 regmap_write(rt5668->regmap, RT5668_CALIB_ADC_CTRL, 0x7f05);
2419 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0x686c);
2420 regmap_write(rt5668->regmap, RT5668_CAL_REC, 0x0d0d);
2421 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_9, 0x000f);
2422 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x8d01);
2423 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_2, 0x0321);
2424 regmap_write(rt5668->regmap, RT5668_HP_LOGIC_CTRL_2, 0x0004);
2425 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_1, 0x7c00);
2426 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_3, 0x06a1);
2427 regmap_write(rt5668->regmap, RT5668_A_DAC1_MUX, 0x0311);
2428 regmap_write(rt5668->regmap, RT5668_RESET_HPF_CTRL, 0x0000);
2429 regmap_write(rt5668->regmap, RT5668_ADC_STO1_HP_CTRL_1, 0x3320);
2431 regmap_write(rt5668->regmap, RT5668_HP_CALIB_CTRL_1, 0xfc00);
2434 regmap_read(rt5668->regmap, RT5668_HP_CALIB_STA_1, &value);
2445 regmap_write(rt5668->regmap, RT5668_STO1_ADC_MIXER, 0xc0c4);
2446 regmap_write(rt5668->regmap, RT5668_PWR_DIG_1, 0x0000);
2448 mutex_unlock(&rt5668->calibrate_mutex);
2454 struct rt5668_platform_data *pdata = dev_get_platdata(&i2c->dev);
2459 rt5668 = devm_kzalloc(&i2c->dev, sizeof(struct rt5668_priv),
2463 return -ENOMEM;
2468 rt5668->pdata = *pdata;
2470 rt5668_parse_dt(rt5668, &i2c->dev);
2472 rt5668->regmap = devm_regmap_init_i2c(i2c, &rt5668_regmap);
2473 if (IS_ERR(rt5668->regmap)) {
2474 ret = PTR_ERR(rt5668->regmap);
2475 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2480 for (i = 0; i < ARRAY_SIZE(rt5668->supplies); i++)
2481 rt5668->supplies[i].supply = rt5668_supply_names[i];
2483 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(rt5668->supplies),
2484 rt5668->supplies);
2486 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
2490 ret = regulator_bulk_enable(ARRAY_SIZE(rt5668->supplies),
2491 rt5668->supplies);
2493 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
2497 rt5668->ldo1_en = devm_gpiod_get_optional(&i2c->dev,
2498 "realtek,ldo1-en",
2500 if (IS_ERR(rt5668->ldo1_en)) {
2501 dev_err(&i2c->dev, "Fail gpio request ldo1_en\n");
2502 return PTR_ERR(rt5668->ldo1_en);
2508 regmap_write(rt5668->regmap, RT5668_I2C_MODE, 0x1);
2511 regmap_read(rt5668->regmap, RT5668_DEVICE_ID, &val);
2514 return -ENODEV;
2517 rt5668_reset(rt5668->regmap);
2521 regmap_write(rt5668->regmap, RT5668_DEPOP_1, 0x0000);
2524 if (rt5668->pdata.dmic1_data_pin != RT5668_DMIC1_NULL) {
2525 switch (rt5668->pdata.dmic1_data_pin) {
2527 regmap_update_bits(rt5668->regmap, RT5668_DMIC_CTRL_1,
2529 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2534 regmap_update_bits(rt5668->regmap, RT5668_DMIC_CTRL_1,
2536 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2541 dev_dbg(&i2c->dev, "invalid DMIC_DAT pin\n");
2545 switch (rt5668->pdata.dmic1_clk_pin) {
2547 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2552 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2557 dev_dbg(&i2c->dev, "invalid DMIC_CLK pin\n");
2562 regmap_update_bits(rt5668->regmap, RT5668_PWR_ANLG_1,
2565 regmap_write(rt5668->regmap, RT5668_MICBIAS_2, 0x0380);
2566 regmap_update_bits(rt5668->regmap, RT5668_GPIO_CTRL_1,
2569 regmap_write(rt5668->regmap, RT5668_TEST_MODE_CTRL_1, 0x0000);
2571 INIT_DELAYED_WORK(&rt5668->jack_detect_work,
2573 INIT_DELAYED_WORK(&rt5668->jd_check_work,
2576 mutex_init(&rt5668->calibrate_mutex);
2578 if (i2c->irq) {
2579 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
2583 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
2587 return devm_snd_soc_register_component(&i2c->dev, &soc_component_dev_rt5668,
2595 rt5668_reset(rt5668->regmap);