Lines Matching +full:asrc +full:- +full:rate

1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5665.c -- RT5665/RT5658 ALSA SoC audio codec driver
26 #include <sound/soc-dapm.h>
884 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2250, 150, 0);
885 static const DECLARE_TLV_DB_SCALE(mono_vol_tlv, -1400, 150, 0);
886 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
887 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
888 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
889 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
891 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1059 * rt5665_headset_detect - Detect headset.
1077 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100,
1080 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val);
1082 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
1085 regmap_read(rt5665->regmap, RT5665_GPIO_STA, &val);
1088 regmap_read(rt5665->regmap, RT5665_GPIO_STA,
1093 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
1095 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_3, 0x3424);
1096 regmap_write(rt5665->regmap, RT5665_IL_CMD_1, 0x0048);
1097 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0xa291);
1101 rt5665->sar_adc_value = snd_soc_component_read(rt5665->component,
1104 sar_hs_type = rt5665->pdata.sar_hs_type ?
1105 rt5665->pdata.sar_hs_type : 729;
1107 if (rt5665->sar_adc_value > sar_hs_type) {
1108 rt5665->jack_type = SND_JACK_HEADSET;
1111 rt5665->jack_type = SND_JACK_HEADPHONE;
1112 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1,
1114 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2,
1120 regmap_write(rt5665->regmap, RT5665_SAR_IL_CMD_1, 0x2291);
1121 regmap_update_bits(rt5665->regmap, RT5665_MICBIAS_2, 0x100, 0);
1124 if (rt5665->jack_type == SND_JACK_HEADSET)
1126 rt5665->jack_type = 0;
1129 dev_dbg(component->dev, "jack_type = %d\n", rt5665->jack_type);
1130 return rt5665->jack_type;
1138 &rt5665->jack_detect_work, msecs_to_jiffies(250));
1148 if (snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010) {
1150 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0);
1152 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type,
1157 schedule_delayed_work(&rt5665->jd_check_work, 500);
1166 switch (rt5665->pdata.jd_src) {
1168 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
1170 regmap_update_bits(rt5665->regmap, RT5665_RC_CLK_CTRL,
1172 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_2,
1174 regmap_update_bits(rt5665->regmap, RT5665_IRQ_CTRL_1, 0x8, 0x8);
1181 dev_warn(component->dev, "Wrong JD source\n");
1185 rt5665->hs_jack = hs_jack;
1196 while (!rt5665->component) {
1201 while (!snd_soc_card_is_instantiated(rt5665->component->card)) {
1206 while (!rt5665->calibration_done) {
1211 mutex_lock(&rt5665->calibrate_mutex);
1213 val = snd_soc_component_read(rt5665->component, RT5665_AJD1_CTRL) & 0x0010;
1216 if (rt5665->jack_type == 0) {
1218 rt5665->jack_type =
1219 rt5665_headset_detect(rt5665->component, 1);
1222 rt5665->jack_type = SND_JACK_HEADSET;
1223 btn_type = rt5665_button_detect(rt5665->component);
1235 rt5665->jack_type |= SND_JACK_BTN_0;
1240 rt5665->jack_type |= SND_JACK_BTN_1;
1245 rt5665->jack_type |= SND_JACK_BTN_2;
1250 rt5665->jack_type |= SND_JACK_BTN_3;
1256 dev_err(rt5665->component->dev,
1264 rt5665->jack_type = rt5665_headset_detect(rt5665->component, 0);
1267 snd_soc_jack_report(rt5665->hs_jack, rt5665->jack_type,
1272 if (rt5665->jack_type & (SND_JACK_BTN_0 | SND_JACK_BTN_1 |
1274 schedule_delayed_work(&rt5665->jd_check_work, 0);
1276 cancel_delayed_work_sync(&rt5665->jd_check_work);
1278 mutex_unlock(&rt5665->calibrate_mutex);
1367 * set_dmic_clk - Set parameter of dmic.
1379 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1383 pd = rl6231_get_pre_div(rt5665->regmap,
1385 idx = rl6231_calc_dmic_clk(rt5665->sysclk / pd);
1388 dev_err(component->dev, "Failed to set DMIC clock\n");
1399 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1423 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1437 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1439 switch (w->shift) {
1481 /* I2S_Pre_Div1 should be 1 in asrc mode */
1738 /*MX-17 [6:4], MX-17 [2:0]*/
1758 /*MX-1B [6:4], MX-1B [2:0]*/
1778 /* MX-26 [13] [5] */
1798 /* MX-26 [11:10] [3:2] */
1818 /* MX-26 [12] [4] */
1838 /* MX-26 [8] */
1850 /* MX-26 [9] */
1862 /* MX-26 [1:0] */
1875 /* MX-27 [12] */
1889 /* MX-27 [13] */
1901 /* MX-27 [9][1]*/
1921 /* MX-27 [11:10], MX-27 [3:2] */
1941 /* MX-27 [8] */
1954 /* MX-27 [4] */
1967 /* MX-27 [5] */
1980 /* MX-27 [0] */
1994 /* MX-28 [13] [5] */
2014 /* MX-28 [11:10] [3:2] */
2034 /* MX-28 [12] [4] */
2054 /* MX-28 [8] */
2066 /* MX-28 [9] */
2078 /* MX-28 [1] */
2091 /* MX-29 [11:10], MX-29 [9:8]*/
2111 /* MX-2D [13:12], MX-2D [9:8]*/
2131 /* MX-2D [5:4], MX-2D [1:0]*/
2151 /* MX-2E [5:4], MX-2E [0]*/
2171 /* MX-2F [14:12] */
2184 /* MX-2F [6:4] */
2198 /* MX-30 [6:4] */
2212 /* MX-31 [11:10] [9:8] */
2233 /* MX-7a[10] */
2245 /* MX-7a[9] */
2257 /* MX-7a[8] */
2269 /* MX-7b[10] */
2281 /* MX-7b[9] */
2293 /* MX-7b[8] */
2305 /* MX-7b[7] */
2317 /* MX-7a[4:0] MX-7b[4:0] */
2374 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2406 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2432 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2472 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2476 switch (w->shift) {
2499 switch (w->shift) {
2530 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2533 switch (w->shift) {
2595 /* ASRC */
2596 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5665_ASRC_1,
2598 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5665_ASRC_1,
2600 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5665_ASRC_1,
2602 SND_SOC_DAPM_SUPPLY_S("DAC STO1 ASRC", 1, RT5665_ASRC_1,
2604 SND_SOC_DAPM_SUPPLY_S("DAC STO2 ASRC", 1, RT5665_ASRC_1,
2606 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5665_ASRC_1,
2608 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5665_ASRC_1,
2610 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5665_ASRC_1,
2612 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5665_ASRC_1,
2614 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5665_ASRC_1,
2616 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5665_ASRC_1,
2618 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5665_ASRC_1,
2620 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5665_ASRC_1,
2622 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5665_ASRC_1,
2624 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5665_ASRC_1,
3155 /*ASRC*/
3156 {"ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc},
3157 {"ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc},
3158 {"ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc},
3159 {"ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc},
3160 {"DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc},
3161 {"DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc},
3162 {"DAC Stereo1 Filter", NULL, "DAC STO1 ASRC", is_using_asrc},
3163 {"DAC Stereo2 Filter", NULL, "DAC STO2 ASRC", is_using_asrc},
3164 {"I2S1 ASRC", NULL, "CLKDET"},
3165 {"I2S2 ASRC", NULL, "CLKDET"},
3166 {"I2S3 ASRC", NULL, "CLKDET"},
3177 {"Stereo1 DMIC L Mux", NULL, "DMIC STO1 ASRC"},
3178 {"Stereo1 DMIC R Mux", NULL, "DMIC STO1 ASRC"},
3179 {"Stereo2 DMIC L Mux", NULL, "DMIC STO2 ASRC"},
3180 {"Stereo2 DMIC R Mux", NULL, "DMIC STO2 ASRC"},
3181 {"Mono DMIC L Mux", NULL, "DMIC MONO L ASRC"},
3182 {"Mono DMIC R Mux", NULL, "DMIC MONO R ASRC"},
3184 {"I2S1_1", NULL, "I2S1 ASRC"},
3185 {"I2S1_2", NULL, "I2S1 ASRC"},
3186 {"I2S2_1", NULL, "I2S2 ASRC"},
3187 {"I2S2_2", NULL, "I2S2 ASRC"},
3188 {"I2S3", NULL, "I2S3 ASRC"},
3952 struct snd_soc_component *component = dai->component;
3974 return -EINVAL;
3993 return -EINVAL;
4008 struct snd_soc_component *component = dai->component;
4013 rt5665->lrck[dai->id] = params_rate(params);
4014 pre_div = rl6231_get_clk_info(rt5665->sysclk, rt5665->lrck[dai->id]);
4016 dev_warn(component->dev, "Force using PLL");
4018 rt5665->sysclk, rt5665->lrck[dai->id] * 512);
4020 rt5665->lrck[dai->id] * 512, 0);
4025 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
4026 return -EINVAL;
4029 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
4030 rt5665->lrck[dai->id], pre_div, dai->id);
4048 return -EINVAL;
4051 switch (dai->id) {
4079 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
4080 return -EINVAL;
4086 switch (rt5665->lrck[dai->id]) {
4104 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) {
4108 if (rt5665->master[RT5665_AIF3]) {
4118 struct snd_soc_component *component = dai->component;
4124 rt5665->master[dai->id] = 1;
4128 rt5665->master[dai->id] = 0;
4131 return -EINVAL;
4141 return -EINVAL;
4157 return -EINVAL;
4160 switch (dai->id) {
4179 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
4180 return -EINVAL;
4191 if (freq == rt5665->sysclk && clk_id == rt5665->sysclk_src)
4208 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
4209 return -EINVAL;
4214 if (rt5665->master[RT5665_AIF2_1] || rt5665->master[RT5665_AIF2_2]) {
4218 if (rt5665->master[RT5665_AIF3]) {
4223 rt5665->sysclk = freq;
4224 rt5665->sysclk_src = clk_id;
4226 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
4239 if (source == rt5665->pll_src && freq_in == rt5665->pll_in &&
4240 freq_out == rt5665->pll_out)
4244 dev_dbg(component->dev, "PLL disabled\n");
4246 rt5665->pll_in = 0;
4247 rt5665->pll_out = 0;
4271 dev_err(component->dev, "Unknown PLL Source %d\n", source);
4272 return -EINVAL;
4277 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
4281 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
4291 rt5665->pll_in = freq_in;
4292 rt5665->pll_out = freq_out;
4293 rt5665->pll_src = source;
4300 struct snd_soc_component *component = dai->component;
4303 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
4305 rt5665->bclk[dai->id] = ratio;
4308 switch (dai->id) {
4333 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC,
4338 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1,
4340 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4342 regmap_update_bits(rt5665->regmap, RT5665_DIG_MISC,
4346 regmap_update_bits(rt5665->regmap, RT5665_PWR_DIG_1,
4348 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4363 rt5665->component = component;
4365 schedule_delayed_work(&rt5665->calibrate_work, msecs_to_jiffies(100));
4374 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4382 regcache_cache_only(rt5665->regmap, true);
4383 regcache_mark_dirty(rt5665->regmap);
4391 regcache_cache_only(rt5665->regmap, false);
4392 regcache_sync(rt5665->regmap);
4414 .name = "rt5665-aif1_1",
4433 .name = "rt5665-aif1_2",
4445 .name = "rt5665-aif2_1",
4464 .name = "rt5665-aif2_2",
4483 .name = "rt5665-aif3",
4544 rt5665->pdata.in1_diff = of_property_read_bool(dev->of_node,
4545 "realtek,in1-differential");
4546 rt5665->pdata.in2_diff = of_property_read_bool(dev->of_node,
4547 "realtek,in2-differential");
4548 rt5665->pdata.in3_diff = of_property_read_bool(dev->of_node,
4549 "realtek,in3-differential");
4550 rt5665->pdata.in4_diff = of_property_read_bool(dev->of_node,
4551 "realtek,in4-differential");
4553 of_property_read_u32(dev->of_node, "realtek,dmic1-data-pin",
4554 &rt5665->pdata.dmic1_data_pin);
4555 of_property_read_u32(dev->of_node, "realtek,dmic2-data-pin",
4556 &rt5665->pdata.dmic2_data_pin);
4557 of_property_read_u32(dev->of_node, "realtek,jd-src",
4558 &rt5665->pdata.jd_src);
4567 mutex_lock(&rt5665->calibrate_mutex);
4569 regcache_cache_bypass(rt5665->regmap, true);
4571 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4572 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602);
4573 regmap_write(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1, 0x0c26);
4574 regmap_write(rt5665->regmap, RT5665_MONOMIX_IN_GAIN, 0x021f);
4575 regmap_write(rt5665->regmap, RT5665_MONO_OUT, 0x480a);
4576 regmap_write(rt5665->regmap, RT5665_PWR_MIXER, 0x083f);
4577 regmap_write(rt5665->regmap, RT5665_PWR_DIG_1, 0x0180);
4578 regmap_write(rt5665->regmap, RT5665_EJD_CTRL_1, 0x4040);
4579 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0000);
4580 regmap_write(rt5665->regmap, RT5665_DIG_MISC, 0x0001);
4581 regmap_write(rt5665->regmap, RT5665_MICBIAS_2, 0x0380);
4582 regmap_write(rt5665->regmap, RT5665_GLB_CLK, 0x8000);
4583 regmap_write(rt5665->regmap, RT5665_ADDA_CLK_1, 0x1000);
4584 regmap_write(rt5665->regmap, RT5665_CHOP_DAC, 0x3030);
4585 regmap_write(rt5665->regmap, RT5665_CALIB_ADC_CTRL, 0x3c05);
4586 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xaa3e);
4588 regmap_write(rt5665->regmap, RT5665_PWR_ANLG_1, 0xfe7e);
4589 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_2, 0x0321);
4591 regmap_write(rt5665->regmap, RT5665_HP_CALIB_CTRL_1, 0xfc00);
4594 regmap_read(rt5665->regmap, RT5665_HP_CALIB_STA_1, &value);
4602 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4603 regcache_cache_bypass(rt5665->regmap, false);
4610 regmap_write(rt5665->regmap, RT5665_MONO_AMP_CALIB_CTRL_1, 0x9e24);
4613 regmap_read(rt5665->regmap, RT5665_MONO_AMP_CALIB_STA1, &value);
4621 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4622 regcache_cache_bypass(rt5665->regmap, false);
4629 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4630 regcache_cache_bypass(rt5665->regmap, false);
4632 regcache_mark_dirty(rt5665->regmap);
4633 regcache_sync(rt5665->regmap);
4635 regmap_write(rt5665->regmap, RT5665_BIAS_CUR_CTRL_8, 0xa602);
4636 regmap_write(rt5665->regmap, RT5665_ASRC_8, 0x0120);
4639 rt5665->calibration_done = true;
4640 mutex_unlock(&rt5665->calibrate_mutex);
4648 while (!snd_soc_card_is_instantiated(rt5665->component->card)) {
4658 struct rt5665_platform_data *pdata = dev_get_platdata(&i2c->dev);
4663 rt5665 = devm_kzalloc(&i2c->dev, sizeof(struct rt5665_priv),
4667 return -ENOMEM;
4672 rt5665->pdata = *pdata;
4674 rt5665_parse_dt(rt5665, &i2c->dev);
4676 ret = devm_regulator_bulk_get_enable(&i2c->dev, ARRAY_SIZE(rt5665_supply_names),
4679 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
4683 rt5665->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev,
4684 "realtek,ldo1-en",
4686 if (IS_ERR(rt5665->gpiod_ldo1_en)) {
4687 dev_err(&i2c->dev, "Failed gpio request ldo1_en\n");
4688 return PTR_ERR(rt5665->gpiod_ldo1_en);
4694 rt5665->regmap = devm_regmap_init_i2c(i2c, &rt5665_regmap);
4695 if (IS_ERR(rt5665->regmap)) {
4696 ret = PTR_ERR(rt5665->regmap);
4697 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4702 regmap_read(rt5665->regmap, RT5665_DEVICE_ID, &val);
4704 dev_err(&i2c->dev,
4706 return -ENODEV;
4709 regmap_read(rt5665->regmap, RT5665_RESET, &val);
4712 rt5665->id = CODEC_5666;
4716 rt5665->id = CODEC_5665;
4720 regmap_write(rt5665->regmap, RT5665_RESET, 0);
4723 if (rt5665->pdata.in1_diff)
4724 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2,
4726 if (rt5665->pdata.in2_diff)
4727 regmap_update_bits(rt5665->regmap, RT5665_IN1_IN2,
4729 if (rt5665->pdata.in3_diff)
4730 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4,
4732 if (rt5665->pdata.in4_diff)
4733 regmap_update_bits(rt5665->regmap, RT5665_IN3_IN4,
4737 if (rt5665->pdata.dmic1_data_pin != RT5665_DMIC1_NULL ||
4738 rt5665->pdata.dmic2_data_pin != RT5665_DMIC2_NULL) {
4739 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2,
4741 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4743 switch (rt5665->pdata.dmic1_data_pin) {
4745 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4750 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4752 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4757 dev_dbg(&i2c->dev, "no DMIC1\n");
4761 switch (rt5665->pdata.dmic2_data_pin) {
4763 regmap_update_bits(rt5665->regmap, RT5665_DMIC_CTRL_1,
4768 regmap_update_bits(rt5665->regmap,
4772 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_1,
4777 dev_dbg(&i2c->dev, "no DMIC2\n");
4783 regmap_write(rt5665->regmap, RT5665_HP_LOGIC_CTRL_2, 0x0002);
4784 regmap_update_bits(rt5665->regmap, RT5665_EJD_CTRL_1,
4787 regmap_update_bits(rt5665->regmap, RT5665_STO1_DAC_SIL_DET,
4790 regmap_update_bits(rt5665->regmap, RT5665_HP_CHARGE_PUMP_1,
4794 if (rt5665->id == CODEC_5666) {
4795 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_2,
4797 regmap_update_bits(rt5665->regmap, RT5665_GPIO_CTRL_3,
4802 regmap_update_bits(rt5665->regmap, RT5665_PWR_ANLG_1,
4806 INIT_DELAYED_WORK(&rt5665->jack_detect_work,
4808 INIT_DELAYED_WORK(&rt5665->calibrate_work,
4810 INIT_DELAYED_WORK(&rt5665->jd_check_work,
4813 mutex_init(&rt5665->calibrate_mutex);
4815 if (i2c->irq) {
4816 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4820 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
4824 return devm_snd_soc_register_component(&i2c->dev,
4833 regmap_write(rt5665->regmap, RT5665_RESET, 0);