Lines Matching +full:8 +full:- +full:15
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5659.h -- RT5659/RT5658 ALSA SoC audio driver
21 /* I/O - Output */
31 /* I/O - Input */
36 /* I/O - Speaker */
42 /* I/O - Sidetone */
44 /* I/O - ADC/DAC/DMIC */
56 /* Mixer - D-D */
65 /* Mixer - PDM */
73 /* Mixer - ADC */
85 /* Mixer - DAC */
127 /* Format - ADC/DAC */
135 /* Format - TDM Control */
142 /* Function - Analog */
170 /* Function - Digital */
539 #define RT5659_L_MUTE (0x1 << 15)
540 #define RT5659_L_MUTE_SFT 15
547 #define RT5659_L_VOL_MASK (0x3f << 8)
548 #define RT5659_L_VOL_SFT 8
553 #define RT5659_G_HP (0x1f << 8)
554 #define RT5659_G_HP_SFT 8
559 #define RT5659_IN1_DF_MASK (0x1 << 15)
560 #define RT5659_IN1_DF 15
561 #define RT5659_BST1_MASK (0x7f << 8)
562 #define RT5659_BST1_SFT 8
567 #define RT5659_IN3_DF_MASK (0x1 << 15)
568 #define RT5659_IN3_DF 15
569 #define RT5659_BST3_MASK (0x7f << 8)
570 #define RT5659_BST3_SFT 8
577 #define RT5659_INL_VOL_MASK (0x1f << 8)
578 #define RT5659_INL_VOL_SFT 8
583 #define RT5659_EMB_JD_EN (0x1 << 15)
584 #define RT5659_EMB_JD_EN_SFT 15
603 #define RT5659_SIL_DET_MASK (0x1 << 15)
604 #define RT5659_SIL_DET_DIS (0x0 << 15)
605 #define RT5659_SIL_DET_EN (0x1 << 15)
614 #define RT5659_DAC_L1_VOL_MASK (0xff << 8)
615 #define RT5659_DAC_L1_VOL_SFT 8
620 #define RT5659_DAC_L2_VOL_MASK (0xff << 8)
621 #define RT5659_DAC_L2_VOL_SFT 8
636 #define RT5659_ADC_L_VOL_MASK (0x7f << 8)
637 #define RT5659_ADC_L_VOL_SFT 8
642 #define RT5659_MONO_ADC_L_VOL_MASK (0x7f << 8)
643 #define RT5659_MONO_ADC_L_VOL_SFT 8
666 #define RT5659_M_STO1_ADC_L1 (0x1 << 15)
667 #define RT5659_M_STO1_ADC_L1_SFT 15
680 #define RT5659_STO1_DMIC_SRC_MASK (0x1 << 8)
681 #define RT5659_STO1_DMIC_SRC_SFT 8
682 #define RT5659_STO1_DMIC_SRC_DMIC2 (0x1 << 8)
683 #define RT5659_STO1_DMIC_SRC_DMIC1 (0x0 << 8)
690 #define RT5659_M_MONO_ADC_L1 (0x1 << 15)
691 #define RT5659_M_MONO_ADC_L1_SFT 15
700 #define RT5659_MONO_DMIC_L_SRC_MASK (0x1 << 8)
701 #define RT5659_MONO_DMIC_L_SRC_SFT 8
718 #define RT5659_M_ADCMIX_L (0x1 << 15)
719 #define RT5659_M_ADCMIX_L_SFT 15
727 #define RT5659_DAC1_L_SEL_MASK (0x3 << 8)
728 #define RT5659_DAC1_L_SEL_SFT 8
729 #define RT5659_DAC1_L_SEL_IF1 (0x0 << 8)
730 #define RT5659_DAC1_L_SEL_IF2 (0x1 << 8)
731 #define RT5659_DAC1_L_SEL_IF3 (0x2 << 8)
738 #define RT5659_M_DAC_L1_STO_L (0x1 << 15)
739 #define RT5659_M_DAC_L1_STO_L_SFT 15
752 #define RT5659_G_DAC_R2_STO_L_MASK (0x1 << 8)
753 #define RT5659_G_DAC_R2_STO_L_SFT 8
772 #define RT5659_M_DAC_L1_MONO_L (0x1 << 15)
773 #define RT5659_M_DAC_L1_MONO_L_SFT 15
786 #define RT5659_G_DAC_R2_MONO_L_MASK (0x1 << 8)
787 #define RT5659_G_DAC_R2_MONO_L_SFT 8
832 #define RT5659_IF2_ADC_SEL_MASK (0x3 << 8)
833 #define RT5659_IF2_ADC_SEL_SFT 8
842 #define RT5659_PDM1_L_MASK (0x1 << 15)
843 #define RT5659_PDM1_L_SFT 15
919 #define RT5659_M_SPKVOLR_SPKOMIX (0x1 << 8)
920 #define RT5659_M_SPKVOLR_SPKOMIX_SFT 8
925 #define RT5659_M_DAC_L2_MA (0x1 << 8)
926 #define RT5659_M_DAC_L2_MA_SFT 8
975 #define RT5659_M_DAC_L2_LM (0x1 << 15)
976 #define RT5659_M_DAC_L2_LM_SFT 15
985 #define RT5659_PWR_I2S1 (0x1 << 15)
986 #define RT5659_PWR_I2S1_BIT 15
999 #define RT5659_PWR_DAC_R2 (0x1 << 8)
1000 #define RT5659_PWR_DAC_R2_BIT 8
1015 #define RT5659_PWR_ADC_S1F (0x1 << 15)
1016 #define RT5659_PWR_ADC_S1F_BIT 15
1027 #define RT5659_PWR_DAC_MF_R (0x1 << 8)
1028 #define RT5659_PWR_DAC_MF_R_BIT 8
1033 #define RT5659_PWR_VREF1 (0x1 << 15)
1034 #define RT5659_PWR_VREF1_BIT 15
1047 #define RT5659_PWR_LM (0x1 << 8)
1048 #define RT5659_PWR_LM_BIT 8
1059 #define RT5659_PWR_BST1 (0x1 << 15)
1060 #define RT5659_PWR_BST1_BIT 15
1089 #define RT5659_PWR_BST_L (0x1 << 8)
1090 #define RT5659_PWR_BST_L_BIT 8
1107 #define RT5659_PWR_OM_L (0x1 << 15)
1108 #define RT5659_PWR_OM_L_BIT 15
1119 #define RT5659_PWR_MM (0x1 << 8)
1120 #define RT5659_PWR_MM_BIT 8
1127 #define RT5659_PWR_SV_L (0x1 << 15)
1128 #define RT5659_PWR_SV_L_BIT 15
1137 #define RT5659_PWR_IN_R (0x1 << 8)
1138 #define RT5659_PWR_IN_R_BIT 8
1145 #define RT5659_I2S_MS_MASK (0x1 << 15)
1146 #define RT5659_I2S_MS_SFT 15
1147 #define RT5659_I2S_MS_M (0x0 << 15)
1148 #define RT5659_I2S_MS_S (0x1 << 15)
1159 #define RT5659_I2S_BP_MASK (0x1 << 8)
1160 #define RT5659_I2S_BP_SFT 8
1161 #define RT5659_I2S_BP_NOR (0x0 << 8)
1162 #define RT5659_I2S_BP_INV (0x1 << 8)
1193 #define RT5659_I2S_PD2_MASK (0x7 << 8)
1194 #define RT5659_I2S_PD2_SFT 8
1195 #define RT5659_I2S_PD2_1 (0x0 << 8)
1196 #define RT5659_I2S_PD2_2 (0x1 << 8)
1197 #define RT5659_I2S_PD2_3 (0x2 << 8)
1198 #define RT5659_I2S_PD2_4 (0x3 << 8)
1199 #define RT5659_I2S_PD2_6 (0x4 << 8)
1200 #define RT5659_I2S_PD2_8 (0x5 << 8)
1201 #define RT5659_I2S_PD2_12 (0x6 << 8)
1202 #define RT5659_I2S_PD2_16 (0x7 << 8)
1231 #define RT5659_DMIC_1_EN_MASK (0x1 << 15)
1232 #define RT5659_DMIC_1_EN_SFT 15
1233 #define RT5659_DMIC_1_DIS (0x0 << 15)
1234 #define RT5659_DMIC_1_EN (0x1 << 15)
1266 #define RT5659_DS_ADC_SLOT67_SFT 8
1315 #define RT5659_DAC_MONO_R_ASRC_MASK (0x1 << 8)
1316 #define RT5659_DAC_MONO_R_ASRC_SFT 8
1333 #define RT5659_DA_MONO_L_T_MASK (0x7 << 8)
1334 #define RT5659_DA_MONO_L_T_SFT 8
1341 #define RT5659_AD_STO2_T_MASK (0x7 << 8)
1342 #define RT5659_AD_STO2_T_SFT 8
1351 #define RT5659_I2S2_RATE_MASK (0xf << 8)
1352 #define RT5659_I2S2_RATE_SFT 8
1357 #define RT5659_SMT_TRIG_MASK (0x1 << 15)
1358 #define RT5659_SMT_TRIG_SFT 15
1359 #define RT5659_SMT_TRIG_DIS (0x0 << 15)
1360 #define RT5659_SMT_TRIG_EN (0x1 << 15)
1365 #define RT5659_HP_R_SMT_MASK (0x1 << 8)
1366 #define RT5659_HP_R_SMT_SFT 8
1367 #define RT5659_HP_R_SMT_DIS (0x0 << 8)
1368 #define RT5659_HP_R_SMT_EN (0x1 << 8)
1419 #define RT5659_MRES_MASK (0x3 << 8)
1420 #define RT5659_MRES_SFT 8
1421 #define RT5659_MRES_15MO (0x0 << 8)
1422 #define RT5659_MRES_25MO (0x1 << 8)
1423 #define RT5659_MRES_35MO (0x2 << 8)
1424 #define RT5659_MRES_45MO (0x3 << 8)
1439 #define RT5659_CP_FQ1_MASK (0x7 << 8)
1440 #define RT5659_CP_FQ1_SFT 8
1463 #define RT5659_PM_HP_MASK (0x3 << 8)
1464 #define RT5659_PM_HP_SFT 8
1465 #define RT5659_PM_HP_LV (0x0 << 8)
1466 #define RT5659_PM_HP_MV (0x1 << 8)
1467 #define RT5659_PM_HP_HV (0x2 << 8)
1476 #define RT5659_PVDD_DET_MASK (0x1 << 15)
1477 #define RT5659_PVDD_DET_SFT 15
1478 #define RT5659_PVDD_DET_DIS (0x0 << 15)
1479 #define RT5659_PVDD_DET_EN (0x1 << 15)
1486 #define RT5659_MIC1_BS_MASK (0x1 << 15)
1487 #define RT5659_MIC1_BS_SFT 15
1488 #define RT5659_MIC1_BS_9AV (0x0 << 15)
1489 #define RT5659_MIC1_BS_75AV (0x1 << 15)
1511 #define RT5659_MIC2_OVCD_MASK (0x1 << 8)
1512 #define RT5659_MIC2_OVCD_SFT 8
1513 #define RT5659_MIC2_OVCD_DIS (0x0 << 8)
1514 #define RT5659_MIC2_OVCD_EN (0x1 << 8)
1563 #define RT5659_EQ_SRC_DAC (0x0 << 15)
1564 #define RT5659_EQ_SRC_ADC (0x1 << 15)
1571 #define RT5659_EQ_DITH_MASK (0x3 << 8)
1572 #define RT5659_EQ_DITH_SFT 8
1573 #define RT5659_EQ_DITH_NOR (0x0 << 8)
1574 #define RT5659_EQ_DITH_LSB (0x1 << 8)
1575 #define RT5659_EQ_DITH_LSB_1 (0x2 << 8)
1576 #define RT5659_EQ_DITH_LSB_2 (0x3 << 8)
1579 #define RT5659_JD1_1_EN_MASK (0x1 << 15)
1580 #define RT5659_JD1_1_EN_SFT 15
1581 #define RT5659_JD1_1_DIS (0x0 << 15)
1582 #define RT5659_JD1_1_EN (0x1 << 15)
1596 #define RT5659_GP1_PIN_MASK (0x1 << 15)
1597 #define RT5659_GP1_PIN_SFT 15
1598 #define RT5659_GP1_PIN_GPIO1 (0x0 << 15)
1599 #define RT5659_GP1_PIN_IRQ (0x1 << 15)
1624 #define RT5659_GP8_PIN_MASK (0x1 << 8)
1625 #define RT5659_GP8_PIN_SFT 8
1626 #define RT5659_GP8_PIN_GPIO8 (0x0 << 8)
1627 #define RT5659_GP8_PIN_PDM_SDA (0x1 << 8)
1663 #define RT5659_I2S2_PIN_MASK (0x1 << 15)
1664 #define RT5659_I2S2_PIN_SFT 15
1665 #define RT5659_I2S2_PIN_I2S (0x0 << 15)
1666 #define RT5659_I2S2_PIN_GPIO (0x1 << 15)
1669 #define RT5659_SV_MASK (0x1 << 15)
1670 #define RT5659_SV_SFT 15
1671 #define RT5659_SV_DIS (0x0 << 15)
1672 #define RT5659_SV_EN (0x1 << 15)
1693 #define RT5659_ZCD_HP_MASK (0x1 << 15)
1694 #define RT5659_ZCD_HP_SFT 15
1695 #define RT5659_ZCD_HP_DIS (0x0 << 15)
1696 #define RT5659_ZCD_HP_EN (0x1 << 15)
1699 #define RT5659_4BTN_IL_MASK (0x1 << 15)
1700 #define RT5659_4BTN_IL_EN (0x1 << 15)
1701 #define RT5659_4BTN_IL_DIS (0x0 << 15)
1757 #define RT5659_NG2_EN_MASK (0x1 << 15)
1758 #define RT5659_NG2_EN (0x1 << 15)
1759 #define RT5659_NG2_DIS (0x0 << 15)