Lines Matching +full:asrc +full:- +full:clk +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
3 * rt5659.c -- RT5659/RT5658 ALSA SoC audio codec driver
9 #include <linux/clk.h>
25 #include <sound/soc-dapm.h>
1136 static const DECLARE_TLV_DB_SCALE(hp_vol_tlv, -2325, 75, 0);
1137 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
1138 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
1139 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
1140 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
1142 static const DECLARE_TLV_DB_SCALE(in_bst_tlv, -1200, 75, 0);
1249 * rt5659_headset_detect - Detect headset.
1296 rt5659->jack_type = SND_JACK_HEADSET;
1301 rt5659->jack_type = SND_JACK_HEADPHONE;
1309 if (rt5659->jack_type == SND_JACK_HEADSET)
1311 rt5659->jack_type = 0;
1314 dev_dbg(component->dev, "jack_type = %d\n", rt5659->jack_type);
1315 return rt5659->jack_type;
1334 &rt5659->jack_detect_work, msecs_to_jiffies(250));
1344 rt5659->hs_jack = hs_jack;
1358 if (!rt5659->component)
1361 val = snd_soc_component_read(rt5659->component, RT5659_INT_ST_1) & 0x0080;
1364 if (rt5659->jack_type == 0) {
1366 report = rt5659_headset_detect(rt5659->component, 1);
1370 btn_type = rt5659_button_detect(rt5659->component);
1403 dev_err(rt5659->component->dev,
1411 report = rt5659->jack_type;
1415 report = rt5659_headset_detect(rt5659->component, 0);
1418 snd_soc_jack_report(rt5659->hs_jack, report, SND_JACK_HEADSET |
1430 if (!rt5659->hs_jack)
1434 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
1437 if (hp_flag != rt5659->hda_hp_plugged) {
1438 rt5659->hda_hp_plugged = hp_flag;
1441 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1443 rt5659->jack_type |= SND_JACK_HEADPHONE;
1445 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
1447 rt5659->jack_type = rt5659->jack_type &
1451 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1456 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
1457 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
1460 if (mic_flag != rt5659->hda_mic_plugged) {
1461 rt5659->hda_mic_plugged = mic_flag;
1463 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1465 rt5659->jack_type |= SND_JACK_MICROPHONE;
1467 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
1469 rt5659->jack_type = rt5659->jack_type
1473 snd_soc_jack_report(rt5659->hs_jack, rt5659->jack_type,
1555 * set_dmic_clk - Set parameter of dmic.
1567 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1571 pd = rl6231_get_pre_div(rt5659->regmap,
1573 idx = rl6231_calc_dmic_clk(rt5659->sysclk / pd);
1576 dev_err(component->dev, "Failed to set DMIC clock\n");
1587 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1613 snd_soc_dapm_to_component(w->dapm);
1638 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1659 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1673 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1675 switch (w->shift) {
1709 /* I2S_Pre_Div1 should be 1 in asrc mode */
1968 /*MX-1B [6:4], MX-1B [2:0]*/
1989 /* MX-26 [13] */
2002 /* MX-26 [12] */
2015 /* MX-26 [11] */
2028 /* MX-26 [8] */
2042 /* MX-27 [12] */
2056 /* MX-27 [11] */
2069 /* MX-27 [10:9], MX-27 [2:1] */
2089 /* MX-27 [8] */
2102 /* MX-27 [4] */
2115 /* MX-27 [3] */
2128 /* MX-27 [0] */
2142 /* MX-29 [11:10], MX-29 [9:8]*/
2162 /* MX-2C [6], MX-2C [4]*/
2182 /* MX-2D [3], MX-2D [2]*/
2202 /* MX-2D [1], MX-2D [0]*/
2222 /* MX-2F [13:12] */
2235 /* MX-2F [1:0] */
2248 /* MX-31 [15] [13] */
2268 /* MX-36 [1:0] */
2281 /* MX-78[4:0] */
2346 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2378 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2400 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
2450 /* ASRC */
2451 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5659_ASRC_1,
2453 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5659_ASRC_1,
2455 SND_SOC_DAPM_SUPPLY_S("I2S3 ASRC", 1, RT5659_ASRC_1,
2457 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5659_ASRC_1,
2459 SND_SOC_DAPM_SUPPLY_S("DAC Mono L ASRC", 1, RT5659_ASRC_1,
2461 SND_SOC_DAPM_SUPPLY_S("DAC Mono R ASRC", 1, RT5659_ASRC_1,
2463 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5659_ASRC_1,
2465 SND_SOC_DAPM_SUPPLY_S("ADC Mono L ASRC", 1, RT5659_ASRC_1,
2467 SND_SOC_DAPM_SUPPLY_S("ADC Mono R ASRC", 1, RT5659_ASRC_1,
2494 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
2824 SND_SOC_DAPM_SUPPLY("SYS CLK DET", RT5659_CLK_DET, 3, 0, NULL, 0),
2850 /*ASRC*/
2851 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
2852 { "ADC Mono Left Filter", NULL, "ADC Mono L ASRC", is_using_asrc },
2853 { "ADC Mono Right Filter", NULL, "ADC Mono R ASRC", is_using_asrc },
2854 { "DAC Mono Left Filter", NULL, "DAC Mono L ASRC", is_using_asrc },
2855 { "DAC Mono Right Filter", NULL, "DAC Mono R ASRC", is_using_asrc },
2856 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
2858 { "SYS CLK DET", NULL, "CLKDET" },
2860 { "I2S1", NULL, "I2S1 ASRC" },
2861 { "I2S2", NULL, "I2S2 ASRC" },
2862 { "I2S3", NULL, "I2S3 ASRC" },
2927 { "DMIC L1", NULL, "DMIC CLK" },
2929 { "DMIC R1", NULL, "DMIC CLK" },
2931 { "DMIC L2", NULL, "DMIC CLK" },
2933 { "DMIC R2", NULL, "DMIC CLK" },
3219 { "SPK Amp", NULL, "SYS CLK DET" },
3229 { "Mono Amp", NULL, "SYS CLK DET" },
3236 { "HP Amp", NULL, "SYS CLK DET" },
3251 { "LOUT Amp", NULL, "SYS CLK DET" },
3278 struct snd_soc_component *component = dai->component;
3283 rt5659->lrck[dai->id] = params_rate(params);
3284 pre_div = rl6231_get_clk_info(rt5659->sysclk, rt5659->lrck[dai->id]);
3286 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
3287 rt5659->lrck[dai->id], dai->id);
3288 return -EINVAL;
3292 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
3293 return -EINVAL;
3296 dev_dbg(dai->dev, "lrck is %dHz and pre_div is %d for iis %d\n",
3297 rt5659->lrck[dai->id], pre_div, dai->id);
3312 return -EINVAL;
3315 switch (dai->id) {
3335 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3336 return -EINVAL;
3341 switch (rt5659->lrck[dai->id]) {
3361 struct snd_soc_component *component = dai->component;
3367 rt5659->master[dai->id] = 1;
3371 rt5659->master[dai->id] = 0;
3374 return -EINVAL;
3384 return -EINVAL;
3400 return -EINVAL;
3403 switch (dai->id) {
3420 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
3421 return -EINVAL;
3433 if (freq == rt5659->sysclk && clk_id == rt5659->sysclk_src)
3438 ret = clk_set_rate(rt5659->mclk, freq);
3451 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
3452 return -EINVAL;
3456 rt5659->sysclk = freq;
3457 rt5659->sysclk_src = clk_id;
3459 dev_dbg(component->dev, "Sysclk is %dHz and clock id is %d\n",
3473 if (source == rt5659->pll_src && freq_in == rt5659->pll_in &&
3474 freq_out == rt5659->pll_out)
3478 dev_dbg(component->dev, "PLL disabled\n");
3480 rt5659->pll_in = 0;
3481 rt5659->pll_out = 0;
3505 dev_err(component->dev, "Unknown PLL source %d\n", source);
3506 return -EINVAL;
3511 dev_err(component->dev, "Unsupported input clock %d\n", freq_in);
3515 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
3525 rt5659->pll_in = freq_in;
3526 rt5659->pll_out = freq_out;
3527 rt5659->pll_src = source;
3535 struct snd_soc_component *component = dai->component;
3557 return -EINVAL;
3576 return -EINVAL;
3586 struct snd_soc_component *component = dai->component;
3589 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
3591 rt5659->bclk[dai->id] = ratio;
3594 switch (dai->id) {
3620 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3622 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3624 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3628 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3634 if (dapm->bias_level == SND_SOC_BIAS_OFF) {
3635 ret = clk_prepare_enable(rt5659->mclk);
3637 dev_err(component->dev,
3645 regmap_update_bits(rt5659->regmap, RT5659_PWR_DIG_1,
3647 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
3651 regmap_update_bits(rt5659->regmap, RT5659_DIG_MISC,
3653 clk_disable_unprepare(rt5659->mclk);
3669 rt5659->component = component;
3671 switch (rt5659->pdata.jd_src) {
3689 regmap_write(rt5659->regmap, RT5659_RESET, 0);
3697 regcache_cache_only(rt5659->regmap, true);
3698 regcache_mark_dirty(rt5659->regmap);
3706 regcache_cache_only(rt5659->regmap, false);
3707 regcache_sync(rt5659->regmap);
3729 .name = "rt5659-aif1",
3748 .name = "rt5659-aif2",
3767 .name = "rt5659-aif3",
3826 rt5659->pdata.in1_diff = device_property_read_bool(dev,
3827 "realtek,in1-differential");
3828 rt5659->pdata.in3_diff = device_property_read_bool(dev,
3829 "realtek,in3-differential");
3830 rt5659->pdata.in4_diff = device_property_read_bool(dev,
3831 "realtek,in4-differential");
3834 device_property_read_u32(dev, "realtek,dmic1-data-pin",
3835 &rt5659->pdata.dmic1_data_pin);
3836 device_property_read_u32(dev, "realtek,dmic2-data-pin",
3837 &rt5659->pdata.dmic2_data_pin);
3838 device_property_read_u32(dev, "realtek,jd-src",
3839 &rt5659->pdata.jd_src);
3850 regmap_write(rt5659->regmap, RT5659_BIAS_CUR_CTRL_8, 0xa502);
3851 regmap_write(rt5659->regmap, RT5659_CHOP_DAC, 0x3030);
3853 regmap_write(rt5659->regmap, RT5659_PRE_DIV_1, 0xef00);
3854 regmap_write(rt5659->regmap, RT5659_PRE_DIV_2, 0xeffc);
3855 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0280);
3856 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0001);
3857 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x8000);
3859 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xaa7e);
3861 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe7e);
3863 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0004);
3864 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0400);
3866 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0080);
3868 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0009);
3870 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0f80);
3872 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0e16);
3876 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0505);
3878 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0184);
3879 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x3c05);
3880 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c1);
3883 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3884 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x5100);
3885 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0014);
3886 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0xd100);
3890 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3891 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4900);
3892 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0016);
3893 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3898 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3905 dev_err(rt5659->component->dev,
3914 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x2cc1);
3915 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x0000);
3916 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, 0x4500);
3917 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x001f);
3918 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_1,
3923 regmap_read(rt5659->regmap, RT5659_HP_CALIB_CTRL_1, &value);
3930 dev_err(rt5659->component->dev,
3938 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_7, 0x0000);
3939 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
3943 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
3944 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0260);
3945 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x3000);
3946 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0xc000);
3947 regmap_write(rt5659->regmap, RT5659_A_DAC_MUX, 0x000c);
3948 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x8000);
3949 regmap_write(rt5659->regmap, RT5659_SPO_VOL, 0x0808);
3950 regmap_write(rt5659->regmap, RT5659_SPK_L_MIXER, 0x001e);
3951 regmap_write(rt5659->regmap, RT5659_SPK_R_MIXER, 0x001e);
3952 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0803);
3953 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0554);
3954 regmap_write(rt5659->regmap, RT5659_SPO_AMP_GAIN, 0x1103);
3957 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0909);
3958 regmap_update_bits(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x0001,
3962 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0000);
3963 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x0021);
3964 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1, 0x3e80);
3965 regmap_update_bits(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_1,
3970 regmap_read(rt5659->regmap,
3978 dev_err(rt5659->component->dev,
3988 regmap_write(rt5659->regmap, RT5659_DIG_MISC, 0x0000);
3989 regmap_write(rt5659->regmap, RT5659_MONOMIX_IN_GAIN, 0x021f);
3990 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0x480a);
3992 regmap_write(rt5659->regmap, RT5659_MONO_GAIN, 0x0003);
3993 regmap_write(rt5659->regmap, RT5659_MONO_NG2_CTRL_5, 0x0009);
3996 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x000f);
3997 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e00);
3998 regmap_update_bits(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4003 regmap_read(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1,
4011 dev_err(rt5659->component->dev,
4019 regmap_write(rt5659->regmap, RT5659_SPK_DC_CAILB_CTRL_3, 0x0003);
4023 regmap_write(rt5659->regmap, RT5659_CAL_REC, 0x0808);
4024 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_3, 0x0000);
4025 regmap_write(rt5659->regmap, RT5659_CALIB_ADC_CTRL, 0x2005);
4026 regmap_write(rt5659->regmap, RT5659_HP_CALIB_CTRL_2, 0x20c0);
4027 regmap_write(rt5659->regmap, RT5659_DEPOP_1, 0x0000);
4028 regmap_write(rt5659->regmap, RT5659_CLASSD_1, 0x0011);
4029 regmap_write(rt5659->regmap, RT5659_CLASSD_2, 0x0150);
4030 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0xfe3e);
4031 regmap_write(rt5659->regmap, RT5659_MONO_OUT, 0xc80a);
4032 regmap_write(rt5659->regmap, RT5659_MONO_AMP_CALIB_CTRL_1, 0x1e04);
4033 regmap_write(rt5659->regmap, RT5659_PWR_MIXER, 0x0000);
4034 regmap_write(rt5659->regmap, RT5659_PWR_VOL, 0x0000);
4035 regmap_write(rt5659->regmap, RT5659_PWR_DIG_1, 0x0000);
4036 regmap_write(rt5659->regmap, RT5659_PWR_DIG_2, 0x0000);
4037 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_1, 0x003e);
4038 regmap_write(rt5659->regmap, RT5659_CLASSD_CTRL_1, 0x0060);
4039 regmap_write(rt5659->regmap, RT5659_CLASSD_0, 0x2021);
4040 regmap_write(rt5659->regmap, RT5659_GLB_CLK, 0x0000);
4041 regmap_write(rt5659->regmap, RT5659_MICBIAS_2, 0x0080);
4042 regmap_write(rt5659->regmap, RT5659_HP_VOL, 0x8080);
4043 regmap_write(rt5659->regmap, RT5659_HP_CHARGE_PUMP_1, 0x0c16);
4050 regmap_read(rt5659->regmap, RT5659_GPIO_STA, &value);
4052 rt5659->hda_hp_plugged = true;
4053 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4056 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_1,
4060 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4064 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4067 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_3, RT5659_PWR_LDO2,
4069 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_2, RT5659_PWR_MB1,
4071 regmap_update_bits(rt5659->regmap, RT5659_PWR_VOL, RT5659_PWR_MIC_DET,
4075 regmap_update_bits(rt5659->regmap, RT5659_4BTN_IL_CMD_2,
4077 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4078 regmap_write(rt5659->regmap, RT5659_4BTN_IL_CMD_1, value);
4079 regmap_read(rt5659->regmap, RT5659_4BTN_IL_CMD_1, &value);
4082 rt5659->hda_mic_plugged = true;
4083 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4086 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4090 regmap_update_bits(rt5659->regmap, RT5659_IRQ_CTRL_2,
4096 struct rt5659_platform_data *pdata = dev_get_platdata(&i2c->dev);
4101 rt5659 = devm_kzalloc(&i2c->dev, sizeof(struct rt5659_priv),
4105 return -ENOMEM;
4110 rt5659->pdata = *pdata;
4112 rt5659_parse_dt(rt5659, &i2c->dev);
4114 rt5659->gpiod_ldo1_en = devm_gpiod_get_optional(&i2c->dev, "ldo1-en",
4116 if (IS_ERR(rt5659->gpiod_ldo1_en))
4117 dev_warn(&i2c->dev, "Request ldo1-en GPIO failed\n");
4119 rt5659->gpiod_reset = devm_gpiod_get_optional(&i2c->dev, "reset",
4125 rt5659->regmap = devm_regmap_init_i2c(i2c, &rt5659_regmap);
4126 if (IS_ERR(rt5659->regmap)) {
4127 ret = PTR_ERR(rt5659->regmap);
4128 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
4133 regmap_read(rt5659->regmap, RT5659_DEVICE_ID, &val);
4135 dev_err(&i2c->dev,
4137 return -ENODEV;
4140 regmap_write(rt5659->regmap, RT5659_RESET, 0);
4143 rt5659->mclk = devm_clk_get_optional(&i2c->dev, "mclk");
4144 if (IS_ERR(rt5659->mclk))
4145 return PTR_ERR(rt5659->mclk);
4150 if (rt5659->pdata.in1_diff)
4151 regmap_update_bits(rt5659->regmap, RT5659_IN1_IN2,
4153 if (rt5659->pdata.in3_diff)
4154 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4156 if (rt5659->pdata.in4_diff)
4157 regmap_update_bits(rt5659->regmap, RT5659_IN3_IN4,
4161 if (rt5659->pdata.dmic1_data_pin != RT5659_DMIC1_NULL ||
4162 rt5659->pdata.dmic2_data_pin != RT5659_DMIC2_NULL) {
4163 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4166 switch (rt5659->pdata.dmic1_data_pin) {
4168 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4173 regmap_update_bits(rt5659->regmap,
4177 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4179 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4184 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4186 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4191 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4193 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4199 dev_dbg(&i2c->dev, "no DMIC1\n");
4203 switch (rt5659->pdata.dmic2_data_pin) {
4205 regmap_update_bits(rt5659->regmap,
4212 regmap_update_bits(rt5659->regmap,
4216 regmap_update_bits(rt5659->regmap,
4223 regmap_update_bits(rt5659->regmap,
4227 regmap_update_bits(rt5659->regmap,
4234 regmap_update_bits(rt5659->regmap,
4238 regmap_update_bits(rt5659->regmap,
4245 dev_dbg(&i2c->dev, "no DMIC2\n");
4250 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4259 regmap_update_bits(rt5659->regmap, RT5659_DMIC_CTRL_1,
4264 switch (rt5659->pdata.jd_src) {
4266 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0xa880);
4267 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x9000);
4268 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_1, 0xc800);
4269 regmap_update_bits(rt5659->regmap, RT5659_PWR_ANLG_1,
4271 regmap_write(rt5659->regmap, RT5659_PWR_ANLG_2, 0x0001);
4272 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_2, 0x0040);
4273 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4277 regmap_write(rt5659->regmap, RT5659_GPIO_CTRL_3, 0x8000);
4278 regmap_write(rt5659->regmap, RT5659_RC_CLK_CTRL, 0x0900);
4279 regmap_write(rt5659->regmap, RT5659_EJD_CTRL_1, 0x70c0);
4280 regmap_write(rt5659->regmap, RT5659_JD_CTRL_1, 0x2000);
4281 regmap_write(rt5659->regmap, RT5659_IRQ_CTRL_1, 0x0040);
4282 INIT_DELAYED_WORK(&rt5659->jack_detect_work,
4290 if (i2c->irq) {
4291 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
4295 dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
4298 regmap_update_bits(rt5659->regmap, RT5659_GPIO_CTRL_1,
4302 return devm_snd_soc_register_component(&i2c->dev,
4311 regmap_write(rt5659->regmap, RT5659_RESET, 0);