Lines Matching +full:1 +full:- +full:15
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5616.h -- RT5616 ALSA SoC audio driver
17 /* I/O - Output */
21 /* I/O - Input */
24 /* I/O - ADC/DAC/DMIC */
28 /* Mixer - D-D */
33 /* Mixer - ADC */
38 /* Mixer - DAC */
57 /* Format - ADC/DAC */
62 /* Function - Analog */
75 /* Function - Digital */
152 #define RT5616_L_MUTE (0x1 << 15)
153 #define RT5616_L_MUTE_SFT 15
166 #define RT5616_EN_DFO (0x1 << 15)
208 #define RT5616_M_MONO_ADC_L (0x1 << 15)
209 #define RT5616_M_MONO_ADC_L_SFT 15
232 #define RT5616_M_ADCMIX_L (0x1 << 15)
233 #define RT5616_M_ADCMIX_L_SFT 15
254 #define RT5616_M_DAC_L1_MIXR (0x1 << 1)
255 #define RT5616_M_DAC_L1_MIXR_SFT 1
282 #define RT5616_STO_DD_L2_R_VOL_MASK (0x1 << 1)
283 #define RT5616_STO_DD_L2_R_VOL_SFT 1
286 #define RT5616_M_STO_L_DAC_L (0x1 << 15)
287 #define RT5616_M_STO_L_DAC_L_SFT 15
303 /* DSP Path Control 1 (0x2d) */
304 #define RT5616_RXDP_SRC_MASK (0x1 << 15)
305 #define RT5616_RXDP_SRC_SFT 15
306 #define RT5616_RXDP_SRC_NOR (0x0 << 15)
307 #define RT5616_RXDP_SRC_DIV3 (0x1 << 15)
358 /* REC Left Mixer Control 1 (0x3b) */
365 #define RT5616_G_BST2_RM_L_MASK (0x7 << 1)
366 #define RT5616_G_BST2_RM_L_SFT 1
381 #define RT5616_M_BST1_RM_L (0x1 << 1)
382 #define RT5616_M_BST1_RM_L_SFT 1
386 /* REC Right Mixer Control 1 (0x3d) */
393 #define RT5616_G_BST2_RM_R_MASK (0x7 << 1)
394 #define RT5616_G_BST2_RM_R_SFT 1
409 #define RT5616_M_BST1_RM_R (0x1 << 1)
410 #define RT5616_M_BST1_RM_R_SFT 1
441 #define RT5616_M_OM_L_SM_L (0x1 << 1)
442 #define RT5616_M_OM_L_SM_L_SFT 1
463 #define RT5616_M_OM_R_SM_R (0x1 << 1)
464 #define RT5616_M_OM_R_SM_R_SFT 1
467 #define RT5616_M_DAC_R1_SPM_L (0x1 << 15)
468 #define RT5616_M_DAC_R1_SPM_L_SFT 15
491 #define RT5616_M_DAC_R2_MM (0x1 << 15)
492 #define RT5616_M_DAC_R2_MM_SFT 15
504 /* Output Left Mixer Control 1 (0x4d) */
511 #define RT5616_G_RM_L_OM_L_MASK (0x7 << 1)
512 #define RT5616_G_RM_L_OM_L_SFT 1
534 /* Output Right Mixer Control 1 (0x50) */
541 #define RT5616_G_RM_R_OM_R_MASK (0x7 << 1)
542 #define RT5616_G_RM_R_OM_R_SFT 1
565 #define RT5616_M_DAC_L1_LM (0x1 << 15)
566 #define RT5616_M_DAC_L1_LM_SFT 15
576 /* Power Management for Digital 1 (0x61) */
577 #define RT5616_PWR_I2S1 (0x1 << 15)
578 #define RT5616_PWR_I2S1_BIT 15
587 #define RT5616_PWR_ADC_R (0x1 << 1)
588 #define RT5616_PWR_ADC_R_BIT 1
591 #define RT5616_PWR_ADC_STO1_F (0x1 << 15)
592 #define RT5616_PWR_ADC_STO1_F_BIT 15
596 /* Power Management for Analog 1 (0x63) */
597 #define RT5616_PWR_VREF1 (0x1 << 15)
598 #define RT5616_PWR_VREF1_BIT 15
621 #define RT5616_PWR_LDO_DVO_1_1V 1
626 #define RT5616_PWR_BST1 (0x1 << 15)
627 #define RT5616_PWR_BST1_BIT 15
642 #define RT5616_PWR_JD2 (0x1 << 1)
643 #define RT5616_PWM_JD2_BIT 1
648 #define RT5616_PWR_OM_L (0x1 << 15)
649 #define RT5616_PWR_OM_L_BIT 15
676 #define RT5616_I2S_MS_MASK (0x1 << 15)
677 #define RT5616_I2S_MS_SFT 15
678 #define RT5616_I2S_MS_M (0x0 << 15)
679 #define RT5616_I2S_MS_S (0x1 << 15)
707 /* ADC/DAC Clock Control 1 (0x73) */
738 /* TDM Control 1 (0x77) */
739 #define RT5616_TDM_INTEL_SEL_MASK (0x1 << 15)
740 #define RT5616_TDM_INTEL_SEL_SFT 15
741 #define RT5616_TDM_INTEL_SEL_64 (0x0 << 15)
742 #define RT5616_TDM_INTEL_SEL_50 (0x1 << 15)
793 #define RT5616_TDM_LRCK_POL_SEL_MASK (0x1 << 15)
794 #define RT5616_TDM_LRCK_POL_SEL_SFT 15
795 #define RT5616_TDM_LRCK_POL_SEL_NOR (0x0 << 15)
796 #define RT5616_TDM_LRCK_POL_SEL_INV (0x1 << 15)
845 /* PLL M/N/K Code Control 1 (0x81) */
860 /* PLL tracking mode 1 (0x83) */
861 #define RT5616_STO1_T_MASK (0x1 << 15)
862 #define RT5616_STO1_T_SFT 15
863 #define RT5616_STO1_T_SCLK (0x0 << 15)
864 #define RT5616_STO1_T_LRCK1 (0x1 << 15)
879 #define RT5616_STO1_ASRC_EN (0x1 << 15)
880 #define RT5616_STO1_ASRC_EN_SFT 15
951 /* Depop Mode Control 1 (0x8e) */
952 #define RT5616_SMT_TRIG_MASK (0x1 << 15)
953 #define RT5616_SMT_TRIG_SFT 15
954 #define RT5616_SMT_TRIG_DIS (0x0 << 15)
955 #define RT5616_SMT_TRIG_EN (0x1 << 15)
988 #define RT5616_HP_DP_MASK (0x1 << 1)
989 #define RT5616_HP_DP_SFT 1
990 #define RT5616_HP_DP_PD (0x0 << 1)
991 #define RT5616_HP_DP_PU (0x1 << 1)
1041 #define RT5616_CP_FQ_3_KHZ 1
1071 #define RT5616_MIC1_BS_MASK (0x1 << 15)
1072 #define RT5616_MIC1_BS_SFT 15
1073 #define RT5616_MIC1_BS_9AV (0x0 << 15)
1074 #define RT5616_MIC1_BS_75AV (0x1 << 15)
1097 /* Analog JD Control 1 (0x94) */
1125 /* EQ Control 1 (0xb0) */
1126 #define RT5616_EQ_SRC_MASK (0x1 << 15)
1127 #define RT5616_EQ_SRC_SFT 15
1128 #define RT5616_EQ_SRC_DAC (0x0 << 15)
1129 #define RT5616_EQ_SRC_ADC (0x1 << 15)
1154 #define RT5616_EQ_STA_BP1 (0x1 << 1)
1155 #define RT5616_EQ_STA_BP1_BIT 1
1188 #define RT5616_EQ_BPF1_MASK (0x1 << 1)
1189 #define RT5616_EQ_BPF1_SFT 1
1190 #define RT5616_EQ_BPF1_DIS (0x0 << 1)
1191 #define RT5616_EQ_BPF1_EN (0x1 << 1)
1199 #define RT5616_MT_MASK (0x1 << 15)
1200 #define RT5616_MT_SFT 15
1201 #define RT5616_MT_DIS (0x0 << 15)
1202 #define RT5616_MT_EN (0x1 << 15)
1204 /* DRC/AGC Control 1 (0xb4) */
1205 #define RT5616_DRC_AGC_P_MASK (0x1 << 15)
1206 #define RT5616_DRC_AGC_P_SFT 15
1207 #define RT5616_DRC_AGC_P_DAC (0x0 << 15)
1208 #define RT5616_DRC_AGC_P_ADC (0x1 << 15)
1260 /* Jack Detect Control 1 (0xbb) */
1318 /* IRQ Control 1 (0xbd) */
1319 #define RT5616_IRQ_JD_MASK (0x1 << 15)
1320 #define RT5616_IRQ_JD_SFT 15
1321 #define RT5616_IRQ_JD_BP (0x0 << 15)
1322 #define RT5616_IRQ_JD_NOR (0x1 << 15)
1347 #define RT5616_JD2_INV (0x1 << 1)
1348 #define RT5616_JD2_INV_SFT 1
1351 #define RT5616_IRQ_MB1_OC_MASK (0x1 << 15)
1352 #define RT5616_IRQ_MB1_OC_SFT 15
1353 #define RT5616_IRQ_MB1_OC_BP (0x0 << 15)
1354 #define RT5616_IRQ_MB1_OC_NOR (0x1 << 15)
1370 #define RT5616_STA_JD3 (0x1 << 15)
1371 #define RT5616_STA_JD3_BIT 15
1395 /* GPIO Control 1 (0xc0) */
1396 #define RT5616_GP1_PIN_MASK (0x1 << 15)
1397 #define RT5616_GP1_PIN_SFT 15
1398 #define RT5616_GP1_PIN_GPIO1 (0x0 << 15)
1399 #define RT5616_GP1_PIN_IRQ (0x1 << 15)
1486 #define RT5616_GP1_OUT_MASK (0x1 << 1)
1487 #define RT5616_GP1_OUT_SFT 1
1488 #define RT5616_GP1_OUT_LO (0x0 << 1)
1489 #define RT5616_GP1_OUT_HI (0x1 << 1)
1524 #define RT5616_GP6_OUT_MASK (0x1 << 1)
1525 #define RT5616_GP6_OUT_SFT 1
1526 #define RT5616_GP6_OUT_LO (0x0 << 1)
1527 #define RT5616_GP6_OUT_HI (0x1 << 1)
1534 #define RT5616_SCB_SWAP_MASK (0x1 << 15)
1535 #define RT5616_SCB_SWAP_SFT 15
1536 #define RT5616_SCB_SWAP_DIS (0x0 << 15)
1537 #define RT5616_SCB_SWAP_EN (0x1 << 15)
1544 #define RT5616_BB_MASK (0x1 << 15)
1545 #define RT5616_BB_SFT 15
1546 #define RT5616_BB_DIS (0x0 << 15)
1547 #define RT5616_BB_EN (0x1 << 15)
1565 /* MP3 Plus Control 1 (0xd0) */
1566 #define RT5616_M_MP3_L_MASK (0x1 << 15)
1567 #define RT5616_M_MP3_L_SFT 15
1595 /* 3D HP Control 1 (0xd2) */
1596 #define RT5616_3D_CF_MASK (0x1 << 15)
1597 #define RT5616_3D_CF_SFT 15
1598 #define RT5616_3D_CF_DIS (0x0 << 15)
1599 #define RT5616_3D_CF_EN (0x1 << 15)
1623 /* Adjustable high pass filter control 1 (0xd3) */
1624 #define RT5616_2ND_HPF_MASK (0x1 << 15)
1625 #define RT5616_2ND_HPF_SFT 15
1626 #define RT5616_2ND_HPF_DIS (0x0 << 15)
1627 #define RT5616_2ND_HPF_EN (0x1 << 15)
1684 /* Soft volume and zero cross control 1 (0xd9) */
1685 #define RT5616_SV_MASK (0x1 << 15)
1686 #define RT5616_SV_SFT 15
1687 #define RT5616_SV_DIS (0x0 << 15)
1688 #define RT5616_SV_EN (0x1 << 15)
1715 #define RT5616_ZCD_HP_MASK (0x1 << 15)
1716 #define RT5616_ZCD_HP_SFT 15
1717 #define RT5616_ZCD_HP_DIS (0x0 << 15)
1718 #define RT5616_ZCD_HP_EN (0x1 << 15)
1727 #define RT5616_AMP_DET_EN (0x1 << 1)
1728 #define RT5616_AMP_DET_EN_SFT 1
1734 #define RT5616_3D_SPK_MASK (0x1 << 15)
1735 #define RT5616_3D_SPK_SFT 15
1736 #define RT5616_3D_SPK_DIS (0x0 << 15)
1737 #define RT5616_3D_SPK_EN (0x1 << 15)
1745 /* Wind Noise Detection Control 1 (0x6c) */
1746 #define RT5616_WND_MASK (0x1 << 15)
1747 #define RT5616_WND_SFT 15
1748 #define RT5616_WND_DIS (0x0 << 15)
1749 #define RT5616_WND_EN (0x1 << 15)
1772 #define RT5616_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1774 #define RT5616_WND_STRONG_MASK (0x1 << 12) /* Read-Only */