Lines Matching +full:autosuspend +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-only
3 // rt1320-sdw.c -- rt1320 SDCA ALSA SoC amplifier audio driver
8 #include <linux/delay.h>
19 #include <sound/soc-dapm.h>
23 #include "rt1320-sdw.h"
24 #include "rt-sdw-common.h"
27 * The 'blind writes' is an SDCA term to deal with platform-specific initialization.
28 * It might include vendor-specific or SDCA control registers.
652 .name = "sdw-mbq",
666 struct sdw_slave_prop *prop = &slave->prop;
674 * Due to support the multi-lane, we call 'sdw_slave_read_prop' to get the lane mapping
678 prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
679 prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
681 prop->paging_support = true;
682 prop->lane_control_support = true;
685 prop->source_ports = BIT(4) | BIT(8) | BIT(10);
686 prop->sink_ports = BIT(1);
688 nval = hweight32(prop->source_ports);
689 prop->src_dpn_prop = devm_kcalloc(&slave->dev, nval,
690 sizeof(*prop->src_dpn_prop), GFP_KERNEL);
691 if (!prop->src_dpn_prop)
692 return -ENOMEM;
695 dpn = prop->src_dpn_prop;
696 addr = prop->source_ports;
706 nval = hweight32(prop->sink_ports);
707 prop->sink_dpn_prop = devm_kcalloc(&slave->dev, nval,
708 sizeof(*prop->sink_dpn_prop), GFP_KERNEL);
709 if (!prop->sink_dpn_prop)
710 return -ENOMEM;
713 dpn = prop->sink_dpn_prop;
714 addr = prop->sink_ports;
724 prop->clk_stop_timeout = 64;
727 prop->wake_capable = 0;
735 unsigned int delay = 2000, val;
737 pm_runtime_mark_last_busy(&rt1320->sdw_slave->dev);
740 while (delay) {
741 regmap_read(rt1320->regmap,
747 delay--;
749 if (!delay) {
750 dev_warn(&rt1320->sdw_slave->dev, "%s PDE to %s is NOT ready", __func__, ps?"PS3":"PS0");
751 return -ETIMEDOUT;
763 struct sdw_slave *slave = rt1320->sdw_slave;
770 switch (rt1320->dev_id) {
772 if (rt1320->version_id <= RT1320_VB)
785 dev_err(&slave->dev, "%s: Unknown device ID %d\n", __func__, rt1320->dev_id);
790 ret = request_firmware(&patch, filename, &slave->dev);
792 dev_err(&slave->dev, "%s: Failed to load %s firmware", __func__, filename);
793 regmap_write(rt1320->regmap, 0xc598, 0x00);
794 regmap_write(rt1320->regmap, min_addr, 0x67);
795 regmap_write(rt1320->regmap, min_addr + 0x1, 0x80);
796 regmap_write(rt1320->regmap, min_addr + 0x2, 0x00);
797 regmap_write(rt1320->regmap, min_addr + 0x3, 0x00);
798 if (rt1320->dev_id == RT1321_DEV_ID) {
799 regmap_write(rt1320->regmap, 0xd73c, 0x67);
800 regmap_write(rt1320->regmap, 0xd73d, 0x80);
801 regmap_write(rt1320->regmap, 0xd73e, 0x00);
802 regmap_write(rt1320->regmap, 0xd73f, 0x00);
805 ptr = (const unsigned char *)patch->data;
806 if ((patch->size % 8) == 0) {
807 for (i = 0; i < patch->size; i += 8) {
814 dev_err(&slave->dev, "%s: the address 0x%x is wrong", __func__, addr);
818 dev_err(&slave->dev, "%s: the value 0x%x is wrong", __func__, val);
821 regmap_write(rt1320->regmap, addr, val);
831 unsigned int i, reg, val, delay;
836 delay = rt1320_blind_write[i].delay_us;
841 regmap_write(rt1320->regmap, reg, val);
842 if (delay)
843 usleep_range(delay, delay + 1000);
849 struct sdw_slave *slave = rt1320->sdw_slave;
850 unsigned int i, reg, val, delay, retry, tmp;
855 delay = rt1320_vc_blind_write[i].delay_us;
864 regmap_read(rt1320->regmap, RT1320_KR0_INT_READY, &tmp);
865 dev_dbg(&slave->dev, "%s, RT1320_KR0_INT_READY=0x%x\n", __func__, tmp);
869 retry--;
872 dev_warn(&slave->dev, "%s MCU is NOT ready!", __func__);
874 regmap_write(rt1320->regmap, reg, val);
875 if (delay)
876 usleep_range(delay, delay + 1000);
885 unsigned int i, reg, val, delay;
890 delay = rt1321_blind_write[i].delay_us;
895 regmap_write(rt1320->regmap, reg, val);
897 if (delay)
898 usleep_range(delay, delay + 1000);
910 if (rt1320->hw_init)
913 regcache_cache_only(rt1320->regmap, false);
914 regcache_cache_only(rt1320->mbq_regmap, false);
915 if (rt1320->first_hw_init) {
916 regcache_cache_bypass(rt1320->regmap, true);
917 regcache_cache_bypass(rt1320->mbq_regmap, true);
923 pm_runtime_set_active(&slave->dev);
926 pm_runtime_get_noresume(&slave->dev);
928 if (rt1320->version_id < 0) {
929 regmap_read(rt1320->regmap, RT1320_DEV_VERSION_ID_1, &val);
930 rt1320->version_id = val;
931 regmap_read(rt1320->regmap, RT1320_DEV_ID_0, &val);
932 regmap_read(rt1320->regmap, RT1320_DEV_ID_1, &tmp);
933 rt1320->dev_id = (val << 8) | tmp;
936 regmap_read(rt1320->regmap,
942 switch (rt1320->dev_id) {
944 if (rt1320->version_id < RT1320_VC)
953 dev_err(dev, "%s: Unknown device ID %d\n", __func__, rt1320->dev_id);
956 regmap_write(rt1320->regmap,
960 if (!rt1320->first_hw_init && rt1320->version_id == RT1320_VA && rt1320->dev_id == RT1320_DEV_ID) {
961 regmap_write(rt1320->regmap, SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23,
963 regmap_read(rt1320->regmap, RT1320_HIFI_VER_0, &val);
964 regmap_read(rt1320->regmap, RT1320_HIFI_VER_1, &tmp);
966 regmap_read(rt1320->regmap, RT1320_HIFI_VER_2, &tmp);
968 regmap_read(rt1320->regmap, RT1320_HIFI_VER_3, &tmp);
976 rt1320->version_id = RT1320_VB;
977 regmap_write(rt1320->regmap, SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23,
980 dev_dbg(dev, "%s version_id=%d, dev_id=0x%x\n", __func__, rt1320->version_id, rt1320->dev_id);
982 if (rt1320->first_hw_init) {
983 regcache_cache_bypass(rt1320->regmap, false);
984 regcache_cache_bypass(rt1320->mbq_regmap, false);
985 regcache_mark_dirty(rt1320->regmap);
986 regcache_mark_dirty(rt1320->mbq_regmap);
990 rt1320->first_hw_init = true;
991 rt1320->hw_init = true;
993 pm_runtime_put_autosuspend(&slave->dev);
995 dev_dbg(&slave->dev, "%s hw_init complete\n", __func__);
1002 struct rt1320_sdw_priv *rt1320 = dev_get_drvdata(&slave->dev);
1005 rt1320->hw_init = false;
1011 if (rt1320->hw_init || status != SDW_SLAVE_ATTACHED)
1015 return rt1320_io_init(&slave->dev, slave);
1022 snd_soc_dapm_to_component(w->dapm);
1028 regmap_write(rt1320->regmap,
1034 regmap_write(rt1320->regmap,
1050 snd_soc_dapm_to_component(w->dapm);
1056 regmap_write(rt1320->regmap,
1062 regmap_write(rt1320->regmap,
1079 (struct soc_mixer_control *)kcontrol->private_value;
1089 if (strstr(ucontrol->id.name, "FU Capture Volume"))
1092 regmap_read(rt1320->mbq_regmap, mc->reg, &lvalue);
1093 regmap_read(rt1320->mbq_regmap, mc->rreg, &rvalue);
1096 gain_l_val = ucontrol->value.integer.value[0];
1097 if (gain_l_val > mc->max)
1098 gain_l_val = mc->max;
1099 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset);
1103 gain_r_val = ucontrol->value.integer.value[1];
1104 if (gain_r_val > mc->max)
1105 gain_r_val = mc->max;
1106 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset);
1113 regmap_write(rt1320->mbq_regmap, mc->reg, gain_l_val);
1115 regmap_write(rt1320->mbq_regmap, mc->rreg, gain_r_val);
1119 p = (struct rt_sdca_dmic_kctrl_priv *)kcontrol->private_value;
1122 for (i = 0; i < p->count; i++) {
1123 switch (rt1320->dev_id) {
1127 regmap_read(rt1320->mbq_regmap, reg_base + i, ®value[i]);
1130 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, ®value[i]);
1135 regmap_read(rt1320->mbq_regmap, reg_base + i, ®value[i]);
1139 gain_val[i] = ucontrol->value.integer.value[i];
1140 if (gain_val[i] > p->max)
1141 gain_val[i] = p->max;
1143 gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset);
1152 for (i = 0; i < p->count; i++) {
1153 switch (rt1320->dev_id) {
1157 err = regmap_write(rt1320->mbq_regmap, reg_base + i, gain_val[i]);
1160 err = regmap_write(rt1320->mbq_regmap, reg_base + i - 2, gain_val[i]);
1165 err = regmap_write(rt1320->mbq_regmap, reg_base + i, gain_val[i]);
1170 dev_err(&rt1320->sdw_slave->dev, "0x%08x can't be set\n", reg_base + i);
1183 (struct soc_mixer_control *)kcontrol->private_value;
1189 if (strstr(ucontrol->id.name, "FU Capture Volume"))
1192 regmap_read(rt1320->mbq_regmap, mc->reg, &read_l);
1193 regmap_read(rt1320->mbq_regmap, mc->rreg, &read_r);
1195 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset);
1198 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset);
1202 ucontrol->value.integer.value[0] = ctl_l;
1203 ucontrol->value.integer.value[1] = ctl_r;
1207 p = (struct rt_sdca_dmic_kctrl_priv *)kcontrol->private_value;
1210 for (i = 0; i < p->count; i++) {
1211 switch (rt1320->dev_id) {
1215 regmap_read(rt1320->mbq_regmap, reg_base + i, ®value);
1218 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, ®value);
1223 regmap_read(rt1320->mbq_regmap, reg_base + i, ®value);
1227 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset);
1228 ucontrol->value.integer.value[i] = ctl;
1239 for (i = 0; i < ARRAY_SIZE(rt1320->fu_mixer_mute); i++) {
1240 ch_mute = (rt1320->fu_dapm_mute || rt1320->fu_mixer_mute[i]) ? 0x01 : 0x00;
1242 switch (rt1320->dev_id) {
1245 err = regmap_write(rt1320->regmap,
1249 err = regmap_write(rt1320->regmap,
1251 RT1320_SDCA_CTL_FU_MUTE, CH_01) + i - 2, ch_mute);
1254 err = regmap_write(rt1320->regmap,
1259 dev_err(&rt1320->sdw_slave->dev, "%s: Unknown device ID %d\n", __func__, rt1320->dev_id);
1260 return -EINVAL;
1275 (struct rt_sdca_dmic_kctrl_priv *)kcontrol->private_value;
1278 for (i = 0; i < p->count; i++)
1279 ucontrol->value.integer.value[i] = !rt1320->fu_mixer_mute[i];
1290 (struct rt_sdca_dmic_kctrl_priv *)kcontrol->private_value;
1293 for (i = 0; i < p->count; i++) {
1294 if (rt1320->fu_mixer_mute[i] != !ucontrol->value.integer.value[i])
1296 rt1320->fu_mixer_mute[i] = !ucontrol->value.integer.value[i];
1310 (struct rt_sdca_dmic_kctrl_priv *)kcontrol->private_value;
1312 if (p->max == 1)
1313 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1315 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1316 uinfo->count = p->count;
1317 uinfo->value.integer.min = 0;
1318 uinfo->value.integer.max = p->max;
1326 snd_soc_dapm_to_component(w->dapm);
1331 rt1320->fu_dapm_mute = false;
1335 rt1320->fu_dapm_mute = true;
1358 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
1359 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
1389 SND_SOC_DAPM_AIF_OUT("DP8-10TX", "DP8-10 Capture", 0, SND_SOC_NOPM, 0, 0),
1427 {"DP8-10TX", NULL, "FU"},
1451 struct snd_soc_component *component = dai->component;
1461 dev_dbg(dai->dev, "%s %s", __func__, dai->name);
1465 return -EINVAL;
1467 if (!rt1320->sdw_slave)
1468 return -EINVAL;
1473 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1474 if (dai->id == RT1320_AIF1)
1477 return -EINVAL;
1479 if (dai->id == RT1320_AIF1)
1481 else if (dai->id == RT1320_AIF2) {
1482 switch (rt1320->dev_id) {
1494 return -EINVAL;
1497 return -EINVAL;
1500 if (dai->id == RT1320_AIF1)
1501 retval = sdw_stream_add_slave(rt1320->sdw_slave, &stream_config,
1503 else if (dai->id == RT1320_AIF2) {
1504 switch (rt1320->dev_id) {
1506 retval = sdw_stream_add_slave(rt1320->sdw_slave, &stream_config,
1510 retval = sdw_stream_add_slave(rt1320->sdw_slave, &stream_config,
1514 dev_err(dai->dev, "%s: Unknown device ID %d\n", __func__, rt1320->dev_id);
1515 return -EINVAL;
1518 return -EINVAL;
1520 dev_err(dai->dev, "%s: Unable to configure port\n", __func__);
1545 dev_err(component->dev, "%s: Rate %d is not supported\n",
1547 return -EINVAL;
1551 if (dai->id == RT1320_AIF1)
1552 regmap_write(rt1320->regmap,
1556 regmap_write(rt1320->regmap,
1560 if (rt1320->dev_id == RT1320_DEV_ID)
1561 regmap_write(rt1320->regmap,
1572 struct snd_soc_component *component = dai->component;
1578 if (!rt1320->sdw_slave)
1579 return -EINVAL;
1581 sdw_stream_remove_slave(rt1320->sdw_slave, sdw_stream);
1599 rt1320->component = component;
1601 if (!rt1320->first_hw_init)
1604 ret = pm_runtime_resume(component->dev);
1605 dev_dbg(&rt1320->sdw_slave->dev, "%s pm_runtime_resume, ret=%d", __func__, ret);
1606 if (ret < 0 && ret != -EACCES)
1637 .name = "rt1320-aif1",
1657 .name = "rt1320-aif2",
1660 .stream_name = "DP8-10 Capture",
1678 return -ENOMEM;
1681 rt1320->sdw_slave = slave;
1682 rt1320->mbq_regmap = mbq_regmap;
1683 rt1320->regmap = regmap;
1685 regcache_cache_only(rt1320->regmap, true);
1686 regcache_cache_only(rt1320->mbq_regmap, true);
1692 rt1320->hw_init = false;
1693 rt1320->first_hw_init = false;
1694 rt1320->version_id = -1;
1695 rt1320->fu_dapm_mute = true;
1696 rt1320->fu_mixer_mute[0] = rt1320->fu_mixer_mute[1] =
1697 rt1320->fu_mixer_mute[2] = rt1320->fu_mixer_mute[3] = true;
1706 /* set autosuspend parameters */
1718 * fail with -EACCESS because of race conditions between card creation and enumeration
1740 return rt1320_sdw_init(&slave->dev, regmap, mbq_regmap, slave);
1745 pm_runtime_disable(&slave->dev);
1766 if (!rt1320->hw_init)
1769 regcache_cache_only(rt1320->regmap, true);
1770 regcache_cache_only(rt1320->mbq_regmap, true);
1782 if (!rt1320->first_hw_init)
1785 if (!slave->unattach_request)
1788 time = wait_for_completion_timeout(&slave->initialization_complete,
1791 dev_err(&slave->dev, "%s: Initialization not complete, timed out\n", __func__);
1792 return -ETIMEDOUT;
1796 slave->unattach_request = 0;
1797 regcache_cache_only(rt1320->regmap, false);
1798 regcache_sync(rt1320->regmap);
1799 regcache_cache_only(rt1320->mbq_regmap, false);
1800 regcache_sync(rt1320->mbq_regmap);
1811 .name = "rt1320-sdca",