1 // SPDX-License-Identifier: GPL-2.0
32  * I don't have another implementation to compare from the Rockchip sources. Hard-coding for now.
45 	if (rk817->mic_in_differential) {  in rk817_init()
57 	/* Set resistor value and charge pump current for PLL. */  in rk817_set_component_pll()
59 	/* Set the PLL feedback clock divide value (values not documented). */  in rk817_set_component_pll()
61 	/* Set the PLL pre-divide value (values not documented). */  in rk817_set_component_pll()
63 	/* Set the PLL VCO output clock divide and PLL divided ratio of PLL High Clk (values not  in rk817_set_component_pll()
73  * 0db~-95db, 0.375db/step, for example:
75  * 0xff: -95dB
78 static const DECLARE_TLV_DB_MINMAX(rk817_vol_tlv, -9500, 0);
82  * 27db~-18db, 3db/step, for example:
83  * 0x0: -18dB
87 static const DECLARE_TLV_DB_MINMAX(rk817_gain_tlv, -1800, 2700);
90 	SOC_DOUBLE_R_RANGE_TLV("Master Playback Volume", RK817_CODEC_DDAC_VOLL,
92 	SOC_DOUBLE_R_RANGE_TLV("Master Capture Volume", RK817_CODEC_DADC_VOLL,
118 	SND_SOC_DAPM_SUPPLY("PLL Power", RK817_CODEC_APLL_CFG5, 0, 1, NULL, 0),
189 	{"ADC L", NULL, "PLL Power"},
207 	{"ADC R", NULL, "PLL Power"},
226 	{"SPK DAC", NULL, "PLL Power"},
249 	{"DAC L", NULL, "PLL Power"},
266 	{"DAC R", NULL, "PLL Power"},
291 	struct snd_soc_component *component = codec_dai->component;  in rk817_set_dai_sysclk()
294 	rk817->stereo_sysclk = freq;  in rk817_set_dai_sysclk()
302 	struct snd_soc_component *component = codec_dai->component;  in rk817_set_dai_fmt()
313 		dev_err(component->dev, "%s : set master mask failed!\n", __func__);  in rk817_set_dai_fmt()
314 		return -EINVAL;  in rk817_set_dai_fmt()
327 	struct snd_soc_component *component = dai->component;  in rk817_hw_params()
344 		return -EINVAL;  in rk817_hw_params()
352 	struct snd_soc_component *component = dai->component;  in rk817_digital_mute()
395 		.name = "rk817-hifi",
417 	struct rk808 *rk808 = dev_get_drvdata(component->dev->parent);  in rk817_probe()
419 	snd_soc_component_init_regmap(component, rk808->regmap);  in rk817_probe()
420 	rk817->component = component;  in rk817_probe()
426 	/* setting initial pll values so that we can continue to leverage simple-audio-card.  in rk817_probe()
460 	node = of_get_child_by_name(dev->parent->of_node, "codec");  in rk817_codec_parse_dt_property()
466 	rk817->mic_in_differential =  in rk817_codec_parse_dt_property()
467 			of_property_read_bool(node, "rockchip,mic-in-differential");  in rk817_codec_parse_dt_property()
474 	struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent);  in rk817_platform_probe()
478 	rk817_codec_data = devm_kzalloc(&pdev->dev,  in rk817_platform_probe()
482 		return -ENOMEM;  in rk817_platform_probe()
486 	rk817_codec_data->rk808 = rk808;  in rk817_platform_probe()
488 	rk817_codec_parse_dt_property(&pdev->dev, rk817_codec_data);  in rk817_platform_probe()
490 	rk817_codec_data->mclk = devm_clk_get(pdev->dev.parent, "mclk");  in rk817_platform_probe()
491 	if (IS_ERR(rk817_codec_data->mclk)) {  in rk817_platform_probe()
492 		dev_dbg(&pdev->dev, "Unable to get mclk\n");  in rk817_platform_probe()
493 		ret = -ENXIO;  in rk817_platform_probe()
497 	ret = clk_prepare_enable(rk817_codec_data->mclk);  in rk817_platform_probe()
499 		dev_err(&pdev->dev, "%s() clock prepare error %d\n",  in rk817_platform_probe()
504 	ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_dev_rk817,  in rk817_platform_probe()
507 		dev_err(&pdev->dev, "%s() register codec error %d\n",  in rk817_platform_probe()
515 	clk_disable_unprepare(rk817_codec_data->mclk);  in rk817_platform_probe()
524 	clk_disable_unprepare(rk817->mclk);  in rk817_platform_remove()
529 		   .name = "rk817-codec",
538 MODULE_AUTHOR("binyuan <kevan.lan@rock-chips.com>");
540 MODULE_ALIAS("platform:rk817-codec");