Lines Matching +full:ch0 +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0
3 // peb2466.c -- Infineon PEB2466 ALSA SoC driver
42 u8 spi_tx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
43 u8 spi_rx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
86 #define PEB2466_CR0_AR (1 << 2)
136 .tx_buf = &peb2466->spi_tx_buf,
137 .len = 2,
140 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;
141 peb2466->spi_tx_buf[1] = val;
143 dev_dbg(&peb2466->spi->dev, "write byte (cmd %02x) %02x\n",
144 peb2466->spi_tx_buf[0], peb2466->spi_tx_buf[1]);
146 return spi_sync_transfer(peb2466->spi, &xfer, 1);
152 .tx_buf = &peb2466->spi_tx_buf,
153 .rx_buf = &peb2466->spi_rx_buf,
158 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_R;
160 ret = spi_sync_transfer(peb2466->spi, &xfer, 1);
164 if (peb2466->spi_rx_buf[1] != 0x81) {
165 dev_err(&peb2466->spi->dev,
167 peb2466->spi_tx_buf[0], peb2466->spi_rx_buf[1]);
168 return -EILSEQ;
171 *val = peb2466->spi_rx_buf[2];
173 dev_dbg(&peb2466->spi->dev, "read byte (cmd %02x) %02x\n",
174 peb2466->spi_tx_buf[0], *val);
182 .tx_buf = &peb2466->spi_tx_buf,
187 return -EINVAL;
189 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W;
190 memcpy(&peb2466->spi_tx_buf[1], buf, len);
192 dev_dbg(&peb2466->spi->dev, "write buf (cmd %02x, %u) %*ph\n",
193 peb2466->spi_tx_buf[0], len, len, &peb2466->spi_tx_buf[1]);
195 return spi_sync_transfer(peb2466->spi, &xfer, 1);
213 dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");
214 ret = -EINVAL;
235 dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n");
236 ret = -EINVAL;
255 (struct peb2466_lkup_ctrl *)kcontrol->private_value;
257 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
258 uinfo->count = 1;
259 uinfo->value.integer.min = 0;
260 uinfo->value.integer.max = lkup_ctrl->lookup->count - 1;
268 (struct peb2466_lkup_ctrl *)kcontrol->private_value;
270 ucontrol->value.integer.value[0] = lkup_ctrl->index;
278 (struct peb2466_lkup_ctrl *)kcontrol->private_value;
284 index = ucontrol->value.integer.value[0];
285 if (index >= lkup_ctrl->lookup->count)
286 return -EINVAL;
288 if (index == lkup_ctrl->index)
291 ret = peb2466_write_buf(peb2466, lkup_ctrl->reg,
292 lkup_ctrl->lookup->table[index], 4);
296 lkup_ctrl->index = index;
307 BUILD_BUG_ON(sizeof(lkup_ctrl->tlv_array) < sizeof(tlv_array));
308 memcpy(lkup_ctrl->tlv_array, tlv_array, sizeof(tlv_array));
314 control.tlv.p = lkup_ctrl->tlv_array;
350 static const struct soc_enum peb2466_tg_freq[][2] = {
363 [2] = {
364 SOC_ENUM_SINGLE(PEB2466_TG1(2), 0, ARRAY_SIZE(peb2466_tone_freq_txt),
366 SOC_ENUM_SINGLE(PEB2466_TG2(2), 0, ARRAY_SIZE(peb2466_tone_freq_txt),
382 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
384 switch (e->reg) {
386 ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg1_freq_item;
389 ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg2_freq_item;
392 ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg1_freq_item;
395 ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg2_freq_item;
397 case PEB2466_TG1(2):
398 ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg1_freq_item;
400 case PEB2466_TG2(2):
401 ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg2_freq_item;
404 ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg1_freq_item;
407 ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg2_freq_item;
410 return -EINVAL;
420 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
426 index = ucontrol->value.enumerated.item[0];
429 return -EINVAL;
431 switch (e->reg) {
433 tg_freq_item = &peb2466->ch[0].tg1_freq_item;
438 tg_freq_item = &peb2466->ch[0].tg2_freq_item;
443 tg_freq_item = &peb2466->ch[1].tg1_freq_item;
448 tg_freq_item = &peb2466->ch[1].tg2_freq_item;
452 case PEB2466_TG1(2):
453 tg_freq_item = &peb2466->ch[2].tg1_freq_item;
454 cr1_reg = PEB2466_CR1(2);
457 case PEB2466_TG2(2):
458 tg_freq_item = &peb2466->ch[2].tg2_freq_item;
459 cr1_reg = PEB2466_CR1(2);
463 tg_freq_item = &peb2466->ch[3].tg1_freq_item;
468 tg_freq_item = &peb2466->ch[3].tg2_freq_item;
473 return -EINVAL;
480 ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, 0);
484 ret = peb2466_write_buf(peb2466, e->reg, peb2466_tone_lookup[index], 4);
487 ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, cr1_mask);
509 SOC_DAPM_SINGLE("TG1 Switch", PEB2466_CR1(2), 6, 1, 0),
510 SOC_DAPM_SINGLE("TG2 Switch", PEB2466_CR1(2), 7, 1, 0),
511 SOC_DAPM_SINGLE("Voice Switch", PEB2466_CR2(2), 0, 1, 0)
522 SOC_SINGLE("DAC0 -6dB Playback Switch", PEB2466_CR3(0), 2, 1, 0),
523 SOC_SINGLE("DAC1 -6dB Playback Switch", PEB2466_CR3(1), 2, 1, 0),
524 SOC_SINGLE("DAC2 -6dB Playback Switch", PEB2466_CR3(2), 2, 1, 0),
525 SOC_SINGLE("DAC3 -6dB Playback Switch", PEB2466_CR3(3), 2, 1, 0),
530 SOC_SINGLE("ADC2 +6dB Capture Switch", PEB2466_CR3(2), 3, 1, 0),
538 SOC_ENUM_EXT("DAC2 TG1 Freq", peb2466_tg_freq[2][0],
547 SOC_ENUM_EXT("DAC2 TG2 Freq", peb2466_tg_freq[2][1],
554 SND_SOC_DAPM_SUPPLY("CH0 PWR", PEB2466_CR1(0), 0, 0, NULL, 0),
556 SND_SOC_DAPM_SUPPLY("CH2 PWR", PEB2466_CR1(2), 0, 0, NULL, 0),
559 SND_SOC_DAPM_DAC("CH0 DIN", "Playback", SND_SOC_NOPM, 0, 0),
564 SND_SOC_DAPM_SIGGEN("CH0 TG1"),
569 SND_SOC_DAPM_SIGGEN("CH0 TG2"),
609 { "CH0 DIN", NULL, "CH0 PWR" },
614 { "CH0 TG1", NULL, "CH0 PWR" },
619 { "CH0 TG2", NULL, "CH0 PWR" },
624 { "DAC0 Mixer", "TG1 Switch", "CH0 TG1" },
625 { "DAC0 Mixer", "TG2 Switch", "CH0 TG2" },
626 { "DAC0 Mixer", "Voice Switch", "CH0 DIN" },
627 { "DAC0 Mixer", NULL, "CH0 DIN" },
659 { "ADC0", NULL, "CH0 PWR" },
668 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
676 /* Not set -> default 8 */
680 dev_err(dai->dev, "tdm slot width %d not supported\n", width);
681 return -EINVAL;
689 ret = regmap_write(peb2466->regmap, PEB2466_CR5(chan), slot);
691 dev_err(dai->dev, "chan %d set tx tdm slot failed (%d)\n",
701 dev_err(dai->dev, "too much tx slots defined (mask = 0x%x) support max %d\n",
703 return -EINVAL;
705 peb2466->max_chan_playback = chan;
712 ret = regmap_write(peb2466->regmap, PEB2466_CR4(chan), slot);
714 dev_err(dai->dev, "chan %d set rx tdm slot failed (%d)\n",
724 dev_err(dai->dev, "too much rx slots defined (mask = 0x%x) support max %d\n",
726 return -EINVAL;
728 peb2466->max_chan_capture = chan;
735 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
746 dev_err(dai->dev, "Unsupported format 0x%x\n",
748 return -EINVAL;
750 return regmap_write(peb2466->regmap, PEB2466_XR6, xr6);
757 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
770 dev_err(&peb2466->spi->dev, "Unsupported format 0x%x\n",
772 return -EINVAL;
776 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR1(ch),
795 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component);
799 max_ch = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ?
800 peb2466->max_chan_playback : peb2466->max_chan_capture;
806 ret = snd_pcm_hw_constraint_minmax(substream->runtime,
812 return snd_pcm_hw_constraint_list(substream->runtime, 0,
869 { .reg = PEB2466_CR5(2), .def = 0x00 },
870 { .reg = PEB2466_CR4(2), .def = 0x00 },
871 { .reg = PEB2466_CR3(2), .def = 0x00 },
872 { .reg = PEB2466_CR2(2), .def = 0x00 },
873 { .reg = PEB2466_CR1(2), .def = 0x00 },
874 { .reg = PEB2466_CR0(2), .def = PEB2466_CR0_IMR1 },
889 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
890 peb2466->ch[i].tg1_freq_item = PEB2466_TONE_1000HZ;
891 peb2466->ch[i].tg2_freq_item = PEB2466_TONE_1000HZ;
931 return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));
942 dev_info(component->dev, "fw TH filter: mask %x, %*phN\n", *data,
943 lng - 1, data + 1);
947 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
948 * - @1 8 bytes: TH-Filter coefficients part1
949 * - @9 8 bytes: TH-Filter coefficients part2
950 * - @17 8 bytes: TH-Filter coefficients part3
953 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
957 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
974 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
991 dev_info(component->dev, "fw IM/R1 filter: mask %x, %*phN\n", *data,
992 lng - 1, data + 1);
996 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
997 * - @1 8 bytes: IM/R1-Filter coefficients part1
998 * - @9 8 bytes: IM/R1-Filter coefficients part2
1001 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1005 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1018 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1034 dev_info(component->dev, "fw FRX filter: mask %x, %*phN\n", *data,
1035 lng - 1, data + 1);
1039 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1040 * - @1 8 bytes: FRX-Filter coefficients
1043 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1047 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1056 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1072 dev_info(component->dev, "fw FRR filter: mask %x, %*phN\n", *data,
1073 lng - 1, data + 1);
1077 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1078 * - @1 8 bytes: FRR-Filter coefficients
1081 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1085 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1094 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1110 dev_info(component->dev, "fw AX filter: mask %x, %*phN\n", *data,
1111 lng - 1, data + 1);
1115 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1116 * - @1 4 bytes: AX-Filter coefficients
1119 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1123 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1132 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1148 dev_info(component->dev, "fw AR filter: mask %x, %*phN\n", *data,
1149 lng - 1, data + 1);
1153 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1154 * - @1 4 bytes: AR-Filter coefficients
1157 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1161 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1170 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1202 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1203 * - @1 32bits signed: Min table value in centi dB (MinVal)
1204 * ie -300 means -3.0 dB
1205 * - @5 32bits signed: Step from on item to other item in centi dB (Step)
1207 * - @9 32bits unsigned: Item index in the table to use for the initial
1209 * - @13 N*4 bytes: Table composed of 4 bytes items.
1213 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB.
1217 if (lng < 13 || ((lng - 13) % 4)) {
1218 dev_err(component->dev, "fw AX table lng %u invalid\n", lng);
1219 return -EINVAL;
1221 table_size = lng - 13;
1227 dev_err(component->dev, "fw AX table index %u out of table[%u]\n",
1229 return -EINVAL;
1232 dev_info(component->dev,
1238 table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);
1240 return -ENOMEM;
1244 BUILD_BUG_ON(ARRAY_SIZE(peb2466_ax_ctrl_names) != ARRAY_SIZE(peb2466->ch));
1245 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1249 lookup = &peb2466->ch[i].ax_lookup;
1250 lookup->table = table;
1251 lookup->count = table_size / 4;
1253 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1259 lookup->table[init_index], 4);
1263 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1268 lkup_ctrl = &peb2466->ch[i].ax_lkup_ctrl;
1269 lkup_ctrl->lookup = lookup;
1270 lkup_ctrl->reg = PEB2466_AX_FILTER(i);
1271 lkup_ctrl->index = init_index;
1306 * - @0 1 byte: Chan mask (bit set means related channel is concerned)
1307 * - @1 32bits signed: Min table value in centi dB (MinVal)
1308 * ie -300 means -3.0 dB
1309 * - @5 32bits signed: Step from on item to other item in centi dB (Step)
1311 * - @9 32bits unsigned: Item index in the table to use for the initial
1313 * - @13 N*4 bytes: Table composed of 4 bytes items.
1317 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB.
1321 if (lng < 13 || ((lng - 13) % 4)) {
1322 dev_err(component->dev, "fw AR table lng %u invalid\n", lng);
1323 return -EINVAL;
1325 table_size = lng - 13;
1331 dev_err(component->dev, "fw AR table index %u out of table[%u]\n",
1333 return -EINVAL;
1336 dev_info(component->dev,
1342 table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL);
1344 return -ENOMEM;
1348 BUILD_BUG_ON(ARRAY_SIZE(peb2466_ar_ctrl_names) != ARRAY_SIZE(peb2466->ch));
1349 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) {
1353 lookup = &peb2466->ch[i].ar_lookup;
1354 lookup->table = table;
1355 lookup->count = table_size / 4;
1357 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1363 lookup->table[init_index], 4);
1367 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i),
1372 lkup_ctrl = &peb2466->ch[i].ar_lkup_ctrl;
1373 lkup_ctrl->lookup = lookup;
1374 lkup_ctrl->reg = PEB2466_AR_FILTER(i);
1375 lkup_ctrl->index = init_index;
1412 PEB2466_TAG_DEF_LNG_EQ(0x0002, 1 + 2 * 8, peb2466_fw_parse_imr1filter),
1451 * big-endian values).
1454 * @2, 16bits: Version (0x0100 for version 1.0)
1455 * @4, 2+4+N bytes: TLV block
1456 * @4+(2+4+N) bytes: Next TLV block
1461 * @2, 32bits: Lng
1472 dev_err(component->dev, "fw size %zu, exp at least 4\n", left);
1473 return -EINVAL;
1479 dev_err(component->dev, "fw magic 0x%04x exp 0x2466\n", val16);
1480 return -EINVAL;
1482 buf += 2;
1483 left -= 2;
1488 dev_err(component->dev, "fw magic 0x%04x exp 0x0100\n", val16);
1489 return -EINVAL;
1491 buf += 2;
1492 left -= 2;
1496 dev_err(component->dev, "fw %td/%zu left %zu, exp at least 6\n",
1497 buf - data, size, left);
1498 return -EINVAL;
1502 lng = get_unaligned_be32(buf + 2);
1505 dev_err(component->dev, "fw %td/%zu tag 0x%04x unknown\n",
1506 buf - data, size, tag);
1507 return -EINVAL;
1509 if (lng < tag_def->lng_min || lng > tag_def->lng_max) {
1510 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, exp [%u;%u]\n",
1511 buf - data, size, tag, lng, tag_def->lng_min, tag_def->lng_max);
1512 return -EINVAL;
1515 left -= 6;
1517 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, left %zu\n",
1518 buf - data, size, tag, lng, left);
1519 return -EINVAL;
1522 /* TLV block is valid -> parse the data part */
1523 ret = tag_def->parse(component, tag, lng, buf);
1525 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u parse failed\n",
1526 buf - data, size, tag, lng);
1531 left -= lng;
1541 ret = request_firmware(&fw, fw_name, component->dev);
1545 ret = peb2466_fw_parse(component, fw->data, fw->size);
1562 ret = of_property_read_string(peb2466->spi->dev.of_node,
1563 "firmware-name", &firmware_name);
1565 return (ret == -EINVAL) ? 0 : ret;
1588 * 2 SI2_0
1633 *mask = (1 << (offset - 16));
1639 *mask = (1 << (offset - 24 + 4));
1642 return -EINVAL;
1651 return -EINVAL;
1655 *mask = (1 << (offset - 16));
1660 *mask = (1 << (offset - 24));
1663 return -EINVAL;
1673 cache = &peb2466->gpio.cache.xr0;
1676 cache = &peb2466->gpio.cache.xr1;
1679 cache = &peb2466->gpio.cache.xr2;
1682 cache = &peb2466->gpio.cache.xr3;
1705 mutex_lock(&peb2466->gpio.lock);
1709 ret = -EINVAL;
1717 ret = regmap_write(peb2466->regmap, xr_reg, tmp);
1725 mutex_unlock(&peb2466->gpio.lock);
1741 dev_warn(&peb2466->spi->dev, "cannot set gpio %d (read-only)\n",
1748 dev_err(&peb2466->spi->dev, "cannot set gpio %d (%d)\n",
1755 dev_err(&peb2466->spi->dev, "set gpio %d (0x%x, 0x%x) failed (%d)\n",
1781 dev_err(&peb2466->spi->dev, "cannot get gpio %d (%d)\n",
1783 return -EINVAL;
1789 return -EINVAL;
1792 ret = regmap_read(peb2466->regmap, xr_reg, &val);
1794 dev_err(&peb2466->spi->dev, "get gpio %d (0x%x, 0x%x) failed (%d)\n",
1822 dev_err(&peb2466->spi->dev, "cannot get gpio %d direction (%d)\n",
1827 ret = regmap_read(peb2466->regmap, xr_reg, &val);
1829 dev_err(&peb2466->spi->dev, "get dir gpio %d (0x%x, 0x%x) failed (%d)\n",
1850 return -EINVAL;
1855 dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",
1862 dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",
1879 return -EINVAL;
1891 dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n",
1898 dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n",
1916 peb2466->gpio.cache.xr0 = 0;
1917 peb2466->gpio.cache.xr1 = 0;
1918 peb2466->gpio.cache.xr2 = 0;
1919 peb2466->gpio.cache.xr3 = 0;
1921 return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset));
1928 mutex_init(&peb2466->gpio.lock);
1934 peb2466->gpio.gpio_chip.owner = THIS_MODULE;
1935 peb2466->gpio.gpio_chip.label = dev_name(&peb2466->spi->dev);
1936 peb2466->gpio.gpio_chip.parent = &peb2466->spi->dev;
1937 peb2466->gpio.gpio_chip.base = -1;
1938 peb2466->gpio.gpio_chip.ngpio = 28;
1939 peb2466->gpio.gpio_chip.get_direction = peb2466_chip_get_direction;
1940 peb2466->gpio.gpio_chip.direction_input = peb2466_chip_direction_input;
1941 peb2466->gpio.gpio_chip.direction_output = peb2466_chip_direction_output;
1942 peb2466->gpio.gpio_chip.get = peb2466_chip_gpio_get;
1943 peb2466->gpio.gpio_chip.set = peb2466_chip_gpio_set;
1944 peb2466->gpio.gpio_chip.can_sleep = true;
1946 return devm_gpiochip_add_data(&peb2466->spi->dev, &peb2466->gpio.gpio_chip,
1957 spi->bits_per_word = 8;
1962 peb2466 = devm_kzalloc(&spi->dev, sizeof(*peb2466), GFP_KERNEL);
1964 return -ENOMEM;
1966 peb2466->spi = spi;
1968 peb2466->regmap = devm_regmap_init(&peb2466->spi->dev, NULL, peb2466,
1970 if (IS_ERR(peb2466->regmap))
1971 return PTR_ERR(peb2466->regmap);
1973 peb2466->reset_gpio = devm_gpiod_get_optional(&peb2466->spi->dev,
1975 if (IS_ERR(peb2466->reset_gpio))
1976 return PTR_ERR(peb2466->reset_gpio);
1978 peb2466->mclk = devm_clk_get_enabled(&peb2466->spi->dev, "mclk");
1979 if (IS_ERR(peb2466->mclk))
1980 return PTR_ERR(peb2466->mclk);
1982 if (peb2466->reset_gpio) {
1983 gpiod_set_value_cansleep(peb2466->reset_gpio, 1);
1985 gpiod_set_value_cansleep(peb2466->reset_gpio, 0);
1991 mclk_rate = clk_get_rate(peb2466->mclk);
2006 dev_err(&peb2466->spi->dev, "Unsupported clock rate %lu\n",
2008 ret = -EINVAL;
2011 ret = regmap_write(peb2466->regmap, PEB2466_XR5, xr5);
2013 dev_err(&peb2466->spi->dev, "Setting MCLK failed (%d)\n", ret);
2017 ret = devm_snd_soc_register_component(&spi->dev, &peb2466_component_driver,