Lines Matching full:nau8825
3 * Nuvoton NAU8825 audio codec driver
32 #include "nau8825.h"
35 #define NUVOTON_CODEC_DAI "nau8825-hifi"
48 static int nau8825_configure_sysclk(struct nau8825 *nau8825,
224 * @nau8825: component to register the codec private data with
241 static int nau8825_sema_acquire(struct nau8825 *nau8825, long timeout)
246 ret = down_timeout(&nau8825->xtalk_sem, timeout);
248 dev_warn(nau8825->dev, "Acquire semaphore timeout\n");
250 ret = down_trylock(&nau8825->xtalk_sem);
252 dev_warn(nau8825->dev, "Acquire semaphore fail\n");
260 * @nau8825: component to register the codec private data with
265 static inline void nau8825_sema_release(struct nau8825 *nau8825)
267 up(&nau8825->xtalk_sem);
272 * @nau8825: component to register the codec private data with
277 static inline void nau8825_sema_reset(struct nau8825 *nau8825)
279 nau8825->xtalk_sem.count = 1;
285 * @nau8825: component to register the codec private data with
295 static void nau8825_hpvol_ramp(struct nau8825 *nau8825,
320 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL,
329 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL,
387 static void nau8825_xtalk_backup(struct nau8825 *nau8825)
391 if (nau8825->xtalk_baktab_initialized)
396 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg,
399 nau8825->xtalk_baktab_initialized = true;
402 static void nau8825_xtalk_restore(struct nau8825 *nau8825, bool cause_cancel)
406 if (!nau8825->xtalk_baktab_initialized)
420 nau8825_hpvol_ramp(nau8825, 0, volume, 3);
423 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg,
427 nau8825->xtalk_baktab_initialized = false;
430 static void nau8825_xtalk_prepare_dac(struct nau8825 *nau8825)
433 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
442 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
446 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC,
451 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
456 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
460 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL,
463 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
466 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLASSG_CTRL,
471 static void nau8825_xtalk_prepare_adc(struct nau8825 *nau8825)
474 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2,
479 static void nau8825_xtalk_clock(struct nau8825 *nau8825)
482 regmap_write(nau8825->regmap, NAU8825_REG_FLL1, 0x0);
483 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, 0x3126);
484 regmap_write(nau8825->regmap, NAU8825_REG_FLL3, 0x0008);
485 regmap_write(nau8825->regmap, NAU8825_REG_FLL4, 0x0010);
486 regmap_write(nau8825->regmap, NAU8825_REG_FLL5, 0x0);
487 regmap_write(nau8825->regmap, NAU8825_REG_FLL6, 0x6000);
489 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
491 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN,
496 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
498 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
502 static void nau8825_xtalk_prepare(struct nau8825 *nau8825)
507 nau8825_xtalk_backup(nau8825);
509 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
520 nau8825_hpvol_ramp(nau8825, volume, 0, 3);
522 nau8825_xtalk_clock(nau8825);
523 nau8825_xtalk_prepare_dac(nau8825);
524 nau8825_xtalk_prepare_adc(nau8825);
526 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL,
529 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL,
535 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL,
541 regmap_update_bits(nau8825->regmap,
544 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
545 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
548 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
553 static void nau8825_xtalk_clean_dac(struct nau8825 *nau8825)
556 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
559 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL,
563 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
564 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
568 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
572 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
576 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
578 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL,
582 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC,
585 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
588 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
591 if (!nau8825->irq)
592 regmap_update_bits(nau8825->regmap,
596 static void nau8825_xtalk_clean_adc(struct nau8825 *nau8825)
599 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2,
603 static void nau8825_xtalk_clean(struct nau8825 *nau8825, bool cause_cancel)
606 nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0);
607 nau8825_xtalk_clean_dac(nau8825);
608 nau8825_xtalk_clean_adc(nau8825);
610 regmap_write(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, 0);
612 regmap_update_bits(nau8825->regmap, NAU8825_REG_INTERRUPT_MASK,
615 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
619 nau8825_xtalk_restore(nau8825, cause_cancel);
622 static void nau8825_xtalk_imm_start(struct nau8825 *nau8825, int vol)
625 regmap_update_bits(nau8825->regmap, NAU8825_REG_ADC_DGAIN_CTRL,
630 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
633 switch (nau8825->xtalk_state) {
636 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
642 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
651 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL,
655 static void nau8825_xtalk_imm_stop(struct nau8825 *nau8825)
658 regmap_update_bits(nau8825->regmap,
682 static void nau8825_xtalk_measure(struct nau8825 *nau8825)
686 switch (nau8825->xtalk_state) {
691 nau8825_xtalk_prepare(nau8825);
694 nau8825->xtalk_state = NAU8825_XTALK_HPR_R2L;
695 nau8825_xtalk_imm_start(nau8825, 0x00d2);
701 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L,
702 &nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]);
703 dev_dbg(nau8825->dev, "HPR_R2L imm: %x\n",
704 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]);
706 nau8825_xtalk_imm_stop(nau8825);
708 nau8825->xtalk_state = NAU8825_XTALK_HPL_R2L;
709 nau8825_xtalk_imm_start(nau8825, 0x00ff);
718 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L,
719 &nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
720 dev_dbg(nau8825->dev, "HPL_R2L imm: %x\n",
721 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
722 nau8825_xtalk_imm_stop(nau8825);
724 nau8825->xtalk_state = NAU8825_XTALK_IMM;
733 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L],
734 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]);
735 dev_dbg(nau8825->dev, "cross talk sidetone: %x\n", sidetone);
736 regmap_write(nau8825->regmap, NAU8825_REG_DAC_DGAIN_CTRL,
738 nau8825_xtalk_clean(nau8825, false);
739 nau8825->xtalk_state = NAU8825_XTALK_DONE;
748 struct nau8825 *nau8825 = container_of(
749 work, struct nau8825, xtalk_work);
751 nau8825_xtalk_measure(nau8825);
755 if (nau8825->xtalk_state == NAU8825_XTALK_IMM)
756 nau8825_xtalk_measure(nau8825);
764 if (nau8825->xtalk_state == NAU8825_XTALK_DONE) {
765 snd_soc_jack_report(nau8825->jack, nau8825->xtalk_event,
766 nau8825->xtalk_event_mask);
767 nau8825_sema_release(nau8825);
768 nau8825->xtalk_protect = false;
772 static void nau8825_xtalk_cancel(struct nau8825 *nau8825)
778 if (nau8825->xtalk_enable && nau8825->xtalk_state !=
780 cancel_work_sync(&nau8825->xtalk_work);
781 nau8825_xtalk_clean(nau8825, true);
784 nau8825_sema_reset(nau8825);
785 nau8825->xtalk_state = NAU8825_XTALK_DONE;
786 nau8825->xtalk_protect = false;
862 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
866 regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA,
869 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
872 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
874 regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA,
888 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
892 msleep(nau8825->adc_delay);
893 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
897 if (!nau8825->irq)
898 regmap_update_bits(nau8825->regmap,
912 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
918 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
922 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
936 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
941 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
943 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
944 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
947 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
952 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
954 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
955 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
959 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP,
974 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
975 struct regmap *regmap = nau8825->regmap;
978 dev_dbg(nau8825->dev, "system clock control : POWER OFF\n");
985 nau8825_configure_sysclk(nau8825,
988 nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0);
1237 nau8825_get_osr(struct nau8825 *nau8825, int stream)
1242 regmap_read(nau8825->regmap,
1249 regmap_read(nau8825->regmap,
1262 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1265 osr = nau8825_get_osr(nau8825, substream->stream);
1279 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1284 nau8825_sema_acquire(nau8825, 3 * HZ);
1292 osr = nau8825_get_osr(nau8825, substream->stream);
1298 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
1302 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
1307 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val);
1319 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
1341 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1,
1347 nau8825_sema_release(nau8825);
1355 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1399 nau8825_sema_acquire(nau8825, 3 * HZ);
1401 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1,
1405 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
1409 nau8825_sema_release(nau8825);
1429 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1433 dev_err(nau8825->dev, "Only support 4 or 8 slots!\n");
1440 dev_err(nau8825->dev,
1449 dev_err(nau8825->dev,
1456 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2,
1458 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, &value);
1500 regmap_update_bits(nau8825->regmap, NAU8825_REG_TDM_CTRL,
1504 regmap_update_bits(nau8825->regmap, NAU8825_REG_LEFT_TIME_SLOT,
1522 .name = "nau8825-hifi",
1553 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
1554 struct regmap *regmap = nau8825->regmap;
1556 nau8825->jack = jack;
1558 if (!nau8825->jack) {
1619 static void nau8825_eject_jack(struct nau8825 *nau8825)
1621 struct snd_soc_dapm_context *dapm = nau8825->dapm;
1622 struct regmap *regmap = nau8825->regmap;
1625 nau8825_xtalk_cancel(nau8825);
1659 nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0);
1663 static void nau8825_setup_auto_irq(struct nau8825 *nau8825)
1665 struct regmap *regmap = nau8825->regmap;
1678 nau8825_configure_sysclk(nau8825, NAU8825_CLK_INTERNAL, 0);
1729 static int nau8825_high_imped_detection(struct nau8825 *nau8825)
1731 struct regmap *regmap = nau8825->regmap;
1732 struct snd_soc_dapm_context *dapm = nau8825->dapm;
1788 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage);
1798 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT);
1801 (nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT) |
1802 (nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT));
1803 dev_dbg(nau8825->dev, "adc_mg1:%x, adc_mg2:%x\n", adc_mg1, adc_mg2);
1807 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n");
1822 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n");
1837 dev_err(nau8825->dev, "Jack broken.\n");
1844 static int nau8825_jack_insert(struct nau8825 *nau8825)
1846 struct regmap *regmap = nau8825->regmap;
1847 struct snd_soc_dapm_context *dapm = nau8825->dapm;
1855 nau8825->high_imped = true;
1857 nau8825->high_imped = false;
1865 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n");
1885 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n");
1906 dev_warn(nau8825->dev,
1908 if (!nau8825_high_imped_detection(nau8825)) {
1937 struct nau8825 *nau8825 = (struct nau8825 *)data;
1938 struct regmap *regmap = nau8825->regmap;
1942 dev_err(nau8825->dev, "failed to read irq status\n");
1949 nau8825_eject_jack(nau8825);
1961 nau8825->button_pressed = nau8825_button_decode(
1964 event |= nau8825->button_pressed;
1972 event |= nau8825_jack_insert(nau8825);
1973 if (nau8825->xtalk_enable && !nau8825->high_imped) {
1977 if (!nau8825->xtalk_protect) {
1985 nau8825->xtalk_protect = true;
1986 ret = nau8825_sema_acquire(nau8825, 0);
1988 nau8825->xtalk_protect = false;
1991 if (nau8825->xtalk_protect) {
1992 nau8825->xtalk_state =
1994 schedule_work(&nau8825->xtalk_work);
2001 if (nau8825->xtalk_protect) {
2002 nau8825_sema_release(nau8825);
2003 nau8825->xtalk_protect = false;
2007 dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n");
2008 nau8825_eject_jack(nau8825);
2017 if (nau8825->xtalk_state == NAU8825_XTALK_PREPARE) {
2018 nau8825->xtalk_event = event;
2019 nau8825->xtalk_event_mask = event_mask;
2023 if (nau8825->xtalk_enable && nau8825->xtalk_protect)
2024 schedule_work(&nau8825->xtalk_work);
2044 nau8825_setup_auto_irq(nau8825);
2058 if (event_mask && nau8825->xtalk_state == NAU8825_XTALK_DONE)
2059 snd_soc_jack_report(nau8825->jack, event, event_mask);
2064 static void nau8825_setup_buttons(struct nau8825 *nau8825)
2066 struct regmap *regmap = nau8825->regmap;
2070 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT);
2073 nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT);
2076 nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT);
2080 (nau8825->sar_threshold_num - 1) << NAU8825_KEYDET_LEVELS_NR_SFT);
2083 nau8825->sar_hysteresis << NAU8825_KEYDET_HYSTERESIS_SFT);
2086 nau8825->key_debounce << NAU8825_KEYDET_SHORTKEY_DEBOUNCE_SFT);
2089 (nau8825->sar_threshold[0] << 8) | nau8825->sar_threshold[1]);
2091 (nau8825->sar_threshold[2] << 8) | nau8825->sar_threshold[3]);
2093 (nau8825->sar_threshold[4] << 8) | nau8825->sar_threshold[5]);
2095 (nau8825->sar_threshold[6] << 8) | nau8825->sar_threshold[7]);
2103 static void nau8825_init_regs(struct nau8825 *nau8825)
2105 struct regmap *regmap = nau8825->regmap;
2110 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
2112 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST,
2118 nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT);
2128 nau8825->jkdet_enable ? 0 : NAU8825_JKDET_OUTPUT_EN);
2131 nau8825->jkdet_pull_enable ? 0 : NAU8825_JKDET_PULL_EN);
2134 nau8825->jkdet_pull_up ? NAU8825_JKDET_PULL_UP : 0);
2138 nau8825->jkdet_polarity ? 0 : NAU8825_JACK_POLARITY);
2142 nau8825->jack_insert_debounce << NAU8825_JACK_INSERT_DEBOUNCE_SFT);
2145 nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT);
2155 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage);
2157 if (nau8825->sar_threshold_num)
2158 nau8825_setup_buttons(nau8825);
2169 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
2177 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ,
2199 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL,
2201 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL,
2209 nau8825->adcout_ds << NAU8825_ADCOUT_DS_SFT);
2228 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2231 nau8825->dapm = dapm;
2238 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2241 nau8825_xtalk_cancel(nau8825);
2313 static void nau8825_fll_apply(struct nau8825 *nau8825,
2316 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
2320 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1,
2325 regmap_write(nau8825->regmap, NAU8825_REG_FLL2,
2328 regmap_write(nau8825->regmap, NAU8825_REG_FLL2_LOWER,
2330 regmap_write(nau8825->regmap, NAU8825_REG_FLL2_UPPER,
2334 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL3,
2337 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4,
2341 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2344 regmap_update_bits(nau8825->regmap,
2348 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2353 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
2358 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5,
2361 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6,
2370 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2374 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825)
2389 nau8825_fll_apply(nau8825, &fll_param);
2391 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER,
2396 static int nau8825_mclk_prepare(struct nau8825 *nau8825, unsigned int freq)
2400 nau8825->mclk = devm_clk_get(nau8825->dev, "mclk");
2401 if (IS_ERR(nau8825->mclk)) {
2402 dev_info(nau8825->dev, "No 'mclk' clock found, assume MCLK is managed externally");
2406 if (!nau8825->mclk_freq) {
2407 ret = clk_prepare_enable(nau8825->mclk);
2409 dev_err(nau8825->dev, "Unable to prepare codec mclk\n");
2414 if (nau8825->mclk_freq != freq) {
2415 freq = clk_round_rate(nau8825->mclk, freq);
2416 ret = clk_set_rate(nau8825->mclk, freq);
2418 dev_err(nau8825->dev, "Unable to set mclk rate\n");
2421 nau8825->mclk_freq = freq;
2438 static int nau8825_configure_sysclk(struct nau8825 *nau8825, int clk_id,
2441 struct regmap *regmap = nau8825->regmap;
2448 if (nau8825->mclk_freq) {
2449 clk_disable_unprepare(nau8825->mclk);
2450 nau8825->mclk_freq = 0;
2460 nau8825_sema_acquire(nau8825, 3 * HZ);
2466 nau8825_sema_release(nau8825);
2468 ret = nau8825_mclk_prepare(nau8825, freq);
2474 if (nau8825_is_jack_inserted(nau8825->regmap)) {
2494 dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n");
2496 if (nau8825->mclk_freq) {
2497 clk_disable_unprepare(nau8825->mclk);
2498 nau8825->mclk_freq = 0;
2508 nau8825_sema_acquire(nau8825, 3 * HZ);
2517 nau8825_sema_release(nau8825);
2519 ret = nau8825_mclk_prepare(nau8825, freq);
2530 nau8825_sema_acquire(nau8825, 3 * HZ);
2542 nau8825_sema_release(nau8825);
2544 if (nau8825->mclk_freq) {
2545 clk_disable_unprepare(nau8825->mclk);
2546 nau8825->mclk_freq = 0;
2556 nau8825_sema_acquire(nau8825, 3 * HZ);
2568 nau8825_sema_release(nau8825);
2570 if (nau8825->mclk_freq) {
2571 clk_disable_unprepare(nau8825->mclk);
2572 nau8825->mclk_freq = 0;
2577 dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id);
2581 dev_dbg(nau8825->dev, "Sysclk is %dHz and clock id is %d\n", freq,
2589 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2591 return nau8825_configure_sysclk(nau8825, clk_id, freq);
2594 static int nau8825_resume_setup(struct nau8825 *nau8825)
2596 struct regmap *regmap = nau8825->regmap;
2599 nau8825_configure_sysclk(nau8825, NAU8825_CLK_DIS, 0);
2622 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2634 if (nau8825->mclk_freq) {
2635 ret = clk_prepare_enable(nau8825->mclk);
2637 dev_err(nau8825->dev, "Unable to prepare component mclk\n");
2642 nau8825_resume_setup(nau8825);
2649 regmap_update_bits(nau8825->regmap, NAU8825_REG_MIC_BIAS,
2652 regmap_update_bits(nau8825->regmap,
2655 nau8825_xtalk_cancel(nau8825);
2659 regmap_write(nau8825->regmap,
2662 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL,
2664 if (nau8825->mclk_freq)
2665 clk_disable_unprepare(nau8825->mclk);
2673 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2675 disable_irq(nau8825->irq);
2678 snd_soc_dapm_disable_pin(nau8825->dapm, "SAR");
2679 snd_soc_dapm_disable_pin(nau8825->dapm, "MICBIAS");
2680 snd_soc_dapm_sync(nau8825->dapm);
2681 regcache_cache_only(nau8825->regmap, true);
2682 regcache_mark_dirty(nau8825->regmap);
2689 struct nau8825 *nau8825 = snd_soc_component_get_drvdata(component);
2692 regcache_cache_only(nau8825->regmap, false);
2693 regcache_sync(nau8825->regmap);
2694 nau8825->xtalk_protect = true;
2695 ret = nau8825_sema_acquire(nau8825, 0);
2697 nau8825->xtalk_protect = false;
2698 enable_irq(nau8825->irq);
2736 static void nau8825_print_device_properties(struct nau8825 *nau8825)
2739 struct device *dev = nau8825->dev;
2741 dev_dbg(dev, "jkdet-enable: %d\n", nau8825->jkdet_enable);
2742 dev_dbg(dev, "jkdet-pull-enable: %d\n", nau8825->jkdet_pull_enable);
2743 dev_dbg(dev, "jkdet-pull-up: %d\n", nau8825->jkdet_pull_up);
2744 dev_dbg(dev, "jkdet-polarity: %d\n", nau8825->jkdet_polarity);
2745 dev_dbg(dev, "micbias-voltage: %d\n", nau8825->micbias_voltage);
2746 dev_dbg(dev, "vref-impedance: %d\n", nau8825->vref_impedance);
2748 dev_dbg(dev, "sar-threshold-num: %d\n", nau8825->sar_threshold_num);
2749 for (i = 0; i < nau8825->sar_threshold_num; i++)
2751 nau8825->sar_threshold[i]);
2753 dev_dbg(dev, "sar-hysteresis: %d\n", nau8825->sar_hysteresis);
2754 dev_dbg(dev, "sar-voltage: %d\n", nau8825->sar_voltage);
2755 dev_dbg(dev, "sar-compare-time: %d\n", nau8825->sar_compare_time);
2756 dev_dbg(dev, "sar-sampling-time: %d\n", nau8825->sar_sampling_time);
2757 dev_dbg(dev, "short-key-debounce: %d\n", nau8825->key_debounce);
2759 nau8825->jack_insert_debounce);
2761 nau8825->jack_eject_debounce);
2763 nau8825->xtalk_enable);
2764 dev_dbg(dev, "adcout-drive-strong: %d\n", nau8825->adcout_ds);
2765 dev_dbg(dev, "adc-delay-ms: %d\n", nau8825->adc_delay);
2769 struct nau8825 *nau8825) {
2772 nau8825->jkdet_enable = device_property_read_bool(dev,
2774 nau8825->jkdet_pull_enable = device_property_read_bool(dev,
2776 nau8825->jkdet_pull_up = device_property_read_bool(dev,
2779 &nau8825->jkdet_polarity);
2781 nau8825->jkdet_polarity = 1;
2783 &nau8825->micbias_voltage);
2785 nau8825->micbias_voltage = 6;
2787 &nau8825->vref_impedance);
2789 nau8825->vref_impedance = 2;
2791 &nau8825->sar_threshold_num);
2793 nau8825->sar_threshold_num = 4;
2795 nau8825->sar_threshold, nau8825->sar_threshold_num);
2797 nau8825->sar_threshold[0] = 0x08;
2798 nau8825->sar_threshold[1] = 0x12;
2799 nau8825->sar_threshold[2] = 0x26;
2800 nau8825->sar_threshold[3] = 0x73;
2803 &nau8825->sar_hysteresis);
2805 nau8825->sar_hysteresis = 0;
2807 &nau8825->sar_voltage);
2809 nau8825->sar_voltage = 6;
2811 &nau8825->sar_compare_time);
2813 nau8825->sar_compare_time = 1;
2815 &nau8825->sar_sampling_time);
2817 nau8825->sar_sampling_time = 1;
2819 &nau8825->key_debounce);
2821 nau8825->key_debounce = 3;
2823 &nau8825->jack_insert_debounce);
2825 nau8825->jack_insert_debounce = 7;
2827 &nau8825->jack_eject_debounce);
2829 nau8825->jack_eject_debounce = 0;
2830 nau8825->xtalk_enable = device_property_read_bool(dev,
2832 nau8825->adcout_ds = device_property_read_bool(dev, "nuvoton,adcout-drive-strong");
2833 ret = device_property_read_u32(dev, "nuvoton,adc-delay-ms", &nau8825->adc_delay);
2835 nau8825->adc_delay = 125;
2836 if (nau8825->adc_delay < 125 || nau8825->adc_delay > 500)
2839 nau8825->mclk = devm_clk_get_optional(dev, "mclk");
2840 if (IS_ERR(nau8825->mclk))
2841 return PTR_ERR(nau8825->mclk);
2842 if (!nau8825->mclk)
2849 static int nau8825_setup_irq(struct nau8825 *nau8825)
2853 ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL,
2855 "nau8825", nau8825);
2858 dev_err(nau8825->dev, "Cannot request irq %d (%d)\n",
2859 nau8825->irq, ret);
2869 struct nau8825 *nau8825 = dev_get_platdata(&i2c->dev);
2872 if (!nau8825) {
2873 nau8825 = devm_kzalloc(dev, sizeof(*nau8825), GFP_KERNEL);
2874 if (!nau8825)
2876 ret = nau8825_read_device_properties(dev, nau8825);
2881 i2c_set_clientdata(i2c, nau8825);
2883 nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config);
2884 if (IS_ERR(nau8825->regmap))
2885 return PTR_ERR(nau8825->regmap);
2886 nau8825->dev = dev;
2887 nau8825->irq = i2c->irq;
2891 nau8825->xtalk_state = NAU8825_XTALK_DONE;
2892 nau8825->xtalk_protect = false;
2893 nau8825->xtalk_baktab_initialized = false;
2894 sema_init(&nau8825->xtalk_sem, 1);
2895 INIT_WORK(&nau8825->xtalk_work, nau8825_xtalk_work);
2897 nau8825_print_device_properties(nau8825);
2899 nau8825_reset_chip(nau8825->regmap);
2900 ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value);
2902 dev_err(dev, "Failed to read device id from the NAU8825: %d\n",
2906 nau8825->sw_id = value & NAU8825_SOFTWARE_ID_MASK;
2907 switch (nau8825->sw_id) {
2911 ret = regmap_register_patch(nau8825->regmap, nau8825_regmap_patch,
2919 dev_err(dev, "Not a NAU8825 chip\n");
2923 nau8825_init_regs(nau8825);
2926 nau8825_setup_irq(nau8825);
2937 { "nau8825" },
2944 { .compatible = "nuvoton,nau8825", },
2960 .name = "nau8825",
2970 MODULE_DESCRIPTION("ASoC nau8825 driver");