Lines Matching +full:digital +full:- +full:input +full:- +full:threshold +full:- +full:mode +full:- +full:fixed
1 // SPDX-License-Identifier: GPL-2.0-only
8 * Co-author: Meng-Huang Kuo <mhkuo@nuvoton.com>
35 #define NUVOTON_CODEC_DAI "nau8825-hifi"
83 /* ratio for input clk freq */
223 * nau8825_sema_acquire - acquire the semaphore of nau88l25
233 * this function returns -ETIME. If the sleep is interrupted by a signal,
234 * this function will return -EINTR. It returns 0 if the semaphore was
246 ret = down_timeout(&nau8825->xtalk_sem, timeout); in nau8825_sema_acquire()
248 dev_warn(nau8825->dev, "Acquire semaphore timeout\n"); in nau8825_sema_acquire()
250 ret = down_trylock(&nau8825->xtalk_sem); in nau8825_sema_acquire()
252 dev_warn(nau8825->dev, "Acquire semaphore fail\n"); in nau8825_sema_acquire()
259 * nau8825_sema_release - release the semaphore of nau88l25
267 up(&nau8825->xtalk_sem); in nau8825_sema_release()
271 * nau8825_sema_reset - reset the semaphore for nau88l25
279 nau8825->xtalk_sem.count = 1; in nau8825_sema_reset()
283 * nau8825_hpvol_ramp - Ramp up the headphone volume change gradually to target level.
290 * The headphone volume is from 0dB to minimum -54dB and -1dB per step.
311 /* only handle volume from 0dB to minimum -54dB */ in nau8825_hpvol_ramp()
319 value = to - volume + from; in nau8825_hpvol_ramp()
320 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
329 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSVOL_CTRL, in nau8825_hpvol_ramp()
335 * nau8825_intlog10_dec3 - Computes log10 of a value, rounding the result to 3 decimal places.
336 * @value: input for log10
346 * nau8825_xtalk_sidetone - computes cross talk suppression sidetone gain.
368 gain = (sig_org - sig_cros) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
370 gain = (sig_cros - sig_org) * 20 + GAIN_AUGMENT; in nau8825_xtalk_sidetone()
371 sidetone = SIDETONE_BASE - gain * 2; in nau8825_xtalk_sidetone()
384 return -EINVAL; in nau8825_xtalk_baktab_index_by_reg()
391 if (nau8825->xtalk_baktab_initialized) in nau8825_xtalk_backup()
396 regmap_read(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_backup()
399 nau8825->xtalk_baktab_initialized = true; in nau8825_xtalk_backup()
406 if (!nau8825->xtalk_baktab_initialized) in nau8825_xtalk_restore()
423 regmap_write(nau8825->regmap, nau8825_xtalk_baktab[i].reg, in nau8825_xtalk_restore()
427 nau8825->xtalk_baktab_initialized = false; in nau8825_xtalk_restore()
433 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_prepare_dac()
442 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare_dac()
446 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_prepare_dac()
451 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
456 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_prepare_dac()
460 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_prepare_dac()
463 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_prepare_dac()
466 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLASSG_CTRL, in nau8825_xtalk_prepare_dac()
474 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_prepare_adc()
482 regmap_write(nau8825->regmap, NAU8825_REG_FLL1, 0x0); in nau8825_xtalk_clock()
483 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, 0x3126); in nau8825_xtalk_clock()
484 regmap_write(nau8825->regmap, NAU8825_REG_FLL3, 0x0008); in nau8825_xtalk_clock()
485 regmap_write(nau8825->regmap, NAU8825_REG_FLL4, 0x0010); in nau8825_xtalk_clock()
486 regmap_write(nau8825->regmap, NAU8825_REG_FLL5, 0x0); in nau8825_xtalk_clock()
487 regmap_write(nau8825->regmap, NAU8825_REG_FLL6, 0x6000); in nau8825_xtalk_clock()
489 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
491 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, NAU8825_DCO_EN, in nau8825_xtalk_clock()
496 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_xtalk_clock()
498 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_xtalk_clock()
509 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_prepare()
517 if (index != -EINVAL) { in nau8825_xtalk_prepare()
525 /* Config channel path and digital gain */ in nau8825_xtalk_prepare()
526 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_xtalk_prepare()
529 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_xtalk_prepare()
535 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_prepare()
541 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_prepare()
544 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_xtalk_prepare()
545 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare()
548 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_prepare()
556 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_xtalk_clean_dac()
559 regmap_update_bits(nau8825->regmap, NAU8825_REG_HSD_CTRL, in nau8825_xtalk_clean_dac()
563 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_xtalk_clean_dac()
564 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
568 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
572 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_clean_dac()
576 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
578 regmap_update_bits(nau8825->regmap, NAU8825_REG_POWER_UP_CONTROL, in nau8825_xtalk_clean_dac()
582 regmap_update_bits(nau8825->regmap, NAU8825_REG_RDAC, in nau8825_xtalk_clean_dac()
585 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_xtalk_clean_dac()
588 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_xtalk_clean_dac()
591 if (!nau8825->irq) in nau8825_xtalk_clean_dac()
592 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_clean_dac()
599 regmap_update_bits(nau8825->regmap, NAU8825_REG_ANALOG_ADC_2, in nau8825_xtalk_clean_adc()
610 regmap_write(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, 0); in nau8825_xtalk_clean()
612 regmap_update_bits(nau8825->regmap, NAU8825_REG_INTERRUPT_MASK, in nau8825_xtalk_clean()
615 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_xtalk_clean()
625 regmap_update_bits(nau8825->regmap, NAU8825_REG_ADC_DGAIN_CTRL, in nau8825_xtalk_imm_start()
630 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
633 switch (nau8825->xtalk_state) { in nau8825_xtalk_imm_start()
636 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
642 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_xtalk_imm_start()
650 /* Impedance measurement mode enable */ in nau8825_xtalk_imm_start()
651 regmap_update_bits(nau8825->regmap, NAU8825_REG_IMM_MODE_CTRL, in nau8825_xtalk_imm_start()
657 /* Impedance measurement mode disable */ in nau8825_xtalk_imm_stop()
658 regmap_update_bits(nau8825->regmap, in nau8825_xtalk_imm_stop()
665 * sending a 23Hz -24dBV sine wave into the headset output DAC and through
686 switch (nau8825->xtalk_state) { in nau8825_xtalk_measure()
694 nau8825->xtalk_state = NAU8825_XTALK_HPR_R2L; in nau8825_xtalk_measure()
701 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
702 &nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
703 dev_dbg(nau8825->dev, "HPR_R2L imm: %x\n", in nau8825_xtalk_measure()
704 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L]); in nau8825_xtalk_measure()
705 /* Disable then re-enable IMM mode to update */ in nau8825_xtalk_measure()
708 nau8825->xtalk_state = NAU8825_XTALK_HPL_R2L; in nau8825_xtalk_measure()
718 regmap_read(nau8825->regmap, NAU8825_REG_IMM_RMS_L, in nau8825_xtalk_measure()
719 &nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
720 dev_dbg(nau8825->dev, "HPL_R2L imm: %x\n", in nau8825_xtalk_measure()
721 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
724 nau8825->xtalk_state = NAU8825_XTALK_IMM; in nau8825_xtalk_measure()
728 * signal level vlues are ready. The side tone gain is deter- in nau8825_xtalk_measure()
733 nau8825->imp_rms[NAU8825_XTALK_HPR_R2L], in nau8825_xtalk_measure()
734 nau8825->imp_rms[NAU8825_XTALK_HPL_R2L]); in nau8825_xtalk_measure()
735 dev_dbg(nau8825->dev, "cross talk sidetone: %x\n", sidetone); in nau8825_xtalk_measure()
736 regmap_write(nau8825->regmap, NAU8825_REG_DAC_DGAIN_CTRL, in nau8825_xtalk_measure()
739 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_measure()
755 if (nau8825->xtalk_state == NAU8825_XTALK_IMM) in nau8825_xtalk_work()
764 if (nau8825->xtalk_state == NAU8825_XTALK_DONE) { in nau8825_xtalk_work()
765 snd_soc_jack_report(nau8825->jack, nau8825->xtalk_event, in nau8825_xtalk_work()
766 nau8825->xtalk_event_mask); in nau8825_xtalk_work()
768 nau8825->xtalk_protect = false; in nau8825_xtalk_work()
778 if (nau8825->xtalk_enable && nau8825->xtalk_state != in nau8825_xtalk_cancel()
780 cancel_work_sync(&nau8825->xtalk_work); in nau8825_xtalk_cancel()
785 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_xtalk_cancel()
786 nau8825->xtalk_protect = false; in nau8825_xtalk_cancel()
861 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_fepga_event()
866 regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA, in nau8825_fepga_event()
869 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_fepga_event()
872 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_fepga_event()
874 regmap_update_bits(nau8825->regmap, NAU8825_REG_FEPGA, in nau8825_fepga_event()
887 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_adc_event()
892 msleep(nau8825->adc_delay); in nau8825_adc_event()
893 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_adc_event()
897 if (!nau8825->irq) in nau8825_adc_event()
898 regmap_update_bits(nau8825->regmap, in nau8825_adc_event()
902 return -EINVAL; in nau8825_adc_event()
911 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_pump_event()
918 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
922 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_pump_event()
926 return -EINVAL; in nau8825_pump_event()
935 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8825_output_dac_event()
941 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
943 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_output_dac_event()
944 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_output_dac_event()
947 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_output_dac_event()
952 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_output_dac_event()
954 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_output_dac_event()
955 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_output_dac_event()
959 regmap_update_bits(nau8825->regmap, NAU8825_REG_CHARGE_PUMP, in nau8825_output_dac_event()
964 return -EINVAL; in nau8825_output_dac_event()
973 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in system_clock_control()
975 struct regmap *regmap = nau8825->regmap; in system_clock_control()
978 dev_dbg(nau8825->dev, "system clock control : POWER OFF\n"); in system_clock_control()
999 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_get()
1001 if (!component->regmap) in nau8825_biq_coeff_get()
1002 return -EINVAL; in nau8825_biq_coeff_get()
1004 regmap_raw_read(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_get()
1005 ucontrol->value.bytes.data, params->max); in nau8825_biq_coeff_get()
1013 struct soc_bytes_ext *params = (void *)kcontrol->private_value; in nau8825_biq_coeff_put()
1016 if (!component->regmap) in nau8825_biq_coeff_put()
1017 return -EINVAL; in nau8825_biq_coeff_put()
1019 data = kmemdup(ucontrol->value.bytes.data, in nau8825_biq_coeff_put()
1020 params->max, GFP_KERNEL | GFP_DMA); in nau8825_biq_coeff_put()
1022 return -ENOMEM; in nau8825_biq_coeff_put()
1024 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1026 regmap_raw_write(component->regmap, NAU8825_REG_BIQ_COF1, in nau8825_biq_coeff_put()
1027 data, params->max); in nau8825_biq_coeff_put()
1028 regmap_update_bits(component->regmap, NAU8825_REG_BIQ_CTRL, in nau8825_biq_coeff_put()
1059 static const DECLARE_TLV_DB_MINMAX_MUTE(adc_vol_tlv, -10300, 2400);
1060 static const DECLARE_TLV_DB_MINMAX_MUTE(sidetone_vol_tlv, -4200, 0);
1061 static const DECLARE_TLV_DB_MINMAX(dac_vol_tlv, -5400, 0);
1062 static const DECLARE_TLV_DB_MINMAX(fepga_gain_tlv, -100, 3600);
1063 static const DECLARE_TLV_DB_MINMAX_MUTE(crosstalk_vol_tlv, -9600, 2400);
1176 /* HPOL/R are ungrounded by disabling 16 Ohm pull-downs on playback */
1242 regmap_read(nau8825->regmap, in nau8825_get_osr()
1249 regmap_read(nau8825->regmap, in nau8825_get_osr()
1261 struct snd_soc_component *component = dai->component; in nau8825_dai_startup()
1265 osr = nau8825_get_osr(nau8825, substream->stream); in nau8825_dai_startup()
1266 if (!osr || !osr->osr) in nau8825_dai_startup()
1267 return -EINVAL; in nau8825_dai_startup()
1269 return snd_pcm_hw_constraint_minmax(substream->runtime, in nau8825_dai_startup()
1271 0, CLK_DA_AD_MAX / osr->osr); in nau8825_dai_startup()
1278 struct snd_soc_component *component = dai->component; in nau8825_hw_params()
1282 int err = -EINVAL; in nau8825_hw_params()
1292 osr = nau8825_get_osr(nau8825, substream->stream); in nau8825_hw_params()
1293 if (!osr || !osr->osr) in nau8825_hw_params()
1295 if (params_rate(params) * osr->osr > CLK_DA_AD_MAX) in nau8825_hw_params()
1297 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in nau8825_hw_params()
1298 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1300 osr->clk_src << NAU8825_CLK_DAC_SRC_SFT); in nau8825_hw_params()
1302 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_hw_params()
1304 osr->clk_src << NAU8825_CLK_ADC_SRC_SFT); in nau8825_hw_params()
1307 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, &ctrl_val); in nau8825_hw_params()
1319 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_hw_params()
1341 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_hw_params()
1354 struct snd_soc_component *component = codec_dai->component; in nau8825_set_dai_fmt()
1365 return -EINVAL; in nau8825_set_dai_fmt()
1375 return -EINVAL; in nau8825_set_dai_fmt()
1396 return -EINVAL; in nau8825_set_dai_fmt()
1401 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, in nau8825_set_dai_fmt()
1405 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_set_dai_fmt()
1415 * nau8825_set_tdm_slot - configure DAI TDM.
1423 * The limitation is DAC and ADC need shift 4 slots at 8 slots mode.
1428 struct snd_soc_component *component = dai->component; in nau8825_set_tdm_slot()
1433 dev_err(nau8825->dev, "Only support 4 or 8 slots!\n"); in nau8825_set_tdm_slot()
1434 return -EINVAL; in nau8825_set_tdm_slot()
1437 /* The driver is limited to 1-channel for ADC, and 2-channel for DAC on TDM mode */ in nau8825_set_tdm_slot()
1440 dev_err(nau8825->dev, in nau8825_set_tdm_slot()
1441 "The limitation is 1-channel for ADC, and 2-channel for DAC on TDM mode.\n"); in nau8825_set_tdm_slot()
1442 return -EINVAL; in nau8825_set_tdm_slot()
1449 dev_err(nau8825->dev, in nau8825_set_tdm_slot()
1451 return -EINVAL; in nau8825_set_tdm_slot()
1454 /* The offset of fixed 4 slots for 8 slots support */ in nau8825_set_tdm_slot()
1456 regmap_update_bits(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL2, in nau8825_set_tdm_slot()
1458 regmap_read(nau8825->regmap, NAU8825_REG_I2S_PCM_CTRL1, &value); in nau8825_set_tdm_slot()
1495 return -EINVAL; in nau8825_set_tdm_slot()
1498 ctrl_val |= adc_s - 1; in nau8825_set_tdm_slot()
1500 regmap_update_bits(nau8825->regmap, NAU8825_REG_TDM_CTRL, in nau8825_set_tdm_slot()
1504 regmap_update_bits(nau8825->regmap, NAU8825_REG_LEFT_TIME_SLOT, in nau8825_set_tdm_slot()
1522 .name = "nau8825-hifi",
1541 * nau8825_enable_jack_detect - Specify a jack for event reporting
1554 struct regmap *regmap = nau8825->regmap; in nau8825_enable_jack_detect()
1556 nau8825->jack = jack; in nau8825_enable_jack_detect()
1558 if (!nau8825->jack) { in nau8825_enable_jack_detect()
1607 /* Reset the intrruption status from rightmost bit if the corres- in nau8825_int_status_clear_all()
1621 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_eject_jack()
1622 struct regmap *regmap = nau8825->regmap; in nau8825_eject_jack()
1640 /* Enable the insertion interruption, disable the ejection inter- in nau8825_eject_jack()
1641 * ruption, and then bypass de-bounce circuit. in nau8825_eject_jack()
1654 /* Disable ADC needed for interruptions at audo mode */ in nau8825_eject_jack()
1658 /* Close clock for jack type detection at manual mode */ in nau8825_eject_jack()
1662 /* Enable audo mode interruptions with internal clock. */
1665 struct regmap *regmap = nau8825->regmap; in nau8825_setup_auto_irq()
1689 * master mode on then off enables us to generate that FSCLK cycle in nau8825_setup_auto_irq()
1697 /* Not bypass de-bounce circuit */ in nau8825_setup_auto_irq()
1704 /* Restart the jack detection process at auto mode */ in nau8825_setup_auto_irq()
1731 struct regmap *regmap = nau8825->regmap; in nau8825_high_imped_detection()
1732 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_high_imped_detection()
1788 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage); in nau8825_high_imped_detection()
1798 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT); in nau8825_high_imped_detection()
1801 (nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT) | in nau8825_high_imped_detection()
1802 (nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT)); in nau8825_high_imped_detection()
1803 dev_dbg(nau8825->dev, "adc_mg1:%x, adc_mg2:%x\n", adc_mg1, adc_mg2); in nau8825_high_imped_detection()
1807 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n"); in nau8825_high_imped_detection()
1822 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n"); in nau8825_high_imped_detection()
1837 dev_err(nau8825->dev, "Jack broken.\n"); in nau8825_high_imped_detection()
1838 return -EINVAL; in nau8825_high_imped_detection()
1846 struct regmap *regmap = nau8825->regmap; in nau8825_jack_insert()
1847 struct snd_soc_dapm_context *dapm = nau8825->dapm; in nau8825_jack_insert()
1855 nau8825->high_imped = true; in nau8825_jack_insert()
1857 nau8825->high_imped = false; in nau8825_jack_insert()
1865 dev_dbg(nau8825->dev, "OMTP (micgnd1) mic connected\n"); in nau8825_jack_insert()
1885 dev_dbg(nau8825->dev, "CTIA (micgnd2) mic connected\n"); in nau8825_jack_insert()
1906 dev_warn(nau8825->dev, in nau8825_jack_insert()
1938 struct regmap *regmap = nau8825->regmap; in nau8825_interrupt()
1942 dev_err(nau8825->dev, "failed to read irq status\n"); in nau8825_interrupt()
1959 * lower 8 bits - for long pressed buttons in nau8825_interrupt()
1961 nau8825->button_pressed = nau8825_button_decode( in nau8825_interrupt()
1964 event |= nau8825->button_pressed; in nau8825_interrupt()
1973 if (nau8825->xtalk_enable && !nau8825->high_imped) { in nau8825_interrupt()
1977 if (!nau8825->xtalk_protect) { in nau8825_interrupt()
1978 /* Raise protection for cross talk de- in nau8825_interrupt()
1980 * The driver has to cancel the pro- in nau8825_interrupt()
1985 nau8825->xtalk_protect = true; in nau8825_interrupt()
1988 nau8825->xtalk_protect = false; in nau8825_interrupt()
1991 if (nau8825->xtalk_protect) { in nau8825_interrupt()
1992 nau8825->xtalk_state = in nau8825_interrupt()
1994 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
2001 if (nau8825->xtalk_protect) { in nau8825_interrupt()
2003 nau8825->xtalk_protect = false; in nau8825_interrupt()
2007 dev_warn(nau8825->dev, "Headset completion IRQ fired but no headset connected\n"); in nau8825_interrupt()
2017 if (nau8825->xtalk_state == NAU8825_XTALK_PREPARE) { in nau8825_interrupt()
2018 nau8825->xtalk_event = event; in nau8825_interrupt()
2019 nau8825->xtalk_event_mask = event_mask; in nau8825_interrupt()
2023 if (nau8825->xtalk_enable && nau8825->xtalk_protect) in nau8825_interrupt()
2024 schedule_work(&nau8825->xtalk_work); in nau8825_interrupt()
2030 * the intrruption at manual mode has bypassed debounce in nau8825_interrupt()
2034 /* Turn off insertion interruption at manual mode */ in nau8825_interrupt()
2042 * mode which can detect microphone and jack type. in nau8825_interrupt()
2058 if (event_mask && nau8825->xtalk_state == NAU8825_XTALK_DONE) in nau8825_interrupt()
2059 snd_soc_jack_report(nau8825->jack, event, event_mask); in nau8825_interrupt()
2066 struct regmap *regmap = nau8825->regmap; in nau8825_setup_buttons()
2070 nau8825->sar_voltage << NAU8825_SAR_TRACKING_GAIN_SFT); in nau8825_setup_buttons()
2073 nau8825->sar_compare_time << NAU8825_SAR_COMPARE_TIME_SFT); in nau8825_setup_buttons()
2076 nau8825->sar_sampling_time << NAU8825_SAR_SAMPLING_TIME_SFT); in nau8825_setup_buttons()
2080 (nau8825->sar_threshold_num - 1) << NAU8825_KEYDET_LEVELS_NR_SFT); in nau8825_setup_buttons()
2083 nau8825->sar_hysteresis << NAU8825_KEYDET_HYSTERESIS_SFT); in nau8825_setup_buttons()
2086 nau8825->key_debounce << NAU8825_KEYDET_SHORTKEY_DEBOUNCE_SFT); in nau8825_setup_buttons()
2089 (nau8825->sar_threshold[0] << 8) | nau8825->sar_threshold[1]); in nau8825_setup_buttons()
2091 (nau8825->sar_threshold[2] << 8) | nau8825->sar_threshold[3]); in nau8825_setup_buttons()
2093 (nau8825->sar_threshold[4] << 8) | nau8825->sar_threshold[5]); in nau8825_setup_buttons()
2095 (nau8825->sar_threshold[6] << 8) | nau8825->sar_threshold[7]); in nau8825_setup_buttons()
2105 struct regmap *regmap = nau8825->regmap; in nau8825_init_regs()
2110 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
2112 regmap_update_bits(nau8825->regmap, NAU8825_REG_BOOST, in nau8825_init_regs()
2118 nau8825->vref_impedance << NAU8825_BIAS_VMID_SEL_SFT); in nau8825_init_regs()
2128 nau8825->jkdet_enable ? 0 : NAU8825_JKDET_OUTPUT_EN); in nau8825_init_regs()
2131 nau8825->jkdet_pull_enable ? 0 : NAU8825_JKDET_PULL_EN); in nau8825_init_regs()
2134 nau8825->jkdet_pull_up ? NAU8825_JKDET_PULL_UP : 0); in nau8825_init_regs()
2137 /* jkdet_polarity - 1 is for active-low */ in nau8825_init_regs()
2138 nau8825->jkdet_polarity ? 0 : NAU8825_JACK_POLARITY); in nau8825_init_regs()
2142 nau8825->jack_insert_debounce << NAU8825_JACK_INSERT_DEBOUNCE_SFT); in nau8825_init_regs()
2145 nau8825->jack_eject_debounce << NAU8825_JACK_EJECT_DEBOUNCE_SFT); in nau8825_init_regs()
2151 /* Mask unneeded IRQs: 1 - disable, 0 - enable */ in nau8825_init_regs()
2155 NAU8825_MICBIAS_VOLTAGE_MASK, nau8825->micbias_voltage); in nau8825_init_regs()
2157 if (nau8825->sar_threshold_num) in nau8825_init_regs()
2169 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_init_regs()
2173 /* Enable TESTDAC. This sets the analog DAC inputs to a '0' input in nau8825_init_regs()
2175 * the analog and digital DAC circuit. in nau8825_init_regs()
2177 regmap_update_bits(nau8825->regmap, NAU8825_REG_BIAS_ADJ, in nau8825_init_regs()
2199 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACL_CTRL, in nau8825_init_regs()
2201 regmap_update_bits(nau8825->regmap, NAU8825_REG_DACR_CTRL, in nau8825_init_regs()
2209 nau8825->adcout_ds << NAU8825_ADCOUT_DS_SFT); in nau8825_init_regs()
2231 nau8825->dapm = dapm; in nau8825_component_probe()
2245 * nau8825_calc_fll_param - Calculate FLL parameters.
2261 * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. in nau8825_calc_fll_param()
2270 return -EINVAL; in nau8825_calc_fll_param()
2271 fll_param->clk_ref_div = fll_pre_scalar[i].val; in nau8825_calc_fll_param()
2279 return -EINVAL; in nau8825_calc_fll_param()
2280 fll_param->ratio = fll_ratio[i].val; in nau8825_calc_fll_param()
2283 * FDCO must be within the 90MHz - 124MHz or the FFL cannot be in nau8825_calc_fll_param()
2298 return -EINVAL; in nau8825_calc_fll_param()
2299 fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; in nau8825_calc_fll_param()
2301 /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional in nau8825_calc_fll_param()
2302 * input based on FDCO, FREF and FLL ratio. in nau8825_calc_fll_param()
2304 fvco = div_u64(fvco_max << fll_param->fll_frac_num, fref * fll_param->ratio); in nau8825_calc_fll_param()
2305 fll_param->fll_int = (fvco >> fll_param->fll_frac_num) & 0x3FF; in nau8825_calc_fll_param()
2306 if (fll_param->fll_frac_num == 16) in nau8825_calc_fll_param()
2307 fll_param->fll_frac = fvco & 0xFFFF; in nau8825_calc_fll_param()
2309 fll_param->fll_frac = fvco & 0xFFFFFF; in nau8825_calc_fll_param()
2316 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_fll_apply()
2318 NAU8825_CLK_SRC_MCLK | fll_param->mclk_src); in nau8825_fll_apply()
2320 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL1, in nau8825_fll_apply()
2322 fll_param->ratio | (0x6 << NAU8825_ICTRL_LATCH_SFT)); in nau8825_fll_apply()
2323 /* FLL 16/24 bit fractional input */ in nau8825_fll_apply()
2324 if (fll_param->fll_frac_num == 16) in nau8825_fll_apply()
2325 regmap_write(nau8825->regmap, NAU8825_REG_FLL2, in nau8825_fll_apply()
2326 fll_param->fll_frac); in nau8825_fll_apply()
2328 regmap_write(nau8825->regmap, NAU8825_REG_FLL2_LOWER, in nau8825_fll_apply()
2329 fll_param->fll_frac & 0xffff); in nau8825_fll_apply()
2330 regmap_write(nau8825->regmap, NAU8825_REG_FLL2_UPPER, in nau8825_fll_apply()
2331 (fll_param->fll_frac >> 16) & 0xff); in nau8825_fll_apply()
2333 /* FLL 10-bit integer input */ in nau8825_fll_apply()
2334 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL3, in nau8825_fll_apply()
2335 NAU8825_FLL_INTEGER_MASK, fll_param->fll_int); in nau8825_fll_apply()
2336 /* FLL pre-scaler */ in nau8825_fll_apply()
2337 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL4, in nau8825_fll_apply()
2339 fll_param->clk_ref_div << NAU8825_FLL_REF_DIV_SFT); in nau8825_fll_apply()
2340 /* select divided VCO input */ in nau8825_fll_apply()
2341 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2343 /* Disable free-running mode */ in nau8825_fll_apply()
2344 regmap_update_bits(nau8825->regmap, in nau8825_fll_apply()
2346 if (fll_param->fll_frac) { in nau8825_fll_apply()
2348 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2353 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2358 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL5, in nau8825_fll_apply()
2361 regmap_update_bits(nau8825->regmap, NAU8825_REG_FLL6, in nau8825_fll_apply()
2374 if (nau8825->sw_id == NAU8825_SOFTWARE_ID_NAU8825) in nau8825_set_pll()
2382 dev_err(component->dev, "Unsupported input clock %d\n", freq_in); in nau8825_set_pll()
2385 dev_dbg(component->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", in nau8825_set_pll()
2391 regmap_update_bits(nau8825->regmap, NAU8825_REG_CLK_DIVIDER, in nau8825_set_pll()
2400 nau8825->mclk = devm_clk_get(nau8825->dev, "mclk"); in nau8825_mclk_prepare()
2401 if (IS_ERR(nau8825->mclk)) { in nau8825_mclk_prepare()
2402 dev_info(nau8825->dev, "No 'mclk' clock found, assume MCLK is managed externally"); in nau8825_mclk_prepare()
2406 if (!nau8825->mclk_freq) { in nau8825_mclk_prepare()
2407 ret = clk_prepare_enable(nau8825->mclk); in nau8825_mclk_prepare()
2409 dev_err(nau8825->dev, "Unable to prepare codec mclk\n"); in nau8825_mclk_prepare()
2414 if (nau8825->mclk_freq != freq) { in nau8825_mclk_prepare()
2415 freq = clk_round_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2416 ret = clk_set_rate(nau8825->mclk, freq); in nau8825_mclk_prepare()
2418 dev_err(nau8825->dev, "Unable to set mclk rate\n"); in nau8825_mclk_prepare()
2421 nau8825->mclk_freq = freq; in nau8825_mclk_prepare()
2441 struct regmap *regmap = nau8825->regmap; in nau8825_configure_sysclk()
2448 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2449 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2450 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2456 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2474 if (nau8825_is_jack_inserted(nau8825->regmap)) { in nau8825_configure_sysclk()
2494 dev_warn(nau8825->dev, "Disable clock for power saving when no headset connected\n"); in nau8825_configure_sysclk()
2496 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2497 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2498 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2504 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2509 /* Higher FLL reference input frequency can only set lower in nau8825_configure_sysclk()
2510 * gain error, such as 0000 for input reference from MCLK in nau8825_configure_sysclk()
2526 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2531 /* If FLL reference input is from low frequency source, in nau8825_configure_sysclk()
2533 * the most sensitive gain error correction threshold, in nau8825_configure_sysclk()
2544 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2545 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2546 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2552 * interrupt handler. In order to avoid the playback inter- in nau8825_configure_sysclk()
2557 /* If FLL reference input is from low frequency source, in nau8825_configure_sysclk()
2559 * the most sensitive gain error correction threshold, in nau8825_configure_sysclk()
2570 if (nau8825->mclk_freq) { in nau8825_configure_sysclk()
2571 clk_disable_unprepare(nau8825->mclk); in nau8825_configure_sysclk()
2572 nau8825->mclk_freq = 0; in nau8825_configure_sysclk()
2577 dev_err(nau8825->dev, "Invalid clock id (%d)\n", clk_id); in nau8825_configure_sysclk()
2578 return -EINVAL; in nau8825_configure_sysclk()
2581 dev_dbg(nau8825->dev, "Sysclk is %dHz and clock id is %d\n", freq, in nau8825_configure_sysclk()
2596 struct regmap *regmap = nau8825->regmap; in nau8825_resume_setup()
2598 /* Close clock when jack type detection at manual mode */ in nau8825_resume_setup()
2605 * bypass de-bounce circuit. in nau8825_resume_setup()
2634 if (nau8825->mclk_freq) { in nau8825_set_bias_level()
2635 ret = clk_prepare_enable(nau8825->mclk); in nau8825_set_bias_level()
2637 dev_err(nau8825->dev, "Unable to prepare component mclk\n"); in nau8825_set_bias_level()
2649 regmap_update_bits(nau8825->regmap, NAU8825_REG_MIC_BIAS, in nau8825_set_bias_level()
2652 regmap_update_bits(nau8825->regmap, in nau8825_set_bias_level()
2659 regmap_write(nau8825->regmap, in nau8825_set_bias_level()
2661 /* Disable ADC needed for interruptions at audo mode */ in nau8825_set_bias_level()
2662 regmap_update_bits(nau8825->regmap, NAU8825_REG_ENA_CTRL, in nau8825_set_bias_level()
2664 if (nau8825->mclk_freq) in nau8825_set_bias_level()
2665 clk_disable_unprepare(nau8825->mclk); in nau8825_set_bias_level()
2675 disable_irq(nau8825->irq); in nau8825_suspend()
2678 snd_soc_dapm_disable_pin(nau8825->dapm, "SAR"); in nau8825_suspend()
2679 snd_soc_dapm_disable_pin(nau8825->dapm, "MICBIAS"); in nau8825_suspend()
2680 snd_soc_dapm_sync(nau8825->dapm); in nau8825_suspend()
2681 regcache_cache_only(nau8825->regmap, true); in nau8825_suspend()
2682 regcache_mark_dirty(nau8825->regmap); in nau8825_suspend()
2692 regcache_cache_only(nau8825->regmap, false); in nau8825_resume()
2693 regcache_sync(nau8825->regmap); in nau8825_resume()
2694 nau8825->xtalk_protect = true; in nau8825_resume()
2697 nau8825->xtalk_protect = false; in nau8825_resume()
2698 enable_irq(nau8825->irq); in nau8825_resume()
2739 struct device *dev = nau8825->dev; in nau8825_print_device_properties()
2741 dev_dbg(dev, "jkdet-enable: %d\n", nau8825->jkdet_enable); in nau8825_print_device_properties()
2742 dev_dbg(dev, "jkdet-pull-enable: %d\n", nau8825->jkdet_pull_enable); in nau8825_print_device_properties()
2743 dev_dbg(dev, "jkdet-pull-up: %d\n", nau8825->jkdet_pull_up); in nau8825_print_device_properties()
2744 dev_dbg(dev, "jkdet-polarity: %d\n", nau8825->jkdet_polarity); in nau8825_print_device_properties()
2745 dev_dbg(dev, "micbias-voltage: %d\n", nau8825->micbias_voltage); in nau8825_print_device_properties()
2746 dev_dbg(dev, "vref-impedance: %d\n", nau8825->vref_impedance); in nau8825_print_device_properties()
2748 dev_dbg(dev, "sar-threshold-num: %d\n", nau8825->sar_threshold_num); in nau8825_print_device_properties()
2749 for (i = 0; i < nau8825->sar_threshold_num; i++) in nau8825_print_device_properties()
2750 dev_dbg(dev, "sar-threshold[%d]=%d\n", i, in nau8825_print_device_properties()
2751 nau8825->sar_threshold[i]); in nau8825_print_device_properties()
2753 dev_dbg(dev, "sar-hysteresis: %d\n", nau8825->sar_hysteresis); in nau8825_print_device_properties()
2754 dev_dbg(dev, "sar-voltage: %d\n", nau8825->sar_voltage); in nau8825_print_device_properties()
2755 dev_dbg(dev, "sar-compare-time: %d\n", nau8825->sar_compare_time); in nau8825_print_device_properties()
2756 dev_dbg(dev, "sar-sampling-time: %d\n", nau8825->sar_sampling_time); in nau8825_print_device_properties()
2757 dev_dbg(dev, "short-key-debounce: %d\n", nau8825->key_debounce); in nau8825_print_device_properties()
2758 dev_dbg(dev, "jack-insert-debounce: %d\n", in nau8825_print_device_properties()
2759 nau8825->jack_insert_debounce); in nau8825_print_device_properties()
2760 dev_dbg(dev, "jack-eject-debounce: %d\n", in nau8825_print_device_properties()
2761 nau8825->jack_eject_debounce); in nau8825_print_device_properties()
2762 dev_dbg(dev, "crosstalk-enable: %d\n", in nau8825_print_device_properties()
2763 nau8825->xtalk_enable); in nau8825_print_device_properties()
2764 dev_dbg(dev, "adcout-drive-strong: %d\n", nau8825->adcout_ds); in nau8825_print_device_properties()
2765 dev_dbg(dev, "adc-delay-ms: %d\n", nau8825->adc_delay); in nau8825_print_device_properties()
2772 nau8825->jkdet_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2773 "nuvoton,jkdet-enable"); in nau8825_read_device_properties()
2774 nau8825->jkdet_pull_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2775 "nuvoton,jkdet-pull-enable"); in nau8825_read_device_properties()
2776 nau8825->jkdet_pull_up = device_property_read_bool(dev, in nau8825_read_device_properties()
2777 "nuvoton,jkdet-pull-up"); in nau8825_read_device_properties()
2778 ret = device_property_read_u32(dev, "nuvoton,jkdet-polarity", in nau8825_read_device_properties()
2779 &nau8825->jkdet_polarity); in nau8825_read_device_properties()
2781 nau8825->jkdet_polarity = 1; in nau8825_read_device_properties()
2782 ret = device_property_read_u32(dev, "nuvoton,micbias-voltage", in nau8825_read_device_properties()
2783 &nau8825->micbias_voltage); in nau8825_read_device_properties()
2785 nau8825->micbias_voltage = 6; in nau8825_read_device_properties()
2786 ret = device_property_read_u32(dev, "nuvoton,vref-impedance", in nau8825_read_device_properties()
2787 &nau8825->vref_impedance); in nau8825_read_device_properties()
2789 nau8825->vref_impedance = 2; in nau8825_read_device_properties()
2790 ret = device_property_read_u32(dev, "nuvoton,sar-threshold-num", in nau8825_read_device_properties()
2791 &nau8825->sar_threshold_num); in nau8825_read_device_properties()
2793 nau8825->sar_threshold_num = 4; in nau8825_read_device_properties()
2794 ret = device_property_read_u32_array(dev, "nuvoton,sar-threshold", in nau8825_read_device_properties()
2795 nau8825->sar_threshold, nau8825->sar_threshold_num); in nau8825_read_device_properties()
2797 nau8825->sar_threshold[0] = 0x08; in nau8825_read_device_properties()
2798 nau8825->sar_threshold[1] = 0x12; in nau8825_read_device_properties()
2799 nau8825->sar_threshold[2] = 0x26; in nau8825_read_device_properties()
2800 nau8825->sar_threshold[3] = 0x73; in nau8825_read_device_properties()
2802 ret = device_property_read_u32(dev, "nuvoton,sar-hysteresis", in nau8825_read_device_properties()
2803 &nau8825->sar_hysteresis); in nau8825_read_device_properties()
2805 nau8825->sar_hysteresis = 0; in nau8825_read_device_properties()
2806 ret = device_property_read_u32(dev, "nuvoton,sar-voltage", in nau8825_read_device_properties()
2807 &nau8825->sar_voltage); in nau8825_read_device_properties()
2809 nau8825->sar_voltage = 6; in nau8825_read_device_properties()
2810 ret = device_property_read_u32(dev, "nuvoton,sar-compare-time", in nau8825_read_device_properties()
2811 &nau8825->sar_compare_time); in nau8825_read_device_properties()
2813 nau8825->sar_compare_time = 1; in nau8825_read_device_properties()
2814 ret = device_property_read_u32(dev, "nuvoton,sar-sampling-time", in nau8825_read_device_properties()
2815 &nau8825->sar_sampling_time); in nau8825_read_device_properties()
2817 nau8825->sar_sampling_time = 1; in nau8825_read_device_properties()
2818 ret = device_property_read_u32(dev, "nuvoton,short-key-debounce", in nau8825_read_device_properties()
2819 &nau8825->key_debounce); in nau8825_read_device_properties()
2821 nau8825->key_debounce = 3; in nau8825_read_device_properties()
2822 ret = device_property_read_u32(dev, "nuvoton,jack-insert-debounce", in nau8825_read_device_properties()
2823 &nau8825->jack_insert_debounce); in nau8825_read_device_properties()
2825 nau8825->jack_insert_debounce = 7; in nau8825_read_device_properties()
2826 ret = device_property_read_u32(dev, "nuvoton,jack-eject-debounce", in nau8825_read_device_properties()
2827 &nau8825->jack_eject_debounce); in nau8825_read_device_properties()
2829 nau8825->jack_eject_debounce = 0; in nau8825_read_device_properties()
2830 nau8825->xtalk_enable = device_property_read_bool(dev, in nau8825_read_device_properties()
2831 "nuvoton,crosstalk-enable"); in nau8825_read_device_properties()
2832 nau8825->adcout_ds = device_property_read_bool(dev, "nuvoton,adcout-drive-strong"); in nau8825_read_device_properties()
2833 ret = device_property_read_u32(dev, "nuvoton,adc-delay-ms", &nau8825->adc_delay); in nau8825_read_device_properties()
2835 nau8825->adc_delay = 125; in nau8825_read_device_properties()
2836 if (nau8825->adc_delay < 125 || nau8825->adc_delay > 500) in nau8825_read_device_properties()
2839 nau8825->mclk = devm_clk_get_optional(dev, "mclk"); in nau8825_read_device_properties()
2840 if (IS_ERR(nau8825->mclk)) in nau8825_read_device_properties()
2841 return PTR_ERR(nau8825->mclk); in nau8825_read_device_properties()
2842 if (!nau8825->mclk) in nau8825_read_device_properties()
2853 ret = devm_request_threaded_irq(nau8825->dev, nau8825->irq, NULL, in nau8825_setup_irq()
2858 dev_err(nau8825->dev, "Cannot request irq %d (%d)\n", in nau8825_setup_irq()
2859 nau8825->irq, ret); in nau8825_setup_irq()
2868 struct device *dev = &i2c->dev; in nau8825_i2c_probe()
2869 struct nau8825 *nau8825 = dev_get_platdata(&i2c->dev); in nau8825_i2c_probe()
2875 return -ENOMEM; in nau8825_i2c_probe()
2883 nau8825->regmap = devm_regmap_init_i2c(i2c, &nau8825_regmap_config); in nau8825_i2c_probe()
2884 if (IS_ERR(nau8825->regmap)) in nau8825_i2c_probe()
2885 return PTR_ERR(nau8825->regmap); in nau8825_i2c_probe()
2886 nau8825->dev = dev; in nau8825_i2c_probe()
2887 nau8825->irq = i2c->irq; in nau8825_i2c_probe()
2891 nau8825->xtalk_state = NAU8825_XTALK_DONE; in nau8825_i2c_probe()
2892 nau8825->xtalk_protect = false; in nau8825_i2c_probe()
2893 nau8825->xtalk_baktab_initialized = false; in nau8825_i2c_probe()
2894 sema_init(&nau8825->xtalk_sem, 1); in nau8825_i2c_probe()
2895 INIT_WORK(&nau8825->xtalk_work, nau8825_xtalk_work); in nau8825_i2c_probe()
2899 nau8825_reset_chip(nau8825->regmap); in nau8825_i2c_probe()
2900 ret = regmap_read(nau8825->regmap, NAU8825_REG_I2C_DEVICE_ID, &value); in nau8825_i2c_probe()
2906 nau8825->sw_id = value & NAU8825_SOFTWARE_ID_MASK; in nau8825_i2c_probe()
2907 switch (nau8825->sw_id) { in nau8825_i2c_probe()
2911 ret = regmap_register_patch(nau8825->regmap, nau8825_regmap_patch, in nau8825_i2c_probe()
2920 return -ENODEV; in nau8825_i2c_probe()
2925 if (i2c->irq) in nau8825_i2c_probe()
2928 return devm_snd_soc_register_component(&i2c->dev, in nau8825_i2c_probe()