Lines Matching +full:adc +full:- +full:sample +full:- +full:hold +full:- +full:time
1 // SPDX-License-Identifier: GPL-2.0-only
35 static int quirk_override = -1;
37 MODULE_PARM_DESC(quirk, "Board-specific quirk override");
43 /* the ADC threshold of headset */
46 /* the ADC threshold of headset */
211 ret = down_timeout(&nau8824->jd_sem, timeout); in nau8824_sema_acquire()
213 dev_warn(nau8824->dev, "Acquire semaphore timeout\n"); in nau8824_sema_acquire()
215 ret = down_interruptible(&nau8824->jd_sem); in nau8824_sema_acquire()
217 dev_warn(nau8824->dev, "Acquire semaphore fail\n"); in nau8824_sema_acquire()
225 up(&nau8824->jd_sem); in nau8824_sema_release()
304 "Off", "NC", "u-law", "A-law" };
359 static const DECLARE_TLV_DB_MINMAX(hp_vol_tlv, -3000, 0);
361 static const DECLARE_TLV_DB_SCALE(dmic_vol_tlv, -12800, 50, 0);
364 SOC_ENUM("ADC Companding", nau8824_companding_adc_enum),
367 SOC_ENUM("ADC Decimation Rate", nau8824_adc_decimation_enum),
402 SOC_ENUM("ADC CH0 Select", nau8824_adc_ch0_enum),
403 SOC_ENUM("ADC CH1 Select", nau8824_adc_ch1_enum),
404 SOC_ENUM("ADC CH2 Select", nau8824_adc_ch2_enum),
405 SOC_ENUM("ADC CH3 Select", nau8824_adc_ch3_enum),
407 SOC_SINGLE("ADC CH0 TX Switch", NAU8824_REG_TDM_CTRL, 0, 1, 0),
408 SOC_SINGLE("ADC CH1 TX Switch", NAU8824_REG_TDM_CTRL, 1, 1, 0),
409 SOC_SINGLE("ADC CH2 TX Switch", NAU8824_REG_TDM_CTRL, 2, 1, 0),
410 SOC_SINGLE("ADC CH3 TX Switch", NAU8824_REG_TDM_CTRL, 3, 1, 0),
431 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_output_dac_event()
437 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
441 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENABLE_LO, in nau8824_output_dac_event()
445 return -EINVAL; in nau8824_output_dac_event()
454 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_spk_event()
459 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
464 regmap_update_bits(nau8824->regmap, in nau8824_spk_event()
469 return -EINVAL; in nau8824_spk_event()
478 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in nau8824_pump_event()
485 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
490 regmap_update_bits(nau8824->regmap, in nau8824_pump_event()
495 return -EINVAL; in nau8824_pump_event()
504 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in system_clock_control()
506 struct regmap *regmap = nau8824->regmap; in system_clock_control()
512 dev_dbg(nau8824->dev, "system clock control : POWER OFF\n"); in system_clock_control()
525 clk_disable_unprepare(nau8824->mclk); in system_clock_control()
527 dev_dbg(nau8824->dev, "system clock control : POWER ON\n"); in system_clock_control()
529 ret = clk_prepare_enable(nau8824->mclk); in system_clock_control()
571 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in dmic_clock_control()
576 freq = clk_get_rate(nau8824->mclk); in dmic_clock_control()
578 freq = nau8824->fs * 256; in dmic_clock_control()
588 dev_dbg(nau8824->dev, "dmic src %d for mclk %d\n", src, freq); in dmic_clock_control()
589 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in dmic_clock_control()
690 SND_SOC_DAPM_MIXER("Left ADC", NAU8824_REG_POWER_UP_CONTROL,
693 SND_SOC_DAPM_MIXER("Right ADC", NAU8824_REG_POWER_UP_CONTROL,
769 {"Left ADC", "MIC Switch", "MIC1"},
770 {"Left ADC", "HSMIC Switch", "HSMIC1"},
771 {"Right ADC", "MIC Switch", "MIC2"},
772 {"Right ADC", "HSMIC Switch", "HSMIC2"},
774 {"ADCL", NULL, "Left ADC"},
775 {"ADCR", NULL, "Right ADC"},
827 struct snd_soc_jack *jack = nau8824->jack; in nau8824_is_jack_inserted()
830 if (nau8824->irq && jack) in nau8824_is_jack_inserted()
831 insert = jack->status & SND_JACK_HEADPHONE; in nau8824_is_jack_inserted()
840 /* Reset the intrruption status from rightmost bit if the corres- in nau8824_int_status_clear_all()
854 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_eject_jack()
855 struct regmap *regmap = nau8824->regmap; in nau8824_eject_jack()
865 * interruption, and then bypass de-bounce circuit. in nau8824_eject_jack()
879 if (dapm->bias_level < SND_SOC_BIAS_PREPARE) in nau8824_eject_jack()
887 struct snd_soc_dapm_context *dapm = nau8824->dapm; in nau8824_jdet_work()
888 struct regmap *regmap = nau8824->regmap; in nau8824_jdet_work()
899 dev_dbg(nau8824->dev, "SAR ADC data 0x%02x\n", adc_value); in nau8824_jdet_work()
910 snd_soc_jack_report(nau8824->jack, event, event_mask); in nau8824_jdet_work()
917 if (nau8824->resume_lock) { in nau8824_jdet_work()
919 nau8824->resume_lock = false; in nau8824_jdet_work()
925 struct regmap *regmap = nau8824->regmap; in nau8824_setup_auto_irq()
934 if (nau8824->dapm->bias_level < SND_SOC_BIAS_PREPARE) in nau8824_setup_auto_irq()
969 struct regmap *regmap = nau8824->regmap; in nau8824_interrupt()
973 dev_err(nau8824->dev, "failed to read irq status\n"); in nau8824_interrupt()
976 dev_dbg(nau8824->dev, "IRQ %x\n", active_irq); in nau8824_interrupt()
985 if (nau8824->resume_lock) { in nau8824_interrupt()
987 nau8824->resume_lock = false; in nau8824_interrupt()
989 cancel_work_sync(&nau8824->jdet_work); in nau8824_interrupt()
1000 dev_dbg(nau8824->dev, "button %x pressed\n", event); in nau8824_interrupt()
1016 cancel_work_sync(&nau8824->jdet_work); in nau8824_interrupt()
1017 schedule_work(&nau8824->jdet_work); in nau8824_interrupt()
1031 snd_soc_jack_report(nau8824->jack, event, event_mask); in nau8824_interrupt()
1042 regmap_read(nau8824->regmap, in nau8824_get_osr()
1049 regmap_read(nau8824->regmap, in nau8824_get_osr()
1061 struct snd_soc_component *component = dai->component; in nau8824_dai_startup()
1065 osr = nau8824_get_osr(nau8824, substream->stream); in nau8824_dai_startup()
1066 if (!osr || !osr->osr) in nau8824_dai_startup()
1067 return -EINVAL; in nau8824_dai_startup()
1069 return snd_pcm_hw_constraint_minmax(substream->runtime, in nau8824_dai_startup()
1071 0, CLK_DA_AD_MAX / osr->osr); in nau8824_dai_startup()
1077 struct snd_soc_component *component = dai->component; in nau8824_hw_params()
1081 int err = -EINVAL; in nau8824_hw_params()
1086 * DAC or ADC clock frequency is defined as Over Sampling Rate (OSR) in nau8824_hw_params()
1087 * multiplied by the audio sample rate (Fs). Note that the OSR and Fs in nau8824_hw_params()
1091 nau8824->fs = params_rate(params); in nau8824_hw_params()
1092 osr = nau8824_get_osr(nau8824, substream->stream); in nau8824_hw_params()
1093 if (!osr || !osr->osr) in nau8824_hw_params()
1095 if (nau8824->fs * osr->osr > CLK_DA_AD_MAX) in nau8824_hw_params()
1097 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in nau8824_hw_params()
1098 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_hw_params()
1100 osr->clk_src << NAU8824_CLK_DAC_SRC_SFT); in nau8824_hw_params()
1102 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_hw_params()
1104 osr->clk_src << NAU8824_CLK_ADC_SRC_SFT); in nau8824_hw_params()
1107 regmap_read(nau8824->regmap, in nau8824_hw_params()
1111 bclk_fs = snd_soc_params_to_bclk(params) / nau8824->fs; in nau8824_hw_params()
1122 regmap_update_bits(nau8824->regmap, in nau8824_hw_params()
1145 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, in nau8824_hw_params()
1157 struct snd_soc_component *component = dai->component; in nau8824_set_fmt()
1168 return -EINVAL; in nau8824_set_fmt()
1178 return -EINVAL; in nau8824_set_fmt()
1199 return -EINVAL; in nau8824_set_fmt()
1204 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1, in nau8824_set_fmt()
1207 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_2, in nau8824_set_fmt()
1216 * nau8824_set_tdm_slot - configure DAI TDM.
1234 struct snd_soc_component *component = dai->component; in nau8824_set_tdm_slot()
1242 return -EINVAL; in nau8824_set_tdm_slot()
1256 regmap_update_bits(nau8824->regmap, NAU8824_REG_TDM_CTRL, in nau8824_set_tdm_slot()
1260 regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_LEFT_TIME_SLOT, in nau8824_set_tdm_slot()
1267 * nau8824_calc_fll_param - Calculate FLL parameters.
1283 * freq_in by 1, 2, 4, or 8 using FLL pre-scalar. in nau8824_calc_fll_param()
1292 return -EINVAL; in nau8824_calc_fll_param()
1293 fll_param->clk_ref_div = fll_pre_scalar[i].val; in nau8824_calc_fll_param()
1301 return -EINVAL; in nau8824_calc_fll_param()
1302 fll_param->ratio = fll_ratio[i].val; in nau8824_calc_fll_param()
1305 * FDCO must be within the 90MHz - 124MHz or the FFL cannot be in nau8824_calc_fll_param()
1320 return -EINVAL; in nau8824_calc_fll_param()
1321 fll_param->mclk_src = mclk_src_scaling[fvco_sel].val; in nau8824_calc_fll_param()
1323 /* Calculate the FLL 10-bit integer input and the FLL 16-bit fractional in nau8824_calc_fll_param()
1326 fvco = div_u64(fvco_max << 16, fref * fll_param->ratio); in nau8824_calc_fll_param()
1327 fll_param->fll_int = (fvco >> 16) & 0x3FF; in nau8824_calc_fll_param()
1328 fll_param->fll_frac = fvco & 0xFFFF; in nau8824_calc_fll_param()
1337 NAU8824_CLK_SRC_MCLK | fll_param->mclk_src); in nau8824_fll_apply()
1339 NAU8824_FLL_RATIO_MASK, fll_param->ratio); in nau8824_fll_apply()
1340 /* FLL 16-bit fractional input */ in nau8824_fll_apply()
1341 regmap_write(regmap, NAU8824_REG_FLL2, fll_param->fll_frac); in nau8824_fll_apply()
1342 /* FLL 10-bit integer input */ in nau8824_fll_apply()
1344 NAU8824_FLL_INTEGER_MASK, fll_param->fll_int); in nau8824_fll_apply()
1345 /* FLL pre-scaler */ in nau8824_fll_apply()
1348 fll_param->clk_ref_div << NAU8824_FLL_REF_DIV_SFT); in nau8824_fll_apply()
1352 /* Disable free-running mode */ in nau8824_fll_apply()
1355 if (fll_param->fll_frac) { in nau8824_fll_apply()
1383 dev_err(nau8824->dev, "Unsupported input clock %d\n", freq_in); in nau8824_set_pll()
1386 dev_dbg(nau8824->dev, "mclk_src=%x ratio=%x fll_frac=%x fll_int=%x clk_ref_div=%x\n", in nau8824_set_pll()
1390 nau8824_fll_apply(nau8824->regmap, &fll_param); in nau8824_set_pll()
1392 regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER, in nau8824_set_pll()
1401 struct regmap *regmap = nau8824->regmap; in nau8824_config_sysclk()
1449 dev_err(nau8824->dev, "Invalid clock id (%d)\n", clk_id); in nau8824_config_sysclk()
1450 return -EINVAL; in nau8824_config_sysclk()
1453 dev_dbg(nau8824->dev, "Sysclk is %dHz and clock id is %d\n", freq, in nau8824_config_sysclk()
1470 if (nau8824->irq) { in nau8824_resume_setup()
1472 nau8824_int_status_clear_all(nau8824->regmap); in nau8824_resume_setup()
1476 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENA_CTRL, in nau8824_resume_setup()
1478 regmap_update_bits(nau8824->regmap, in nau8824_resume_setup()
1482 regmap_update_bits(nau8824->regmap, in nau8824_resume_setup()
1508 regmap_update_bits(nau8824->regmap, in nau8824_set_bias_level()
1510 regmap_update_bits(nau8824->regmap, in nau8824_set_bias_level()
1524 nau8824->dapm = dapm; in nau8824_component_probe()
1533 if (nau8824->irq) { in nau8824_suspend()
1534 disable_irq(nau8824->irq); in nau8824_suspend()
1537 regcache_cache_only(nau8824->regmap, true); in nau8824_suspend()
1538 regcache_mark_dirty(nau8824->regmap); in nau8824_suspend()
1548 regcache_cache_only(nau8824->regmap, false); in nau8824_resume()
1549 regcache_sync(nau8824->regmap); in nau8824_resume()
1550 if (nau8824->irq) { in nau8824_resume()
1551 /* Hold semaphore to postpone playback happening in nau8824_resume()
1554 nau8824->resume_lock = true; in nau8824_resume()
1557 nau8824->resume_lock = false; in nau8824_resume()
1558 enable_irq(nau8824->irq); in nau8824_resume()
1628 * nau8824_enable_jack_detect - Specify a jack for event reporting
1643 nau8824->jack = jack; in nau8824_enable_jack_detect()
1645 INIT_WORK(&nau8824->jdet_work, nau8824_jdet_work); in nau8824_enable_jack_detect()
1646 ret = devm_request_threaded_irq(nau8824->dev, nau8824->irq, NULL, in nau8824_enable_jack_detect()
1650 dev_err(nau8824->dev, "Cannot request irq %d (%d)\n", in nau8824_enable_jack_detect()
1651 nau8824->irq, ret); in nau8824_enable_jack_detect()
1666 struct regmap *regmap = nau8824->regmap; in nau8824_setup_buttons()
1670 nau8824->sar_voltage << NAU8824_SAR_TRACKING_GAIN_SFT); in nau8824_setup_buttons()
1673 nau8824->sar_compare_time << NAU8824_SAR_COMPARE_TIME_SFT); in nau8824_setup_buttons()
1676 nau8824->sar_sampling_time << NAU8824_SAR_SAMPLING_TIME_SFT); in nau8824_setup_buttons()
1680 (nau8824->sar_threshold_num - 1) << NAU8824_LEVELS_NR_SFT); in nau8824_setup_buttons()
1683 nau8824->sar_hysteresis << NAU8824_HYSTERESIS_SFT); in nau8824_setup_buttons()
1686 nau8824->key_debounce << NAU8824_SHORTKEY_DEBOUNCE_SFT); in nau8824_setup_buttons()
1689 (nau8824->sar_threshold[0] << 8) | nau8824->sar_threshold[1]); in nau8824_setup_buttons()
1691 (nau8824->sar_threshold[2] << 8) | nau8824->sar_threshold[3]); in nau8824_setup_buttons()
1693 (nau8824->sar_threshold[4] << 8) | nau8824->sar_threshold[5]); in nau8824_setup_buttons()
1695 (nau8824->sar_threshold[6] << 8) | nau8824->sar_threshold[7]); in nau8824_setup_buttons()
1700 struct regmap *regmap = nau8824->regmap; in nau8824_init_regs()
1705 (nau8824->vref_impedance << NAU8824_VMID_SEL_SFT)); in nau8824_init_regs()
1710 NAU8824_MICBIAS_VOLTAGE_MASK, nau8824->micbias_voltage); in nau8824_init_regs()
1717 /* Scaling for ADC and DAC clock */ in nau8824_init_regs()
1789 /* jkdet_polarity - 1 is for active-low */ in nau8824_init_regs()
1790 nau8824->jkdet_polarity ? 0 : NAU8824_JACK_LOGIC); in nau8824_init_regs()
1793 (nau8824->jack_eject_debounce << NAU8824_JACK_EJECT_DT_SFT)); in nau8824_init_regs()
1794 if (nau8824->sar_threshold_num) in nau8824_init_regs()
1801 regmap_update_bits(nau8824->regmap, NAU8824_REG_ENA_CTRL, in nau8824_setup_irq()
1803 regmap_update_bits(nau8824->regmap, in nau8824_setup_irq()
1805 regmap_update_bits(nau8824->regmap, NAU8824_REG_INTERRUPT_SETTING_1, in nau8824_setup_irq()
1813 struct device *dev = nau8824->dev; in nau8824_print_device_properties()
1816 dev_dbg(dev, "jkdet-polarity: %d\n", nau8824->jkdet_polarity); in nau8824_print_device_properties()
1817 dev_dbg(dev, "micbias-voltage: %d\n", nau8824->micbias_voltage); in nau8824_print_device_properties()
1818 dev_dbg(dev, "vref-impedance: %d\n", nau8824->vref_impedance); in nau8824_print_device_properties()
1820 dev_dbg(dev, "sar-threshold-num: %d\n", nau8824->sar_threshold_num); in nau8824_print_device_properties()
1821 for (i = 0; i < nau8824->sar_threshold_num; i++) in nau8824_print_device_properties()
1822 dev_dbg(dev, "sar-threshold[%d]=%x\n", i, in nau8824_print_device_properties()
1823 nau8824->sar_threshold[i]); in nau8824_print_device_properties()
1825 dev_dbg(dev, "sar-hysteresis: %d\n", nau8824->sar_hysteresis); in nau8824_print_device_properties()
1826 dev_dbg(dev, "sar-voltage: %d\n", nau8824->sar_voltage); in nau8824_print_device_properties()
1827 dev_dbg(dev, "sar-compare-time: %d\n", nau8824->sar_compare_time); in nau8824_print_device_properties()
1828 dev_dbg(dev, "sar-sampling-time: %d\n", nau8824->sar_sampling_time); in nau8824_print_device_properties()
1829 dev_dbg(dev, "short-key-debounce: %d\n", nau8824->key_debounce); in nau8824_print_device_properties()
1830 dev_dbg(dev, "jack-eject-debounce: %d\n", in nau8824_print_device_properties()
1831 nau8824->jack_eject_debounce); in nau8824_print_device_properties()
1838 ret = device_property_read_u32(dev, "nuvoton,jkdet-polarity", in nau8824_read_device_properties()
1839 &nau8824->jkdet_polarity); in nau8824_read_device_properties()
1841 nau8824->jkdet_polarity = 1; in nau8824_read_device_properties()
1842 ret = device_property_read_u32(dev, "nuvoton,micbias-voltage", in nau8824_read_device_properties()
1843 &nau8824->micbias_voltage); in nau8824_read_device_properties()
1845 nau8824->micbias_voltage = 6; in nau8824_read_device_properties()
1846 ret = device_property_read_u32(dev, "nuvoton,vref-impedance", in nau8824_read_device_properties()
1847 &nau8824->vref_impedance); in nau8824_read_device_properties()
1849 nau8824->vref_impedance = 2; in nau8824_read_device_properties()
1850 ret = device_property_read_u32(dev, "nuvoton,sar-threshold-num", in nau8824_read_device_properties()
1851 &nau8824->sar_threshold_num); in nau8824_read_device_properties()
1853 nau8824->sar_threshold_num = 4; in nau8824_read_device_properties()
1854 ret = device_property_read_u32_array(dev, "nuvoton,sar-threshold", in nau8824_read_device_properties()
1855 nau8824->sar_threshold, nau8824->sar_threshold_num); in nau8824_read_device_properties()
1857 nau8824->sar_threshold[0] = 0x0a; in nau8824_read_device_properties()
1858 nau8824->sar_threshold[1] = 0x14; in nau8824_read_device_properties()
1859 nau8824->sar_threshold[2] = 0x26; in nau8824_read_device_properties()
1860 nau8824->sar_threshold[3] = 0x73; in nau8824_read_device_properties()
1862 ret = device_property_read_u32(dev, "nuvoton,sar-hysteresis", in nau8824_read_device_properties()
1863 &nau8824->sar_hysteresis); in nau8824_read_device_properties()
1865 nau8824->sar_hysteresis = 0; in nau8824_read_device_properties()
1866 ret = device_property_read_u32(dev, "nuvoton,sar-voltage", in nau8824_read_device_properties()
1867 &nau8824->sar_voltage); in nau8824_read_device_properties()
1869 nau8824->sar_voltage = 6; in nau8824_read_device_properties()
1870 ret = device_property_read_u32(dev, "nuvoton,sar-compare-time", in nau8824_read_device_properties()
1871 &nau8824->sar_compare_time); in nau8824_read_device_properties()
1873 nau8824->sar_compare_time = 1; in nau8824_read_device_properties()
1874 ret = device_property_read_u32(dev, "nuvoton,sar-sampling-time", in nau8824_read_device_properties()
1875 &nau8824->sar_sampling_time); in nau8824_read_device_properties()
1877 nau8824->sar_sampling_time = 1; in nau8824_read_device_properties()
1878 ret = device_property_read_u32(dev, "nuvoton,short-key-debounce", in nau8824_read_device_properties()
1879 &nau8824->key_debounce); in nau8824_read_device_properties()
1881 nau8824->key_debounce = 0; in nau8824_read_device_properties()
1882 ret = device_property_read_u32(dev, "nuvoton,jack-eject-debounce", in nau8824_read_device_properties()
1883 &nau8824->jack_eject_debounce); in nau8824_read_device_properties()
1885 nau8824->jack_eject_debounce = 1; in nau8824_read_device_properties()
1887 nau8824->mclk = devm_clk_get_optional(dev, "mclk"); in nau8824_read_device_properties()
1888 if (IS_ERR(nau8824->mclk)) in nau8824_read_device_properties()
1889 return PTR_ERR(nau8824->mclk); in nau8824_read_device_properties()
1910 DMI_MATCH(DMI_PRODUCT_NAME, "i1-TF"),
1954 if (quirk_override != -1) { in nau8824_check_quirks()
1961 nau8824_quirk = (unsigned long)dmi_id->driver_data; in nau8824_check_quirks()
1969 return "cfg-spk:1"; in nau8824_components()
1971 return "cfg-spk:2"; in nau8824_components()
1977 struct device *dev = &i2c->dev; in nau8824_i2c_probe()
1984 return -ENOMEM; in nau8824_i2c_probe()
1991 nau8824->regmap = devm_regmap_init_i2c(i2c, &nau8824_regmap_config); in nau8824_i2c_probe()
1992 if (IS_ERR(nau8824->regmap)) in nau8824_i2c_probe()
1993 return PTR_ERR(nau8824->regmap); in nau8824_i2c_probe()
1994 nau8824->resume_lock = false; in nau8824_i2c_probe()
1995 nau8824->dev = dev; in nau8824_i2c_probe()
1996 nau8824->irq = i2c->irq; in nau8824_i2c_probe()
1997 sema_init(&nau8824->jd_sem, 1); in nau8824_i2c_probe()
2002 nau8824->jkdet_polarity = 0; in nau8824_i2c_probe()
2006 ret = regmap_read(nau8824->regmap, NAU8824_REG_I2C_DEVICE_ID, &value); in nau8824_i2c_probe()
2012 nau8824_reset_chip(nau8824->regmap); in nau8824_i2c_probe()
2015 if (i2c->irq) in nau8824_i2c_probe()