Lines Matching +full:8 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0 */
3 * mt6357.h -- mt6357 ALSA SoC audio codec driver
14 /* Reg bit defines */
16 #define MT6357_GPIO8_DIR_MASK BIT(8)
18 #define MT6357_GPIO8_DIR_OUTPUT BIT(8)
19 #define MT6357_GPIO9_DIR_MASK BIT(9)
21 #define MT6357_GPIO9_DIR_OUTPUT BIT(9)
22 #define MT6357_GPIO10_DIR_MASK BIT(10)
24 #define MT6357_GPIO10_DIR_OUTPUT BIT(10)
25 #define MT6357_GPIO11_DIR_MASK BIT(11)
27 #define MT6357_GPIO11_DIR_OUTPUT BIT(11)
28 #define MT6357_GPIO12_DIR_MASK BIT(12)
30 #define MT6357_GPIO12_DIR_OUTPUT BIT(12)
31 #define MT6357_GPIO13_DIR_MASK BIT(13)
33 #define MT6357_GPIO13_DIR_OUTPUT BIT(13)
34 #define MT6357_GPIO14_DIR_MASK BIT(14)
36 #define MT6357_GPIO14_DIR_OUTPUT BIT(14)
37 #define MT6357_GPIO15_DIR_MASK BIT(15)
39 #define MT6357_GPIO15_DIR_OUTPUT BIT(15)
43 #define MT6357_GPIO8_MODE_AUD_CLK_MOSI BIT(0)
46 #define MT6357_GPIO9_MODE_AUD_DAT_MOSI0 BIT(3)
48 #define MT6357_GPIO10_MODE_MASK GENMASK(8, 6)
49 #define MT6357_GPIO10_MODE_AUD_DAT_MOSI1 BIT(6)
52 #define MT6357_GPIO11_MODE_AUD_SYNC_MOSI BIT(9)
57 #define MT6357_GPIO8_MODE_SET_AUD_CLK_MOSI BIT(0)
59 #define MT6357_GPIO9_MODE_SET_AUD_DAT_MOSI0 BIT(3)
60 #define MT6357_GPIO10_MODE_SET_MASK GENMASK(8, 6)
61 #define MT6357_GPIO10_MODE_SET_AUD_DAT_MOSI1 BIT(6)
63 #define MT6357_GPIO11_MODE_SET_AUD_SYNC_MOSI BIT(9)
70 #define MT6357_GPIO12_MODE_AUD_CLK_MISO BIT(0)
73 #define MT6357_GPIO13_MODE_AUD_DAT_MISO0 BIT(3)
75 #define MT6357_GPIO14_MODE_MASK GENMASK(8, 6)
76 #define MT6357_GPIO14_MODE_AUD_DAT_MISO1 BIT(6)
79 #define MT6357_GPIO15_MODE_AUD_SYNC_MISO BIT(9)
84 #define MT6357_GPIO12_MODE_SET_AUD_CLK_MISO BIT(0)
86 #define MT6357_GPIO13_MODE_SET_AUD_DAT_MISO0 BIT(3)
87 #define MT6357_GPIO14_MODE_SET_MASK GENMASK(8, 6)
88 #define MT6357_GPIO14_MODE_SET_AUD_DAT_MISO1 BIT(6)
90 #define MT6357_GPIO15_MODE_SET_AUD_SYNC_MISO BIT(9)
97 #define MT6357_XO_AUDIO_EN_M_MASK BIT(13)
98 #define MT6357_XO_AUDIO_EN_M_ENABLE BIT(13)
108 #define MT6357_DIVCKS_CHG BIT(0)
111 #define MT6357_DIVCKS_ON BIT(0)
114 #define MT6357_DIVCKS_PWD_NCP_MASK BIT(0)
115 #define MT6357_DIVCKS_PWD_NCP_DISABLE BIT(0)
133 #define MT6357_C_TWO_DIGITAL_MIC_CTL_MASK BIT(7)
134 #define MT6357_C_TWO_DIGITAL_MIC_ENABLE BIT(7)
138 #define MT6357_UL_SDM_3_LEVEL_CTL_MASK BIT(1)
139 #define MT6357_UL_SDM_3_LEVEL_SELECT BIT(1)
141 #define MT6357_UL_SRC_ON_TMP_CTL_MASK BIT(0)
142 #define MT6357_UL_SRC_ENABLE BIT(0)
147 #define MT6357_UL_SINE_ON_MASK BIT(1)
149 #define MT6357_DL_SINE_ON_MASK BIT(0)
162 #define MT6357_CCI_AUD_ANACK_INVERT BIT(15)
165 #define MT6357_CCI_SCRAMBLER_CG_ENABLE BIT(11)
167 #define MT6357_CCI_LCK_INV_OUT_OF_PHASE BIT(10)
169 #define MT6357_CCI_RAND_ENABLE BIT(9)
171 #define MT6357_CCI_SPLT_SCRMB_CLK_ON BIT(8)
173 #define MT6357_CCI_SPLT_SCRMB_ON BIT(7)
175 #define MT6357_CCI_AUD_IDAC_TEST_EN_FROM_TEST_IN BIT(6)
177 #define MT6357_CCI_ZERO_PADDING_DISABLE BIT(5)
179 #define MT6357_CCI_AUD_SPLIT_TEST_EN_FROM_TEST_IN BIT(4)
181 #define MT6357_CCI_AUD_SDM_MUTE_L_REG_CTL BIT(3)
183 #define MT6357_CCI_AUD_SDM_MUTE_R_REG_CTL BIT(2)
185 #define MT6357_CCI_AUD_SDM_7BIT_FROM_SPLITTER3 BIT(1)
187 #define MT6357_CCI_SCRAMBLER_ENABLE BIT(0)
191 #define MT6357_CCI_AUDIO_FIFO_ENABLE BIT(3)
193 #define MT6357_CCI_ACD_MODE_NORMAL_PATH BIT(2)
195 #define MT6357_CCI_AFIFO_CLK_PWDB_ON BIT(1)
197 #define MT6357_CCI_ACD_FUNC_RSTB_RELEASE BIT(0)
201 #define MT6357_ADDA_MTKAIF_LPBK_CTL_MASK BIT(1)
202 #define MT6357_ADDA_MTKAIF_LPBK_ENABLE BIT(1)
207 #define MT6357_SGEN_DAC_ENABLE BIT(7)
216 #define MT6357_DCCLK_PDN_MASK BIT(1)
217 #define MT6357_DCCLK_PDN BIT(1)
219 #define MT6357_DCCLK_GEN_ON_MASK BIT(0)
220 #define MT6357_DCCLK_GEN_ON BIT(0)
224 #define MT6357_DCCLK_RESYNC_BYPASS_MASK BIT(8)
225 #define MT6357_DCCLK_RESYNC_BYPASS BIT(8)
228 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_MASK GENMASK(15, 8)
229 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_ENABLE (BIT(13) | BIT(12) | BIT(8))
230 #define MT6357_AUD_PAD_TX_FIFO_NORMAL_PATH_DISABLE (BIT(13) | BIT(12))
232 #define MT6357_AUD_PAD_TX_FIFO_LPBK_ENABLE (BIT(5) | BIT(4) | BIT(0))
237 #define MT6357_AUDADCLINPUTSEL_PREAMPLIFIER BIT(14)
240 #define MT6357_AUDADCLPWRUP_MASK BIT(12)
241 #define MT6357_AUDADCLPWRUP BIT(12)
243 #define MT6357_AUDPREAMPLGAIN_SFT 8
244 #define MT6357_AUDPREAMPLGAIN_MASK GENMASK(10, 8)
248 #define MT6357_AUDPREAMPLDCPRECHARGE_MASK BIT(2)
249 #define MT6357_AUDPREAMPLDCPRECHARGE_ENABLE BIT(2)
251 #define MT6357_AUDPREAMPLDCCEN_MASK BIT(1)
252 #define MT6357_AUDPREAMPLDCCEN_DC BIT(1)
254 #define MT6357_AUDPREAMPLON_MASK BIT(0)
255 #define MT6357_AUDPREAMPLON_ENABLE BIT(0)
260 #define MT6357_AUDADCRINPUTSEL_PREAMPLIFIER BIT(14)
263 #define MT6357_AUDADCRPWRUP_MASK BIT(12)
264 #define MT6357_AUDADCRPWRUP BIT(12)
266 #define MT6357_AUDPREAMPRGAIN_SFT 8
267 #define MT6357_AUDPREAMPRGAIN_MASK GENMASK(10, 8)
271 #define MT6357_AUDPREAMPRDCPRECHARGE_MASK BIT(2)
272 #define MT6357_AUDPREAMPRDCPRECHARGE_ENABLE BIT(2)
274 #define MT6357_AUDPREAMPRDCCEN_MASK BIT(1)
275 #define MT6357_AUDPREAMPRDCCEN_DC BIT(1)
277 #define MT6357_AUDPREAMPRON_MASK BIT(0)
278 #define MT6357_AUDPREAMPRON_ENABLE BIT(0)
286 #define MT6357_AUDDIGMICBIAS_DEFAULT_VALUE BIT(2)
288 #define MT6357_AUDDIGMICEN_MASK BIT(0)
289 #define MT6357_AUDDIGMICEN_ENABLE BIT(0)
293 #define MT6357_AUD_MICBIAS0_DCSW2N_EN_MASK BIT(14)
294 #define MT6357_AUD_MICBIAS0_DCSW2N_ENABLE BIT(14)
296 #define MT6357_AUD_MICBIAS0_DCSW2P2_EN_MASK BIT(13)
297 #define MT6357_AUD_MICBIAS0_DCSW2P2_ENABLE BIT(13)
299 #define MT6357_AUD_MICBIAS0_DCSW2P1_EN_MASK BIT(12)
300 #define MT6357_AUD_MICBIAS0_DCSW2P1_ENABLE BIT(12)
302 #define MT6357_AUD_MICBIAS0_DCSW0N_EN_MASK BIT(10)
303 #define MT6357_AUD_MICBIAS0_DCSW0N_ENABLE BIT(10)
305 #define MT6357_AUD_MICBIAS0_DCSW0P2_EN_MASK BIT(9)
306 #define MT6357_AUD_MICBIAS0_DCSW0P2_ENABLE BIT(9)
308 #define MT6357_AUD_MICBIAS0_DCSW0P1_EN_MASK BIT(8)
309 #define MT6357_AUD_MICBIAS0_DCSW0P1_ENABLE BIT(8)
335 #define MT6357_AUD_MICBIAS1_DCSW1P_EN_MASK BIT(8)
336 #define MT6357_AUD_MICBIAS1_DCSW1P_ENABLE BIT(8)
343 #define MT6357_AUD_HPR_SC_VAUDP15_MASK BIT(13)
344 #define MT6357_AUD_HPR_SC_VAUDP15_DISABLE BIT(13)
346 #define MT6357_AUD_HPL_SC_VAUDP15_MASK BIT(12)
347 #define MT6357_AUD_HPL_SC_VAUDP15_DISABLE BIT(12)
352 #define MT6357_AUD_HPL_MUX_INPUT_VAUDP15_SFT 8
353 #define MT6357_AUD_HPR_BIAS_VAUDP15_MASK BIT(7)
354 #define MT6357_AUD_HPR_BIAS_VAUDP15_ENABLE BIT(7)
356 #define MT6357_AUD_HPL_BIAS_VAUDP15_MASK BIT(6)
357 #define MT6357_AUD_HPL_BIAS_VAUDP15_ENABLE BIT(6)
359 #define MT6357_AUD_HPR_PWRUP_VAUDP15_MASK BIT(5)
360 #define MT6357_AUD_HPR_PWRUP_VAUDP15_ENABLE BIT(5)
362 #define MT6357_AUD_HPL_PWRUP_VAUDP15_MASK BIT(4)
363 #define MT6357_AUD_HPL_PWRUP_VAUDP15_ENABLE BIT(4)
365 #define MT6357_AUD_DACL_PWRUP_VA28_MASK BIT(3)
366 #define MT6357_AUD_DACL_PWRUP_VA28_ENABLE BIT(3)
368 #define MT6357_AUD_DACR_PWRUP_VA28_MASK BIT(2)
369 #define MT6357_AUD_DACR_PWRUP_VA28_ENABLE BIT(2)
371 #define MT6357_AUD_DACR_PWRUP_VAUDP15_MASK BIT(1)
372 #define MT6357_AUD_DACR_PWRUP_VAUDP15_ENABLE BIT(1)
374 #define MT6357_AUD_DACL_PWRUP_VAUDP15_MASK BIT(0)
375 #define MT6357_AUD_DACL_PWRUP_VAUDP15_ENABLE BIT(0)
381 #define MT6357_HPLOUT_STG_CTRL_VAUDP15_MASK GENMASK(10, 8)
382 #define MT6357_HPLOUT_STG_CTRL_VAUDP15_SFT 8
384 #define MT6357_HPR_SHORT2HPR_AUX_VAUDP15_MASK BIT(7)
385 #define MT6357_HPR_SHORT2HPR_AUX_VAUDP15_ENABLE BIT(7)
387 #define MT6357_HPL_SHORT2HPR_AUX_VAUDP15_MASK BIT(6)
388 #define MT6357_HPL_SHORT2HPR_AUX_VAUDP15_ENABLE BIT(6)
390 #define MT6357_HPR_AUX_FBRSW_VAUDP15_MASK BIT(5)
391 #define MT6357_HPR_AUX_FBRSW_VAUDP15_ENABLE BIT(5)
393 #define MT6357_HPL_AUX_FBRSW_VAUDP15_MASK BIT(4)
394 #define MT6357_HPL_AUX_FBRSW_VAUDP15_ENABLE BIT(4)
396 #define MT6357_HPROUT_AUX_PWRUP_VAUDP15_MASK BIT(3)
397 #define MT6357_HPROUT_AUX_PWRUP_VAUDP15_ENABLE BIT(3)
399 #define MT6357_HPLOUT_AUX_PWRUP_VAUDP15_MASK BIT(2)
400 #define MT6357_HPLOUT_AUX_PWRUP_VAUDP15_ENABLE BIT(2)
402 #define MT6357_HPROUT_PWRUP_VAUDP15_MASK BIT(1)
403 #define MT6357_HPROUT_PWRUP_VAUDP15_ENABLE BIT(1)
405 #define MT6357_HPLOUT_PWRUP_VAUDP15_MASK BIT(0)
406 #define MT6357_HPLOUT_PWRUP_VAUDP15_ENABLE BIT(0)
410 #define MT6357_HPP_SHORT_2VCM_VAUDP15_MASK BIT(10)
411 #define MT6357_HPP_SHORT_2VCM_VAUDP15_ENABLE BIT(10)
413 #define MT6357_AUD_REFN_DERES_VAUDP15_MASK BIT(9)
414 #define MT6357_AUD_REFN_DERES_VAUDP15_ENABLE BIT(9)
418 #define MT6357_HPROUT_STB_ENH_VAUDP15_NOPEN_P250 BIT(4)
419 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_POPEN BIT(5)
420 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_P250 (BIT(4) | BIT(5))
421 #define MT6357_HPROUT_STB_ENH_VAUDP15_NOPEN_P470 (BIT(4) | BIT(6))
422 #define MT6357_HPROUT_STB_ENH_VAUDP15_N470_P470 (BIT(4) | BIT(5) | BIT(6))
425 #define MT6357_HPLOUT_STB_ENH_VAUDP15_NOPEN_P250 BIT(0)
426 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_POPEN BIT(1)
427 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_P250 (BIT(0) | BIT(1))
428 #define MT6357_HPLOUT_STB_ENH_VAUDP15_NOPEN_P470 (BIT(0) | BIT(2))
429 #define MT6357_HPLOUT_STB_ENH_VAUDP15_N470_P470 (BIT(0) | BIT(1) | BIT(2))
432 #define MT6357_AUD_HSOUT_STB_ENH_VAUDP15_MASK BIT(7)
433 #define MT6357_AUD_HSOUT_STB_ENH_VAUDP15_ENABLE BIT(7)
435 #define MT6357_AUD_HS_SC_VAUDP15_MASK BIT(4)
436 #define MT6357_AUD_HS_SC_VAUDP15_DISABLE BIT(4)
440 #define MT6357_AUD_HS_PWRUP_BIAS_VAUDP15_MASK BIT(1)
441 #define MT6357_AUD_HS_PWRUP_BIAS_VAUDP15_ENABLE BIT(1)
443 #define MT6357_AUD_HS_PWRUP_VAUDP15_MASK BIT(0)
444 #define MT6357_AUD_HS_PWRUP_VAUDP15_ENABLE BIT(0)
448 #define MT6357_AUD_LOLOUT_STB_ENH_VAUDP15_MASK BIT(8)
449 #define MT6357_AUD_LOLOUT_STB_ENH_VAUDP15_ENABLE BIT(8)
451 #define MT6357_AUD_LOL_SC_VAUDP15_MASK BIT(4)
452 #define MT6357_AUD_LOL_SC_VAUDP15_DISABLE BIT(4)
456 #define MT6357_AUD_LOL_PWRUP_BIAS_VAUDP15_MASK BIT(1)
457 #define MT6357_AUD_LOL_PWRUP_BIAS_VAUDP15_ENABLE BIT(1)
459 #define MT6357_AUD_LOL_PWRUP_VAUDP15_MASK BIT(0)
460 #define MT6357_AUD_LOL_PWRUP_VAUDP15_ENABLE BIT(0)
467 #define MT6357_HPR_AUX_CMFB_LOOP_MASK BIT(11)
468 #define MT6357_HPR_AUX_CMFB_LOOP_ENABLE BIT(11)
470 #define MT6357_HPL_AUX_CMFB_LOOP_MASK BIT(10)
471 #define MT6357_HPL_AUX_CMFB_LOOP_ENABLE BIT(10)
473 #define MT6357_HPRL_MAIN_CMFB_LOOP_MASK BIT(9)
474 #define MT6357_HPRL_MAIN_CMFB_LOOP_ENABLE BIT(9)
476 #define MT6357_HP_CMFB_RST_MASK BIT(7)
477 #define MT6357_HP_CMFB_RST_NORMAL BIT(7)
479 #define MT6357_DAC_LOW_NOISE_MODE_MASK BIT(0)
480 #define MT6357_DAC_LOW_NOISE_MODE_ENABLE BIT(0)
488 #define MT6357_AUD_IBIAS_PWRDN_VAUDP15_MASK BIT(8)
489 #define MT6357_AUD_IBIAS_PWRDN_VAUDP15_DISABLE BIT(8)
493 #define MT6357_RSTB_ENCODER_VA28_MASK BIT(5)
494 #define MT6357_RSTB_ENCODER_VA28_ENABLE BIT(5)
497 #define MT6357_RSTB_DECODER_VA28_MASK BIT(0)
498 #define MT6357_RSTB_DECODER_VA28_ENABLE BIT(0)
502 #define MT6357_VA28REFGEN_EN_VA28_MASK BIT(13)
503 #define MT6357_VA28REFGEN_EN_VA28_ENABLE BIT(13)
505 #define MT6357_VA33REFGEN_EN_VA18_MASK BIT(12)
506 #define MT6357_VA33REFGEN_EN_VA18_ENABLE BIT(12)
508 #define MT6357_LCLDO_ENC_REMOTE_SENSE_VA28_MASK BIT(10)
509 #define MT6357_LCLDO_ENC_REMOTE_SENSE_VA28_ENABLE BIT(10)
511 #define MT6357_LCLDO_ENC_EN_VA28_MASK BIT(8)
512 #define MT6357_LCLDO_ENC_EN_VA28_ENABLE BIT(8)
514 #define MT6357_LCLDO_REMOTE_SENSE_VA18_MASK BIT(6)
515 #define MT6357_LCLDO_REMOTE_SENSE_VA18_ENABLE BIT(6)
517 #define MT6357_LCLDO_EN_VA18_MASK BIT(4)
518 #define MT6357_LCLDO_EN_VA18_ENABLE BIT(4)
520 #define MT6357_HCLDO_REMOTE_SENSE_VA18_MASK BIT(2)
521 #define MT6357_HCLDO_REMOTE_SENSE_VA18_ENABLE BIT(2)
523 #define MT6357_HCLDO_EN_VA18_MASK BIT(0)
524 #define MT6357_HCLDO_EN_VA18_ENABLE BIT(0)
528 #define MT6357_NVREG_EN_VAUDP15_MASK BIT(0)
529 #define MT6357_NVREG_EN_VAUDP15_ENABLE BIT(0)
533 #define MT6357_AUD_HP_TRIM_EN_VAUDP15_MASK BIT(12)
534 #define MT6357_AUD_HP_TRIM_EN_VAUDP15_ENABLE BIT(12)
613 DL_GAIN_0DB = 8,