Lines Matching +full:codec +full:- +full:analog +full:- +full:controls
1 // SPDX-License-Identifier: GPL-2.0
3 * MT6357 ALSA SoC audio codec driver
9 #include <linux/dma-mapping.h>
19 regmap_write(priv->regmap, MT6357_GPIO_MODE2_CLR, MT6357_GPIO_MODE2_CLEAR_ALL);
22 regmap_write(priv->regmap, MT6357_GPIO_MODE2_SET,
32 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0,
46 regmap_write(priv->regmap, MT6357_GPIO_MODE3_CLR, MT6357_GPIO_MODE3_CLEAR_ALL);
49 regmap_write(priv->regmap, MT6357_GPIO_MODE3_SET,
61 regmap_update_bits(priv->regmap, MT6357_GPIO_DIR0,
79 stage = up ? i : MT6357_HPLOUT_STG_CTRL_VAUDP15_MAX - i;
80 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
83 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
96 stage = up ? i : MT6357_HP_AUX_LOOP_GAIN_MAX - i;
97 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
107 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON2,
111 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON2,
137 lcount = -1;
142 rcount = -1;
148 regmap_update_bits(priv->regmap, reg_addr,
157 regmap_update_bits(priv->regmap, reg_addr,
183 /* Volume and channel swap controls */
184 static const DECLARE_TLV_DB_SCALE(playback_tlv, -1000, 100, 0);
186 static const DECLARE_TLV_DB_SCALE(hp_degain_tlv, -1200, 1200, 0);
211 /* Uplink controls */
265 /* Downlink controls */
322 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON7,
326 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
330 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_H,
334 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
338 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
345 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
349 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
353 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
357 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_H,
361 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON7,
372 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
374 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
376 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
378 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG1,
385 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON8,
390 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON8,
395 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON8,
403 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON9,
408 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
411 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
415 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
419 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
424 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
428 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
432 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
436 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
442 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON8,
446 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON9,
450 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
452 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
454 regmap_update_bits(priv->regmap, MT6357_AFE_DCCLK_CFG0,
466 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
470 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
474 regmap_update_bits(priv->regmap, MT6357_AFE_ADDA_MTKAIF_CFG0,
478 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
483 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
487 regmap_update_bits(priv->regmap, MT6357_AFE_ADDA_MTKAIF_CFG0,
491 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
495 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
507 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
511 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
516 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
520 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
532 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
553 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
559 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON11,
562 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
565 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
573 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
579 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
583 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON11,
598 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
600 unsigned int mic_type = snd_soc_dapm_kcontrol_get_value(w->kcontrols[0]);
646 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
652 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
656 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
659 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
663 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
669 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
672 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
676 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
680 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
684 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
699 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
705 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
708 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
711 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
714 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
720 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
722 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
725 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
728 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
731 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
746 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
752 regmap_read(priv->regmap, MT6357_AUDENC_ANA_CON0, &lgain);
753 regmap_read(priv->regmap, MT6357_AUDENC_ANA_CON1, &rgain);
755 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
759 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
763 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
767 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
772 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON0,
774 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON1,
779 regmap_update_bits(priv->regmap, MT6357_AFE_UL_SRC_CON0_L,
782 regmap_update_bits(priv->regmap, MT6357_AFE_AUD_PAD_TOP,
796 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ELR_0,
799 /* Disable headphone short-circuit protection */
800 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
804 /* Disable handset short-circuit protection */
805 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
808 /* Disable lineout short-circuit protection */
809 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
813 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON2,
817 regmap_write(priv->regmap, MT6357_AUDNCP_CLKDIV_CON1, MT6357_DIVCKS_ON);
819 regmap_write(priv->regmap, MT6357_AUDNCP_CLKDIV_CON2, 0x002c);
821 regmap_write(priv->regmap, MT6357_AUDNCP_CLKDIV_CON0, MT6357_DIVCKS_CHG);
823 regmap_write(priv->regmap, MT6357_AUDNCP_CLKDIV_CON4,
826 regmap_write(priv->regmap, MT6357_AUDNCP_CLKDIV_CON3,
829 /* Enable cap-less LDOs (1.5V) */
830 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
841 /* Enable NV regulator (-1.2V) */
842 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON13,
846 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON10,
850 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON11,
853 /* Enable low-noise mode of DAC */
854 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
859 /* Disable low-noise mode of DAC */
860 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
864 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON11,
867 /* Enable linout short-circuit protection */
868 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
871 /* Enable handset short-circuit protection */
872 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
875 /* Enable headphone short-circuit protection */
876 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
882 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON10,
885 /* Disable NV regulator (-1.2V) */
886 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON13,
889 /* Disable cap-less LDOs (1.5V) */
890 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON12,
902 regmap_update_bits(priv->regmap, MT6357_AUDNCP_CLKDIV_CON3,
911 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
918 /* Pull-down HPL/R to AVSS28_AUD */
919 if (priv->pull_down_needed)
923 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
927 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON2,
933 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON0,
943 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON2,
949 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON2,
960 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON2,
965 regmap_write(priv->regmap, MT6357_AFUNC_AUD_CON0,
977 /* disable Pull-down HPL/R to AVSS28_AUD */
978 if (priv->pull_down_needed)
1010 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1015 regmap_read(priv->regmap, MT6357_ZCD_CON1, &lgain);
1020 /* Set -40dB before enable HS to avoid POP noise */
1021 regmap_update_bits(priv->regmap, MT6357_ZCD_CON1,
1026 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1030 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1034 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1047 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1051 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1055 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1059 regmap_update_bits(priv->regmap, MT6357_ZCD_CON1,
1077 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1082 regmap_read(priv->regmap, MT6357_ZCD_CON3, &gain);
1085 /* Set -40dB before enable HS to avoid POP noise */
1086 regmap_update_bits(priv->regmap, MT6357_ZCD_CON3,
1091 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1095 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1099 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1109 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1113 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1117 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1121 regmap_update_bits(priv->regmap, MT6357_ZCD_CON3,
1135 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1140 regmap_read(priv->regmap, MT6357_ZCD_CON2, &lgain);
1145 priv->hp_channel_number++;
1146 if (priv->hp_channel_number > 1)
1148 /* Set -40dB before enable HS to avoid POP noise */
1149 regmap_update_bits(priv->regmap, MT6357_ZCD_CON2,
1154 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON2,
1160 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1166 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1172 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1180 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1186 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1192 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1198 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1202 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1208 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1219 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1228 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1234 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1242 priv->hp_channel_number--;
1243 if (priv->hp_channel_number > 0)
1246 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1252 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1261 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1271 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1277 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1285 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1289 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1295 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1301 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1309 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON6,
1317 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1323 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON1,
1329 regmap_update_bits(priv->regmap, MT6357_ZCD_CON2,
1346 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1352 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1359 /* disable Pull-down HPL/R to AVSS28_AUD */
1360 if (priv->pull_down_needed)
1364 /* Pull-down HPL/R to AVSS28_AUD */
1365 if (priv->pull_down_needed)
1368 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1385 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
1391 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1398 /* disable Pull-down HPL/R to AVSS28_AUD */
1399 if (priv->pull_down_needed)
1403 /* Pull-down HPL/R to AVSS28_AUD */
1404 if (priv->pull_down_needed)
1407 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1441 /* Analog Clocks */
1550 SND_SOC_DAPM_SUPPLY("DL Analog Supply", SND_SOC_NOPM, 0, 0, NULL, 0),
1648 {"DL Analog Supply", NULL, "CLK_BUF"},
1649 {"DL Analog Supply", NULL, "AUDGLB"},
1650 {"DL Analog Supply", NULL, "CLKSQ Audio"},
1651 {"DL Analog Supply", NULL, "AUDNCP_CK"},
1652 {"DL Analog Supply", NULL, "ZCD13M_CK"},
1653 {"DL Analog Supply", NULL, "AUD_CK"},
1654 {"DL Analog Supply", NULL, "AUDIF_CK"},
1662 {"DACR", NULL, "DL Analog Supply"},
1664 {"DACL", NULL, "DL Analog Supply"},
1691 .name = "mt6357-snd-codec-aif1",
1709 static int mt6357_codec_probe(struct snd_soc_component *codec)
1711 struct mt6357_priv *priv = snd_soc_component_get_drvdata(codec);
1713 snd_soc_component_init_regmap(codec, priv->regmap);
1716 regmap_update_bits(priv->regmap, MT6357_DCXO_CW14,
1719 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON0,
1725 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON3,
1729 regmap_update_bits(priv->regmap, MT6357_AUDDEC_ANA_CON4,
1736 regmap_update_bits(priv->regmap, MT6357_DCXO_CW14,
1747 .controls = mt6357_controls,
1779 struct device_node *np = priv->dev->parent->of_node;
1782 return -EINVAL;
1784 priv->pull_down_needed = false;
1785 if (of_property_read_bool(np, "mediatek,hp-pull-down"))
1786 priv->pull_down_needed = true;
1788 micbias_voltage_index = mt6357_get_micbias_idx(np, "mediatek,micbias0-microvolt");
1789 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON8,
1793 micbias_voltage_index = mt6357_get_micbias_idx(np, "mediatek,micbias1-microvolt");
1794 regmap_update_bits(priv->regmap, MT6357_AUDENC_ANA_CON9,
1803 struct mt6397_chip *mt6397 = dev_get_drvdata(pdev->dev.parent);
1807 ret = devm_regulator_get_enable(&pdev->dev, "vaud28");
1809 return dev_err_probe(&pdev->dev, ret, "Failed to enable vaud28 regulator\n");
1811 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
1813 return -ENOMEM;
1815 dev_set_drvdata(&pdev->dev, priv);
1816 priv->dev = &pdev->dev;
1818 priv->regmap = mt6397->regmap;
1819 if (IS_ERR(priv->regmap))
1820 return PTR_ERR(priv->regmap);
1824 return dev_err_probe(&pdev->dev, ret, "Failed to parse dts\n");
1826 pdev->dev.coherent_dma_mask = DMA_BIT_MASK(64);
1827 if (!pdev->dev.dma_mask)
1828 pdev->dev.dma_mask = &pdev->dev.coherent_dma_mask;
1830 return devm_snd_soc_register_component(&pdev->dev,
1837 {"mt6357-sound", 0},
1844 .name = "mt6357-sound",
1853 MODULE_DESCRIPTION("MT6357 ALSA SoC codec driver");