Lines Matching +full:headset +full:- +full:mic +full:- +full:bias +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0
3 // mt6351.c -- mt6351 ALSA SoC audio codec driver
8 #include <linux/dma-mapping.h>
179 /* Supply subseq */
202 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
204 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON2, in set_hp_gain_zero()
225 dev_warn(cmpnt->dev, "%s(), error rate %d, return 3", in get_cap_reg_val()
256 dev_warn(cmpnt->dev, "%s(), error rate %d, return 8", in get_play_reg_val()
266 struct snd_soc_component *cmpnt = dai->component; in mt6351_codec_dai_hw_params()
270 dev_dbg(priv->dev, "%s(), substream->stream %d, rate %d\n", in mt6351_codec_dai_hw_params()
271 __func__, substream->stream, rate); in mt6351_codec_dai_hw_params()
273 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in mt6351_codec_dai_hw_params()
274 priv->dl_rate = rate; in mt6351_codec_dai_hw_params()
275 else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in mt6351_codec_dai_hw_params()
276 priv->ul_rate = rate; in mt6351_codec_dai_hw_params()
291 .name = "mt6351-snd-codec-aif1",
329 old_idx = priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]; in hp_gain_ramp_set()
331 idx = priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL]; in hp_gain_ramp_set()
334 dev_dbg(priv->dev, "%s(), idx %d, old_idx %d\n", in hp_gain_ramp_set()
338 offset = idx - old_idx; in hp_gain_ramp_set()
340 offset = old_idx - idx; in hp_gain_ramp_set()
345 reg_idx = idx > old_idx ? reg_idx + 1 : reg_idx - 1; in hp_gain_ramp_set()
349 regmap_update_bits(cmpnt->regmap, in hp_gain_ramp_set()
355 offset--; in hp_gain_ramp_set()
363 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 8, 0x1 << 8); in hp_zcd_enable()
364 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 7, 0x0 << 7); in hp_zcd_enable()
367 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 6, 0x1 << 6); in hp_zcd_enable()
369 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x3 << 4, 0x0 << 4); in hp_zcd_enable()
370 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x7 << 1, 0x5 << 1); in hp_zcd_enable()
371 regmap_update_bits(cmpnt->regmap, MT6351_ZCD_CON0, 0x1 << 0, 0x1 << 0); in hp_zcd_enable()
376 regmap_write(cmpnt->regmap, MT6351_ZCD_CON0, 0x0000); in hp_zcd_disable()
379 static const DECLARE_TLV_DB_SCALE(playback_tlv, -1000, 100, 0);
579 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_reg_set_clr_event()
583 if (w->on_val) { in mt_reg_set_clr_event()
585 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
586 w->reg + REG_STRIDE, in mt_reg_set_clr_event()
587 0x1 << w->shift, in mt_reg_set_clr_event()
588 0x1 << w->shift); in mt_reg_set_clr_event()
591 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
592 w->reg + REG_STRIDE * 2, in mt_reg_set_clr_event()
593 0x1 << w->shift, in mt_reg_set_clr_event()
594 0x1 << w->shift); in mt_reg_set_clr_event()
598 if (w->off_val) { in mt_reg_set_clr_event()
600 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
601 w->reg + REG_STRIDE, in mt_reg_set_clr_event()
602 0x1 << w->shift, in mt_reg_set_clr_event()
603 0x1 << w->shift); in mt_reg_set_clr_event()
606 regmap_update_bits(cmpnt->regmap, in mt_reg_set_clr_event()
607 w->reg + REG_STRIDE * 2, in mt_reg_set_clr_event()
608 0x1 << w->shift, in mt_reg_set_clr_event()
609 0x1 << w->shift); in mt_reg_set_clr_event()
623 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_ncp_event()
627 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG1, in mt_ncp_event()
630 regmap_update_bits(cmpnt->regmap, MT6351_AFE_NCP_CFG0, in mt_ncp_event()
647 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_sgen_event()
651 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG0, in mt_sgen_event()
653 regmap_update_bits(cmpnt->regmap, MT6351_AFE_SGEN_CFG1, in mt_sgen_event()
667 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_aif_in_event()
670 dev_dbg(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_in_event()
671 __func__, event, priv->dl_rate); in mt_aif_in_event()
676 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
679 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON0, in mt_aif_in_event()
682 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
685 regmap_update_bits(cmpnt->regmap, MT6351_AFUNC_AUD_CON2, in mt_aif_in_event()
688 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DL_SDM_CON1, in mt_aif_in_event()
691 regmap_write(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG0, in mt_aif_in_event()
692 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) | in mt_aif_in_event()
694 regmap_write(cmpnt->regmap, MT6351_AFE_DL_SRC2_CON0_H, in mt_aif_in_event()
695 (get_play_reg_val(cmpnt, priv->dl_rate) << 12) | in mt_aif_in_event()
698 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2, in mt_aif_in_event()
712 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_hp_event()
716 dev_dbg(priv->dev, "%s(), event 0x%x, hp_en_counter %d\n", in mt_hp_event()
717 __func__, event, priv->hp_en_counter); in mt_hp_event()
721 priv->hp_en_counter++; in mt_hp_event()
722 if (priv->hp_en_counter > 1) in mt_hp_event()
724 else if (priv->hp_en_counter <= 0) in mt_hp_event()
725 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
727 priv->hp_en_counter); in mt_hp_event()
732 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6, in mt_hp_event()
736 regmap_read(cmpnt->regmap, MT6351_ZCD_CON2, ®); in mt_hp_event()
737 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTL] = reg & 0x1f; in mt_hp_event()
738 priv->ana_gain[AUDIO_ANALOG_VOLUME_HPOUTR] = (reg >> 7) & 0x1f; in mt_hp_event()
740 /* Set HPR/HPL gain as minimum (~ -40dB) */ in mt_hp_event()
741 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
743 /* Set HS gain as minimum (~ -40dB) */ in mt_hp_event()
744 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
747 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON2, in mt_hp_event()
750 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
753 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
756 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt_hp_event()
758 /* Enable pre-charge buffer */ in mt_hp_event()
759 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
768 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
770 /* Disable pre-charge buffer */ in mt_hp_event()
771 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON1, in mt_hp_event()
774 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt_hp_event()
779 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON6, in mt_hp_event()
791 priv->hp_en_counter--; in mt_hp_event()
792 if (priv->hp_en_counter > 0) in mt_hp_event()
794 else if (priv->hp_en_counter < 0) in mt_hp_event()
795 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
797 priv->hp_en_counter); in mt_hp_event()
802 /* Set HPR/HPL gain as -1dB, step by step */ in mt_hp_event()
808 if (priv->hp_en_counter > 0) in mt_hp_event()
810 else if (priv->hp_en_counter < 0) in mt_hp_event()
811 dev_err(priv->dev, "%s(), hp_en_counter %d <= 0\n", in mt_hp_event()
813 priv->hp_en_counter); in mt_hp_event()
816 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
821 regmap_update_bits(cmpnt->regmap, in mt_hp_event()
840 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_aif_out_event()
843 dev_dbg(priv->dev, "%s(), event 0x%x, rate %d\n", in mt_aif_out_event()
844 __func__, event, priv->ul_rate); in mt_aif_out_event()
849 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
852 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
855 regmap_update_bits(cmpnt->regmap, MT6351_AFE_DCCLK_CFG0, in mt_aif_out_event()
859 regmap_update_bits(cmpnt->regmap, MT6351_AFE_UL_SRC_CON0_H, in mt_aif_out_event()
861 get_cap_reg_val(cmpnt, priv->ul_rate) << 1); in mt_aif_out_event()
864 if (priv->ul_rate <= 48000) { in mt_aif_out_event()
866 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
871 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
879 if (priv->ul_rate <= 48000) { in mt_aif_out_event()
881 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
886 regmap_update_bits(cmpnt->regmap, in mt_aif_out_event()
903 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_adc_clkgen_event()
908 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3, in mt_adc_clkgen_event()
913 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON3, in mt_adc_clkgen_event()
926 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_pga_left_event()
931 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
935 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
942 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON0, in mt_pga_left_event()
956 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_pga_right_event()
961 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
965 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
972 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON1, in mt_pga_right_event()
986 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_0_event()
990 /* MIC Bias 0 LowPower: 0_Normal */ in mt_mic_bias_0_event()
991 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
994 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
1000 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_0_event()
1014 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_1_event()
1018 /* MIC Bias 1 LowPower: 0_Normal */ in mt_mic_bias_1_event()
1019 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1022 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1028 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON10, in mt_mic_bias_1_event()
1042 struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm); in mt_mic_bias_2_event()
1046 /* MIC Bias 2 LowPower: 0_Normal */ in mt_mic_bias_2_event()
1047 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1050 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1056 regmap_update_bits(cmpnt->regmap, MT6351_AUDENC_ANA_CON9, in mt_mic_bias_2_event()
1088 /* Global Supply*/
1121 /* DL Supply */
1122 SND_SOC_DAPM_SUPPLY("DL Power Supply", SND_SOC_NOPM,
1152 SND_SOC_DAPM_SUPPLY("LOL Bias Gen", MT6351_AUDDEC_ANA_CON6,
1180 SND_SOC_DAPM_SUPPLY("RCV Bias Gen", MT6351_AUDDEC_ANA_CON6,
1256 /* main mic mic bias */
1257 SND_SOC_DAPM_SUPPLY_S("Mic Bias 0", SUPPLY_SUBSEQ_MICBIAS,
1261 /* ref mic mic bias */
1262 SND_SOC_DAPM_SUPPLY_S("Mic Bias 2", SUPPLY_SUBSEQ_MICBIAS,
1266 /* headset mic1/2 mic bias */
1267 SND_SOC_DAPM_SUPPLY_S("Mic Bias 1", SUPPLY_SUBSEQ_MICBIAS,
1271 SND_SOC_DAPM_SUPPLY_S("Mic Bias 1 DCC pull high", SUPPLY_SUBSEQ_MICBIAS,
1330 {"AIN0", NULL, "Mic Bias 0"},
1331 {"AIN2", NULL, "Mic Bias 2"},
1333 {"AIN1", NULL, "Mic Bias 1"},
1334 {"AIN1", NULL, "Mic Bias 1 DCC pull high"},
1336 /* DL Supply */
1337 {"DL Power Supply", NULL, "AUDGLB"},
1338 {"DL Power Supply", NULL, "CLKSQ Audio"},
1339 {"DL Power Supply", NULL, "ZCD13M_CK"},
1340 {"DL Power Supply", NULL, "AUD_CK"},
1341 {"DL Power Supply", NULL, "AUDIF_CK"},
1342 {"DL Power Supply", NULL, "AUDNCP_CK"},
1344 {"DL Power Supply", NULL, "NV Regulator"},
1345 {"DL Power Supply", NULL, "AUD_CLK"},
1346 {"DL Power Supply", NULL, "IBIST"},
1347 {"DL Power Supply", NULL, "LDO"},
1350 /* DL Digital Supply */
1370 {"DACL", NULL, "DL Power Supply"},
1374 {"DACR", NULL, "DL Power Supply"},
1381 {"LOL Buffer", NULL, "LOL Bias Gen"},
1403 {"RCV Buffer", NULL, "RCV Bias Gen"},
1411 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CLKSQ, 0x0001, 0x0); in mt6351_codec_init_reg()
1413 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON9, in mt6351_codec_init_reg()
1416 regmap_update_bits(cmpnt->regmap, MT6351_TOP_CKPDN_CON0_SET, in mt6351_codec_init_reg()
1419 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON0, in mt6351_codec_init_reg()
1422 regmap_update_bits(cmpnt->regmap, MT6351_AUDDEC_ANA_CON3, in mt6351_codec_init_reg()
1425 regmap_update_bits(cmpnt->regmap, MT6351_AFE_PMIC_NEWIF_CFG2, in mt6351_codec_init_reg()
1434 snd_soc_component_init_regmap(cmpnt, priv->regmap); in mt6351_codec_probe()
1455 priv = devm_kzalloc(&pdev->dev, in mt6351_codec_driver_probe()
1459 return -ENOMEM; in mt6351_codec_driver_probe()
1461 dev_set_drvdata(&pdev->dev, priv); in mt6351_codec_driver_probe()
1463 priv->dev = &pdev->dev; in mt6351_codec_driver_probe()
1465 priv->regmap = dev_get_regmap(pdev->dev.parent, NULL); in mt6351_codec_driver_probe()
1466 if (!priv->regmap) in mt6351_codec_driver_probe()
1467 return -ENODEV; in mt6351_codec_driver_probe()
1469 dev_dbg(priv->dev, "%s(), dev name %s\n", in mt6351_codec_driver_probe()
1470 __func__, dev_name(&pdev->dev)); in mt6351_codec_driver_probe()
1472 return devm_snd_soc_register_component(&pdev->dev, in mt6351_codec_driver_probe()
1479 {.compatible = "mediatek,mt6351-sound",},
1485 .name = "mt6351-sound",