Lines Matching +full:codec +full:- +full:aif1 +full:- +full:lrclk
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * max98927.c -- MAX98927 ALSA Soc Audio driver
5 * Copyright (C) 2016-2017 Maxim Integrated Products
140 struct snd_soc_component *component = codec_dai->component; in max98927_dai_set_fmt()
147 dev_dbg(component->dev, "%s: fmt 0x%08X\n", __func__, fmt); in max98927_dai_set_fmt()
151 max98927->provider = false; in max98927_dai_set_fmt()
155 max98927->provider = true; in max98927_dai_set_fmt()
159 dev_err(component->dev, "DAI clock mode unsupported\n"); in max98927_dai_set_fmt()
160 return -EINVAL; in max98927_dai_set_fmt()
163 regmap_update_bits(max98927->regmap, MAX98927_R0021_PCM_MASTER_MODE, in max98927_dai_set_fmt()
173 dev_err(component->dev, "DAI invert mode unsupported\n"); in max98927_dai_set_fmt()
174 return -EINVAL; in max98927_dai_set_fmt()
177 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG, in max98927_dai_set_fmt()
198 return -EINVAL; in max98927_dai_set_fmt()
200 max98927->iface = fmt & SND_SOC_DAIFMT_FORMAT_MASK; in max98927_dai_set_fmt()
204 regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A, in max98927_dai_set_fmt()
208 regmap_update_bits(max98927->regmap, in max98927_dai_set_fmt()
213 regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL, in max98927_dai_set_fmt()
216 regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL, in max98927_dai_set_fmt()
220 regmap_update_bits(max98927->regmap, MAX98927_R0035_PDM_RX_CTRL, in max98927_dai_set_fmt()
223 regmap_update_bits(max98927->regmap, MAX98927_R003B_SPK_SRC_SEL, in max98927_dai_set_fmt()
226 regmap_update_bits(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A, in max98927_dai_set_fmt()
233 /* codec MCLK rate in master mode */
240 /* BCLKs per LRCLK */
248 /* match BCLKs per LRCLK */ in max98927_get_bclk_sel()
258 struct snd_soc_component *component = max98927->component; in max98927_set_clock()
259 /* BCLK/LRCLK ratio calculation */ in max98927_set_clock()
260 int blr_clk_ratio = params_channels(params) * max98927->ch_size; in max98927_set_clock()
263 if (max98927->provider) { in max98927_set_clock()
267 if (rate_table[i] >= max98927->sysclk) in max98927_set_clock()
271 dev_err(component->dev, "failed to find proper clock rate.\n"); in max98927_set_clock()
272 return -EINVAL; in max98927_set_clock()
274 regmap_update_bits(max98927->regmap, in max98927_set_clock()
280 if (!max98927->tdm_mode) { in max98927_set_clock()
284 dev_err(component->dev, "format unsupported %d\n", in max98927_set_clock()
286 return -EINVAL; in max98927_set_clock()
289 regmap_update_bits(max98927->regmap, in max98927_set_clock()
300 struct snd_soc_component *component = dai->component; in max98927_dai_hw_params()
317 dev_err(component->dev, "format unsupported %d\n", in max98927_dai_hw_params()
322 max98927->ch_size = snd_pcm_format_width(params_format(params)); in max98927_dai_hw_params()
324 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG, in max98927_dai_hw_params()
327 dev_dbg(component->dev, "format supported %d", in max98927_dai_hw_params()
360 dev_err(component->dev, "rate %d not supported\n", in max98927_dai_hw_params()
364 /* set DAI_SR to correct LRCLK frequency */ in max98927_dai_hw_params()
365 regmap_update_bits(max98927->regmap, MAX98927_R0023_PCM_SR_SETUP1, in max98927_dai_hw_params()
367 regmap_update_bits(max98927->regmap, MAX98927_R0024_PCM_SR_SETUP2, in max98927_dai_hw_params()
372 if (max98927->interleave_mode && in max98927_dai_hw_params()
374 regmap_update_bits(max98927->regmap, in max98927_dai_hw_params()
377 sampling_rate - 3); in max98927_dai_hw_params()
379 regmap_update_bits(max98927->regmap, in max98927_dai_hw_params()
385 return -EINVAL; in max98927_dai_hw_params()
392 struct snd_soc_component *component = dai->component; in max98927_dai_tdm_slot()
397 max98927->tdm_mode = true; in max98927_dai_tdm_slot()
402 dev_err(component->dev, "BCLK %d not supported\n", in max98927_dai_tdm_slot()
404 return -EINVAL; in max98927_dai_tdm_slot()
407 regmap_update_bits(max98927->regmap, MAX98927_R0022_PCM_CLK_SETUP, in max98927_dai_tdm_slot()
422 dev_err(component->dev, "format unsupported %d\n", in max98927_dai_tdm_slot()
424 return -EINVAL; in max98927_dai_tdm_slot()
427 regmap_update_bits(max98927->regmap, MAX98927_R0020_PCM_MODE_CFG, in max98927_dai_tdm_slot()
431 regmap_write(max98927->regmap, MAX98927_R0018_PCM_RX_EN_A, in max98927_dai_tdm_slot()
433 regmap_write(max98927->regmap, MAX98927_R0019_PCM_RX_EN_B, in max98927_dai_tdm_slot()
437 regmap_write(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A, in max98927_dai_tdm_slot()
439 regmap_write(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B, in max98927_dai_tdm_slot()
442 /* Tx slot Hi-Z configuration */ in max98927_dai_tdm_slot()
443 regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A, in max98927_dai_tdm_slot()
445 regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B, in max98927_dai_tdm_slot()
459 struct snd_soc_component *component = dai->component; in max98927_dai_set_sysclk()
462 max98927->sysclk = freq; in max98927_dai_set_sysclk()
476 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max98927_dac_event()
481 max98927->tdm_mode = false; in max98927_dac_event()
484 regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN, in max98927_dac_event()
486 regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN, in max98927_dac_event()
490 regmap_update_bits(max98927->regmap, MAX98927_R00FF_GLOBAL_SHDN, in max98927_dac_event()
492 regmap_update_bits(max98927->regmap, MAX98927_R003A_AMP_EN, in max98927_dac_event()
533 static DECLARE_TLV_DB_SCALE(max98927_digital_tlv, -1600, 25, 0);
600 0, (1 << MAX98927_AMP_VOL_WIDTH) - 1, 0,
629 .name = "max98927-aif1",
652 max98927->component = component; in max98927_probe()
655 regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET, in max98927_probe()
659 regmap_write(max98927->regmap, MAX98927_R001C_PCM_TX_HIZ_CTRL_A, 0xFF); in max98927_probe()
660 regmap_write(max98927->regmap, MAX98927_R001D_PCM_TX_HIZ_CTRL_B, 0xFF); in max98927_probe()
661 regmap_write(max98927->regmap, MAX98927_R0025_PCM_TO_SPK_MONOMIX_A, in max98927_probe()
663 regmap_write(max98927->regmap, MAX98927_R0026_PCM_TO_SPK_MONOMIX_B, in max98927_probe()
666 regmap_write(max98927->regmap, MAX98927_R0036_AMP_VOL_CTRL, 0x38); in max98927_probe()
667 regmap_write(max98927->regmap, MAX98927_R003C_SPK_GAIN, 0x05); in max98927_probe()
669 regmap_write(max98927->regmap, MAX98927_R0037_AMP_DSP_CFG, 0x03); in max98927_probe()
671 regmap_write(max98927->regmap, MAX98927_R003F_MEAS_DSP_CFG, 0xF7); in max98927_probe()
673 regmap_write(max98927->regmap, MAX98927_R0040_BOOST_CTRL0, 0x1C); in max98927_probe()
674 regmap_write(max98927->regmap, MAX98927_R0042_BOOST_CTRL1, 0x3E); in max98927_probe()
676 regmap_write(max98927->regmap, MAX98927_R0043_MEAS_ADC_CFG, 0x04); in max98927_probe()
677 regmap_write(max98927->regmap, MAX98927_R0044_MEAS_ADC_BASE_MSB, 0x00); in max98927_probe()
678 regmap_write(max98927->regmap, MAX98927_R0045_MEAS_ADC_BASE_LSB, 0x24); in max98927_probe()
680 regmap_write(max98927->regmap, MAX98927_R007F_BROWNOUT_LVL4_AMP1_CTRL1, in max98927_probe()
683 regmap_write(max98927->regmap, MAX98927_R0082_ENV_TRACK_VOUT_HEADROOM, in max98927_probe()
685 regmap_write(max98927->regmap, MAX98927_R0086_ENV_TRACK_CTRL, 0x01); in max98927_probe()
686 regmap_write(max98927->regmap, MAX98927_R0087_ENV_TRACK_BOOST_VOUT_READ, in max98927_probe()
690 regmap_write(max98927->regmap, MAX98927_R001E_PCM_TX_CH_SRC_A, in max98927_probe()
691 (max98927->i_l_slot << MAX98927_PCM_TX_CH_SRC_A_I_SHIFT | max98927->v_l_slot) & 0xFF); in max98927_probe()
693 if (max98927->v_l_slot < 8) { in max98927_probe()
694 regmap_update_bits(max98927->regmap, in max98927_probe()
696 1 << max98927->v_l_slot, 0); in max98927_probe()
697 regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A, in max98927_probe()
698 1 << max98927->v_l_slot, in max98927_probe()
699 1 << max98927->v_l_slot); in max98927_probe()
701 regmap_update_bits(max98927->regmap, in max98927_probe()
703 1 << (max98927->v_l_slot - 8), 0); in max98927_probe()
704 regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B, in max98927_probe()
705 1 << (max98927->v_l_slot - 8), in max98927_probe()
706 1 << (max98927->v_l_slot - 8)); in max98927_probe()
709 if (max98927->i_l_slot < 8) { in max98927_probe()
710 regmap_update_bits(max98927->regmap, in max98927_probe()
712 1 << max98927->i_l_slot, 0); in max98927_probe()
713 regmap_update_bits(max98927->regmap, MAX98927_R001A_PCM_TX_EN_A, in max98927_probe()
714 1 << max98927->i_l_slot, in max98927_probe()
715 1 << max98927->i_l_slot); in max98927_probe()
717 regmap_update_bits(max98927->regmap, in max98927_probe()
719 1 << (max98927->i_l_slot - 8), 0); in max98927_probe()
720 regmap_update_bits(max98927->regmap, MAX98927_R001B_PCM_TX_EN_B, in max98927_probe()
721 1 << (max98927->i_l_slot - 8), in max98927_probe()
722 1 << (max98927->i_l_slot - 8)); in max98927_probe()
726 if (max98927->interleave_mode) in max98927_probe()
727 regmap_update_bits(max98927->regmap, in max98927_probe()
739 regcache_cache_only(max98927->regmap, true); in max98927_suspend()
740 regcache_mark_dirty(max98927->regmap); in max98927_suspend()
747 regmap_write(max98927->regmap, MAX98927_R0100_SOFT_RESET, in max98927_resume()
749 regcache_cache_only(max98927->regmap, false); in max98927_resume()
750 regcache_sync(max98927->regmap); in max98927_resume()
787 struct device *dev = &i2c->dev; in max98927_slot_config()
789 if (!device_property_read_u32(dev, "vmon-slot-no", &value)) in max98927_slot_config()
790 max98927->v_l_slot = value & 0xF; in max98927_slot_config()
792 max98927->v_l_slot = 0; in max98927_slot_config()
794 if (!device_property_read_u32(dev, "imon-slot-no", &value)) in max98927_slot_config()
795 max98927->i_l_slot = value & 0xF; in max98927_slot_config()
797 max98927->i_l_slot = 1; in max98927_slot_config()
807 max98927 = devm_kzalloc(&i2c->dev, sizeof(*max98927), GFP_KERNEL); in max98927_i2c_probe()
809 ret = -ENOMEM; in max98927_i2c_probe()
815 if (of_property_read_bool(i2c->dev.of_node, "maxim,interleave-mode")) { in max98927_i2c_probe()
816 max98927->interleave_mode = true; in max98927_i2c_probe()
818 if (!of_property_read_u32(i2c->dev.of_node, "interleave_mode", in max98927_i2c_probe()
821 max98927->interleave_mode = true; in max98927_i2c_probe()
825 max98927->regmap in max98927_i2c_probe()
827 if (IS_ERR(max98927->regmap)) { in max98927_i2c_probe()
828 ret = PTR_ERR(max98927->regmap); in max98927_i2c_probe()
829 dev_err(&i2c->dev, in max98927_i2c_probe()
834 max98927->reset_gpio = devm_gpiod_get_optional(&i2c->dev, "reset", in max98927_i2c_probe()
836 if (IS_ERR(max98927->reset_gpio)) { in max98927_i2c_probe()
837 ret = PTR_ERR(max98927->reset_gpio); in max98927_i2c_probe()
838 return dev_err_probe(&i2c->dev, ret, "failed to request GPIO reset pin"); in max98927_i2c_probe()
841 if (max98927->reset_gpio) { in max98927_i2c_probe()
842 gpiod_set_value_cansleep(max98927->reset_gpio, 0); in max98927_i2c_probe()
848 ret = regmap_read(max98927->regmap, MAX98927_R01FF_REV_ID, ®); in max98927_i2c_probe()
850 dev_err(&i2c->dev, in max98927_i2c_probe()
854 dev_info(&i2c->dev, "MAX98927 revisionID: 0x%02X\n", reg); in max98927_i2c_probe()
859 /* codec registeration */ in max98927_i2c_probe()
860 ret = devm_snd_soc_register_component(&i2c->dev, in max98927_i2c_probe()
864 dev_err(&i2c->dev, "Failed to register component: %d\n", ret); in max98927_i2c_probe()
873 if (max98927->reset_gpio) in max98927_i2c_remove()
874 gpiod_set_value_cansleep(max98927->reset_gpio, 1); in max98927_i2c_remove()