Lines Matching +full:sm8250 +full:- +full:lpass +full:- +full:rx +full:- +full:macro
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
12 #include <linux/clk-provider.h>
14 #include <sound/soc-dapm.h>
19 #include "lpass-macro-common.h"
20 #include "lpass-wsa-macro.h"
177 /* CDC_WSA_COMPANDER1_CTLx and CDC_WSA_SOFTCLIPx differ per LPASS codec versions */
206 /* LPASS codec version <=2.4 register offsets */
224 /* LPASS codec version >=2.5 register offsets */
356 {24000, -EINVAL},/* 24K */
381 * struct wsa_reg_layout - Register layout differences
386 * @compander1_reg_offset: offset between compander registers (compander1 - compander0)
388 * @softclip1_reg_offset: offset between compander registers (softclip1 - softclip0)
420 struct clk *macro; member
447 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
486 /* RX INT0 */
549 /* RX INT1 */
621 /* WSA Macro */
992 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_rw_register()
1053 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_readable_register()
1083 /* Update volatile list for rx/tx macros */ in wsa_is_volatile_register()
1101 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_volatile_register()
1121 * wsa_macro_set_spkr_mode - Configures speaker compander and smartboost
1127 * Returns 0 on success or -EINVAL on error.
1133 wsa->spkr_mode = mode; in wsa_macro_set_spkr_mode()
1166 struct snd_soc_component *component = dai->component; in wsa_macro_set_prim_interpolator_rate()
1169 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_prim_interpolator_rate()
1172 dev_err(component->dev, "%s: Invalid RX port, Dai ID is %d\n", in wsa_macro_set_prim_interpolator_rate()
1173 __func__, dai->id); in wsa_macro_set_prim_interpolator_rate()
1174 return -EINVAL; in wsa_macro_set_prim_interpolator_rate()
1181 * to which interpolator input, the cdc_dma rx port in wsa_macro_set_prim_interpolator_rate()
1187 wsa->reg_layout->rx_intx_1_mix_inp0_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1189 wsa->reg_layout->rx_intx_1_mix_inp1_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1191 wsa->reg_layout->rx_intx_1_mix_inp2_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1218 struct snd_soc_component *component = dai->component; in wsa_macro_set_mix_interpolator_rate()
1221 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_mix_interpolator_rate()
1224 dev_err(component->dev, "%s: Invalid RX port, Dai ID is %d\n", in wsa_macro_set_mix_interpolator_rate()
1225 __func__, dai->id); in wsa_macro_set_mix_interpolator_rate()
1226 return -EINVAL; in wsa_macro_set_mix_interpolator_rate()
1232 wsa->reg_layout->rx_intx_2_sel_mask); in wsa_macro_set_mix_interpolator_rate()
1277 return -EINVAL; in wsa_macro_set_interpolator_rate()
1288 struct snd_soc_component *component = dai->component; in wsa_macro_hw_params()
1292 switch (substream->stream) { in wsa_macro_hw_params()
1296 dev_err(component->dev, in wsa_macro_hw_params()
1303 if (dai->id == WSA_MACRO_AIF_VI) in wsa_macro_hw_params()
1304 wsa->pcm_rate_vi = params_rate(params); in wsa_macro_hw_params()
1317 struct snd_soc_component *component = dai->component; in wsa_macro_get_channel_map()
1321 switch (dai->id) { in wsa_macro_get_channel_map()
1323 *tx_slot = wsa->active_ch_mask[dai->id]; in wsa_macro_get_channel_map()
1324 *tx_num = wsa->active_ch_cnt[dai->id]; in wsa_macro_get_channel_map()
1328 for_each_set_bit(temp, &wsa->active_ch_mask[dai->id], in wsa_macro_get_channel_map()
1353 dev_err(component->dev, "%s: Invalid AIF\n", __func__); in wsa_macro_get_channel_map()
1425 struct regmap *regmap = wsa->regmap; in wsa_macro_mclk_enable()
1428 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1442 wsa->wsa_mclk_users++; in wsa_macro_mclk_enable()
1444 if (wsa->wsa_mclk_users <= 0) { in wsa_macro_mclk_enable()
1445 dev_err(wsa->dev, "clock already disabled\n"); in wsa_macro_mclk_enable()
1446 wsa->wsa_mclk_users = 0; in wsa_macro_mclk_enable()
1449 wsa->wsa_mclk_users--; in wsa_macro_mclk_enable()
1450 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1513 if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) in wsa_macro_enable_disable_vi_feedback()
1518 if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) in wsa_macro_enable_disable_vi_feedback()
1527 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_mclk_event()
1538 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_enable_vi_feedback()
1542 switch (wsa->pcm_rate_vi) { in wsa_macro_enable_vi_feedback()
1580 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_enable_mix_path()
1584 switch (w->shift) { in wsa_macro_enable_mix_path()
1657 if (!wsa->comp_enabled[comp]) in wsa_macro_config_compander()
1661 (comp * wsa->reg_layout->compander1_reg_offset); in wsa_macro_config_compander()
1707 u16 softclip_clk_reg = wsa->reg_layout->softclip0_reg_base + in wsa_macro_enable_softclip_clk()
1708 (path * wsa->reg_layout->softclip1_reg_offset); in wsa_macro_enable_softclip_clk()
1713 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1722 wsa->softclip_clk_users[path]++; in wsa_macro_enable_softclip_clk()
1724 wsa->softclip_clk_users[path]--; in wsa_macro_enable_softclip_clk()
1725 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1749 if (!wsa->is_softclip_on[softclip_path]) in wsa_macro_config_softclip()
1753 (softclip_path * wsa->reg_layout->softclip1_reg_offset); in wsa_macro_config_softclip()
1786 wsa->reg_layout->rx_intx_1_mix_inp0_sel_mask); in wsa_macro_adie_lb()
1792 wsa->reg_layout->rx_intx_1_mix_inp1_sel_mask); in wsa_macro_adie_lb()
1798 wsa->reg_layout->rx_intx_1_mix_inp2_sel_mask); in wsa_macro_adie_lb()
1810 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_enable_main_path()
1813 reg = CDC_WSA_RX0_RX_PATH_CTL + WSA_MACRO_RX_PATH_OFFSET * w->shift; in wsa_macro_enable_main_path()
1816 if (wsa_macro_adie_lb(component, w->shift)) { in wsa_macro_enable_main_path()
1859 wsa->prim_int_users[ind]++; in wsa_macro_enable_prim_interpolator()
1860 if (wsa->prim_int_users[ind] == 1) { in wsa_macro_enable_prim_interpolator()
1881 wsa->prim_int_users[ind]--; in wsa_macro_enable_prim_interpolator()
1882 if (wsa->prim_int_users[ind] == 0) { in wsa_macro_enable_prim_interpolator()
1900 switch (wsa->spkr_mode) { in wsa_macro_config_ear_spkr_gain()
1903 comp_gain_offset = -12; in wsa_macro_config_ear_spkr_gain()
1907 comp_gain_offset = -15; in wsa_macro_config_ear_spkr_gain()
1914 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1916 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1917 /* For example, val is -8(-12+5-1) for 4dB of gain */ in wsa_macro_config_ear_spkr_gain()
1918 val = comp_gain_offset + wsa->ear_spkr_gain - 1; in wsa_macro_config_ear_spkr_gain()
1925 * ear_spkr_gain is non-zero. in wsa_macro_config_ear_spkr_gain()
1927 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1929 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1942 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_enable_interpolator()
1948 if (w->shift == WSA_MACRO_COMP1) { in wsa_macro_enable_interpolator()
1951 } else if (w->shift == WSA_MACRO_COMP2) { in wsa_macro_enable_interpolator()
1962 wsa_macro_config_compander(component, w->shift, event); in wsa_macro_enable_interpolator()
1963 wsa_macro_config_softclip(component, w->shift, event); in wsa_macro_enable_interpolator()
1965 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1966 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1967 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
1991 wsa_macro_config_compander(component, w->shift, event); in wsa_macro_enable_interpolator()
1992 wsa_macro_config_softclip(component, w->shift, event); in wsa_macro_enable_interpolator()
1994 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1995 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1996 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
2026 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_spk_boost_event()
2041 dev_warn(component->dev, "Incorrect widget name in the driver\n"); in wsa_macro_spk_boost_event()
2042 return -EINVAL; in wsa_macro_spk_boost_event()
2077 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wsa_macro_enable_echo()
2083 switch (w->shift) { in wsa_macro_enable_echo()
2086 ec_tx = val - 1; in wsa_macro_enable_echo()
2090 ec_tx = (val >> CDC_WSA_RX_MIX_TX1_SEL_SHFT) - 1; in wsa_macro_enable_echo()
2093 dev_err(component->dev, "%s: Invalid shift %u\n", in wsa_macro_enable_echo()
2094 __func__, w->shift); in wsa_macro_enable_echo()
2095 return -EINVAL; in wsa_macro_enable_echo()
2098 if (wsa->ec_hq[ec_tx]) { in wsa_macro_enable_echo()
2118 int ec_tx = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in wsa_macro_get_ec_hq()
2121 ucontrol->value.integer.value[0] = wsa->ec_hq[ec_tx]; in wsa_macro_get_ec_hq()
2130 int ec_tx = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in wsa_macro_set_ec_hq()
2131 int value = ucontrol->value.integer.value[0]; in wsa_macro_set_ec_hq()
2134 wsa->ec_hq[ec_tx] = value; in wsa_macro_set_ec_hq()
2144 int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in wsa_macro_get_compander()
2147 ucontrol->value.integer.value[0] = wsa->comp_enabled[comp]; in wsa_macro_get_compander()
2155 int comp = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in wsa_macro_set_compander()
2156 int value = ucontrol->value.integer.value[0]; in wsa_macro_set_compander()
2159 wsa->comp_enabled[comp] = value; in wsa_macro_set_compander()
2170 ucontrol->value.integer.value[0] = wsa->ear_spkr_gain; in wsa_macro_ear_spkr_pa_gain_get()
2181 wsa->ear_spkr_gain = ucontrol->value.integer.value[0]; in wsa_macro_ear_spkr_pa_gain_put()
2192 snd_soc_dapm_to_component(widget->dapm); in wsa_macro_rx_mux_get()
2195 ucontrol->value.integer.value[0] = in wsa_macro_rx_mux_get()
2196 wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_get()
2206 snd_soc_dapm_to_component(widget->dapm); in wsa_macro_rx_mux_put()
2207 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in wsa_macro_rx_mux_put()
2209 u32 rx_port_value = ucontrol->value.integer.value[0]; in wsa_macro_rx_mux_put()
2215 aif_rst = wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_put()
2220 dev_err(component->dev, "%s: Invalid AIF reset\n", __func__); in wsa_macro_rx_mux_put()
2224 wsa->rx_port_value[widget->shift] = rx_port_value; in wsa_macro_rx_mux_put()
2226 bit_input = widget->shift; in wsa_macro_rx_mux_put()
2234 dai_id = aif_rst - 1; in wsa_macro_rx_mux_put()
2235 if (wsa->active_ch_cnt[dai_id]) { in wsa_macro_rx_mux_put()
2236 clear_bit(bit_input, &wsa->active_ch_mask[dai_id]); in wsa_macro_rx_mux_put()
2237 wsa->active_ch_cnt[dai_id]--; in wsa_macro_rx_mux_put()
2243 dai_id = rx_port_value - 1; in wsa_macro_rx_mux_put()
2244 set_bit(bit_input, &wsa->active_ch_mask[dai_id]); in wsa_macro_rx_mux_put()
2245 wsa->active_ch_cnt[dai_id]++; in wsa_macro_rx_mux_put()
2248 dev_err(component->dev, in wsa_macro_rx_mux_put()
2249 "%s: Invalid AIF_ID for WSA RX MUX %d\n", in wsa_macro_rx_mux_put()
2251 return -EINVAL; in wsa_macro_rx_mux_put()
2254 snd_soc_dapm_mux_update_power(widget->dapm, kcontrol, in wsa_macro_rx_mux_put()
2264 int path = ((struct soc_mixer_control *)kcontrol->private_value)->shift; in wsa_macro_soft_clip_enable_get()
2266 ucontrol->value.integer.value[0] = wsa->is_softclip_on[path]; in wsa_macro_soft_clip_enable_get()
2276 int path = ((struct soc_mixer_control *) kcontrol->private_value)->shift; in wsa_macro_soft_clip_enable_put()
2278 wsa->is_softclip_on[path] = ucontrol->value.integer.value[0]; in wsa_macro_soft_clip_enable_put()
2297 -84, 40, digital_gain),
2299 -84, 40, digital_gain),
2335 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in wsa_macro_vi_feed_mixer_get()
2336 struct soc_mixer_control *mixer = (struct soc_mixer_control *)kcontrol->private_value; in wsa_macro_vi_feed_mixer_get()
2338 u32 spk_tx_id = mixer->shift; in wsa_macro_vi_feed_mixer_get()
2339 u32 dai_id = widget->shift; in wsa_macro_vi_feed_mixer_get()
2341 if (test_bit(spk_tx_id, &wsa->active_ch_mask[dai_id])) in wsa_macro_vi_feed_mixer_get()
2342 ucontrol->value.integer.value[0] = 1; in wsa_macro_vi_feed_mixer_get()
2344 ucontrol->value.integer.value[0] = 0; in wsa_macro_vi_feed_mixer_get()
2353 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in wsa_macro_vi_feed_mixer_put()
2354 struct soc_mixer_control *mixer = (struct soc_mixer_control *)kcontrol->private_value; in wsa_macro_vi_feed_mixer_put()
2356 u32 enable = ucontrol->value.integer.value[0]; in wsa_macro_vi_feed_mixer_put()
2357 u32 spk_tx_id = mixer->shift; in wsa_macro_vi_feed_mixer_put()
2358 u32 dai_id = widget->shift; in wsa_macro_vi_feed_mixer_put()
2363 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2365 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2366 wsa->active_ch_cnt[dai_id]++; in wsa_macro_vi_feed_mixer_put()
2370 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2372 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2373 wsa->active_ch_cnt[dai_id]++; in wsa_macro_vi_feed_mixer_put()
2378 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2380 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2381 wsa->active_ch_cnt[dai_id]--; in wsa_macro_vi_feed_mixer_put()
2385 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2387 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2388 wsa->active_ch_cnt[dai_id]--; in wsa_macro_vi_feed_mixer_put()
2391 snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, NULL); in wsa_macro_vi_feed_mixer_put()
2640 struct regmap *regmap = wsa->regmap; in wsa_swrm_clock()
2645 ret = clk_prepare_enable(wsa->mclk); in wsa_swrm_clock()
2647 dev_err(wsa->dev, "failed to enable mclk\n"); in wsa_swrm_clock()
2660 clk_disable_unprepare(wsa->mclk); in wsa_swrm_clock()
2673 snd_soc_component_init_regmap(comp, wsa->regmap); in wsa_macro_component_probe()
2675 wsa->spkr_gain_offset = WSA_MACRO_GAIN_OFFSET_M1P5_DB; in wsa_macro_component_probe()
2688 switch (wsa->codec_version) { in wsa_macro_component_probe()
2706 return -EINVAL; in wsa_macro_component_probe()
2727 regmap_read(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
2748 struct device *dev = wsa->dev; in wsa_macro_register_mclk_output()
2754 if (wsa->npl) in wsa_macro_register_mclk_output()
2755 parent_clk_name = __clk_get_name(wsa->npl); in wsa_macro_register_mclk_output()
2757 parent_clk_name = __clk_get_name(wsa->mclk); in wsa_macro_register_mclk_output()
2760 of_property_read_string(dev_of_node(dev), "clock-output-names", in wsa_macro_register_mclk_output()
2766 wsa->hw.init = &init; in wsa_macro_register_mclk_output()
2767 hw = &wsa->hw; in wsa_macro_register_mclk_output()
2768 ret = clk_hw_register(wsa->dev, hw); in wsa_macro_register_mclk_output()
2776 .name = "WSA MACRO",
2788 struct device *dev = &pdev->dev; in wsa_macro_probe()
2798 return -ENOMEM; in wsa_macro_probe()
2800 wsa->macro = devm_clk_get_optional(dev, "macro"); in wsa_macro_probe()
2801 if (IS_ERR(wsa->macro)) in wsa_macro_probe()
2802 return dev_err_probe(dev, PTR_ERR(wsa->macro), "unable to get macro clock\n"); in wsa_macro_probe()
2804 wsa->dcodec = devm_clk_get_optional(dev, "dcodec"); in wsa_macro_probe()
2805 if (IS_ERR(wsa->dcodec)) in wsa_macro_probe()
2806 return dev_err_probe(dev, PTR_ERR(wsa->dcodec), "unable to get dcodec clock\n"); in wsa_macro_probe()
2808 wsa->mclk = devm_clk_get(dev, "mclk"); in wsa_macro_probe()
2809 if (IS_ERR(wsa->mclk)) in wsa_macro_probe()
2810 return dev_err_probe(dev, PTR_ERR(wsa->mclk), "unable to get mclk clock\n"); in wsa_macro_probe()
2813 wsa->npl = devm_clk_get(dev, "npl"); in wsa_macro_probe()
2814 if (IS_ERR(wsa->npl)) in wsa_macro_probe()
2815 return dev_err_probe(dev, PTR_ERR(wsa->npl), "unable to get npl clock\n"); in wsa_macro_probe()
2818 wsa->fsgen = devm_clk_get(dev, "fsgen"); in wsa_macro_probe()
2819 if (IS_ERR(wsa->fsgen)) in wsa_macro_probe()
2820 return dev_err_probe(dev, PTR_ERR(wsa->fsgen), "unable to get fsgen clock\n"); in wsa_macro_probe()
2826 wsa->codec_version = lpass_macro_get_codec_version(); in wsa_macro_probe()
2829 switch (wsa->codec_version) { in wsa_macro_probe()
2835 wsa->reg_layout = &wsa_codec_v2_1; in wsa_macro_probe()
2840 return -ENOMEM; in wsa_macro_probe()
2851 wsa->reg_layout = &wsa_codec_v2_5; in wsa_macro_probe()
2856 return -ENOMEM; in wsa_macro_probe()
2863 dev_err(dev, "Unsupported Codec version (%d)\n", wsa->codec_version); in wsa_macro_probe()
2864 return -EINVAL; in wsa_macro_probe()
2871 return -ENOMEM; in wsa_macro_probe()
2873 reg_config->reg_defaults = reg_defaults; in wsa_macro_probe()
2874 reg_config->num_reg_defaults = def_count; in wsa_macro_probe()
2876 wsa->regmap = devm_regmap_init_mmio(dev, base, reg_config); in wsa_macro_probe()
2877 if (IS_ERR(wsa->regmap)) in wsa_macro_probe()
2878 return PTR_ERR(wsa->regmap); in wsa_macro_probe()
2882 wsa->dev = dev; in wsa_macro_probe()
2885 clk_set_rate(wsa->mclk, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2886 clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2888 ret = clk_prepare_enable(wsa->macro); in wsa_macro_probe()
2892 ret = clk_prepare_enable(wsa->dcodec); in wsa_macro_probe()
2896 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_probe()
2900 ret = clk_prepare_enable(wsa->npl); in wsa_macro_probe()
2904 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_probe()
2909 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2912 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2916 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2938 clk_disable_unprepare(wsa->fsgen); in wsa_macro_probe()
2940 clk_disable_unprepare(wsa->npl); in wsa_macro_probe()
2942 clk_disable_unprepare(wsa->mclk); in wsa_macro_probe()
2944 clk_disable_unprepare(wsa->dcodec); in wsa_macro_probe()
2946 clk_disable_unprepare(wsa->macro); in wsa_macro_probe()
2954 struct wsa_macro *wsa = dev_get_drvdata(&pdev->dev); in wsa_macro_remove()
2956 clk_disable_unprepare(wsa->macro); in wsa_macro_remove()
2957 clk_disable_unprepare(wsa->dcodec); in wsa_macro_remove()
2958 clk_disable_unprepare(wsa->mclk); in wsa_macro_remove()
2959 clk_disable_unprepare(wsa->npl); in wsa_macro_remove()
2960 clk_disable_unprepare(wsa->fsgen); in wsa_macro_remove()
2967 regcache_cache_only(wsa->regmap, true); in wsa_macro_runtime_suspend()
2968 regcache_mark_dirty(wsa->regmap); in wsa_macro_runtime_suspend()
2970 clk_disable_unprepare(wsa->fsgen); in wsa_macro_runtime_suspend()
2971 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_suspend()
2972 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_suspend()
2982 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_runtime_resume()
2988 ret = clk_prepare_enable(wsa->npl); in wsa_macro_runtime_resume()
2994 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_runtime_resume()
3000 regcache_cache_only(wsa->regmap, false); in wsa_macro_runtime_resume()
3001 regcache_sync(wsa->regmap); in wsa_macro_runtime_resume()
3005 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_resume()
3007 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_resume()
3018 .compatible = "qcom,sc7280-lpass-wsa-macro",
3021 .compatible = "qcom,sm8250-lpass-wsa-macro",
3024 .compatible = "qcom,sm8450-lpass-wsa-macro",
3027 .compatible = "qcom,sm8550-lpass-wsa-macro",
3029 .compatible = "qcom,sc8280xp-lpass-wsa-macro",
3047 MODULE_DESCRIPTION("WSA macro driver");