Lines Matching full:wsa
20 #include "lpass-wsa-macro.h"
615 SOC_DAPM_ENUM("WSA RX_MIX EC0_Mux", rx_mix_ec0_enum);
618 SOC_DAPM_ENUM("WSA RX_MIX EC1_Mux", rx_mix_ec1_enum);
621 /* WSA Macro */
886 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_is_rw_register() local
992 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_rw_register()
1031 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_is_readable_register() local
1053 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_readable_register()
1081 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_is_volatile_register() local
1101 if (wsa->codec_version >= LPASS_CODEC_VERSION_2_5) in wsa_is_volatile_register()
1131 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_spkr_mode() local
1133 wsa->spkr_mode = mode; in wsa_macro_set_spkr_mode()
1167 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_prim_interpolator_rate() local
1169 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_prim_interpolator_rate()
1187 wsa->reg_layout->rx_intx_1_mix_inp0_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1189 wsa->reg_layout->rx_intx_1_mix_inp1_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1191 wsa->reg_layout->rx_intx_1_mix_inp2_sel_mask); in wsa_macro_set_prim_interpolator_rate()
1219 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_mix_interpolator_rate() local
1221 for_each_set_bit(port, &wsa->active_ch_mask[dai->id], WSA_MACRO_RX_MAX) { in wsa_macro_set_mix_interpolator_rate()
1232 wsa->reg_layout->rx_intx_2_sel_mask); in wsa_macro_set_mix_interpolator_rate()
1289 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_hw_params() local
1304 wsa->pcm_rate_vi = params_rate(params); in wsa_macro_hw_params()
1318 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_channel_map() local
1323 *tx_slot = wsa->active_ch_mask[dai->id]; in wsa_macro_get_channel_map()
1324 *tx_num = wsa->active_ch_cnt[dai->id]; in wsa_macro_get_channel_map()
1328 for_each_set_bit(temp, &wsa->active_ch_mask[dai->id], in wsa_macro_get_channel_map()
1423 static void wsa_macro_mclk_enable(struct wsa_macro *wsa, bool mclk_enable) in wsa_macro_mclk_enable() argument
1425 struct regmap *regmap = wsa->regmap; in wsa_macro_mclk_enable()
1428 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1442 wsa->wsa_mclk_users++; in wsa_macro_mclk_enable()
1444 if (wsa->wsa_mclk_users <= 0) { in wsa_macro_mclk_enable()
1445 dev_err(wsa->dev, "clock already disabled\n"); in wsa_macro_mclk_enable()
1446 wsa->wsa_mclk_users = 0; in wsa_macro_mclk_enable()
1449 wsa->wsa_mclk_users--; in wsa_macro_mclk_enable()
1450 if (wsa->wsa_mclk_users == 0) { in wsa_macro_mclk_enable()
1511 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_disable_vi_feedback() local
1513 if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) in wsa_macro_enable_disable_vi_feedback()
1518 if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) in wsa_macro_enable_disable_vi_feedback()
1528 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_mclk_event() local
1530 wsa_macro_mclk_enable(wsa, event == SND_SOC_DAPM_PRE_PMU); in wsa_macro_mclk_event()
1539 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_vi_feedback() local
1542 switch (wsa->pcm_rate_vi) { in wsa_macro_enable_vi_feedback()
1655 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_config_compander() local
1657 if (!wsa->comp_enabled[comp]) in wsa_macro_config_compander()
1661 (comp * wsa->reg_layout->compander1_reg_offset); in wsa_macro_config_compander()
1703 struct wsa_macro *wsa, in wsa_macro_enable_softclip_clk() argument
1707 u16 softclip_clk_reg = wsa->reg_layout->softclip0_reg_base + in wsa_macro_enable_softclip_clk()
1708 (path * wsa->reg_layout->softclip1_reg_offset); in wsa_macro_enable_softclip_clk()
1713 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1722 wsa->softclip_clk_users[path]++; in wsa_macro_enable_softclip_clk()
1724 wsa->softclip_clk_users[path]--; in wsa_macro_enable_softclip_clk()
1725 if (wsa->softclip_clk_users[path] == 0) { in wsa_macro_enable_softclip_clk()
1741 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_config_softclip() local
1749 if (!wsa->is_softclip_on[softclip_path]) in wsa_macro_config_softclip()
1753 (softclip_path * wsa->reg_layout->softclip1_reg_offset); in wsa_macro_config_softclip()
1757 wsa_macro_enable_softclip_clk(component, wsa, softclip_path, in wsa_macro_config_softclip()
1768 wsa_macro_enable_softclip_clk(component, wsa, softclip_path, in wsa_macro_config_softclip()
1778 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_adie_lb() local
1786 wsa->reg_layout->rx_intx_1_mix_inp0_sel_mask); in wsa_macro_adie_lb()
1792 wsa->reg_layout->rx_intx_1_mix_inp1_sel_mask); in wsa_macro_adie_lb()
1798 wsa->reg_layout->rx_intx_1_mix_inp2_sel_mask); in wsa_macro_adie_lb()
1853 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_prim_interpolator() local
1859 wsa->prim_int_users[ind]++; in wsa_macro_enable_prim_interpolator()
1860 if (wsa->prim_int_users[ind] == 1) { in wsa_macro_enable_prim_interpolator()
1881 wsa->prim_int_users[ind]--; in wsa_macro_enable_prim_interpolator()
1882 if (wsa->prim_int_users[ind] == 0) { in wsa_macro_enable_prim_interpolator()
1895 struct wsa_macro *wsa, in wsa_macro_config_ear_spkr_gain() argument
1900 switch (wsa->spkr_mode) { in wsa_macro_config_ear_spkr_gain()
1914 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1916 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1918 val = comp_gain_offset + wsa->ear_spkr_gain - 1; in wsa_macro_config_ear_spkr_gain()
1927 if (wsa->comp_enabled[WSA_MACRO_COMP1] && in wsa_macro_config_ear_spkr_gain()
1929 (wsa->ear_spkr_gain != 0)) { in wsa_macro_config_ear_spkr_gain()
1946 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_interpolator() local
1965 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1966 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1967 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
1987 wsa_macro_config_ear_spkr_gain(component, wsa, in wsa_macro_enable_interpolator()
1994 if ((wsa->spkr_gain_offset == WSA_MACRO_GAIN_OFFSET_M1P5_DB) && in wsa_macro_enable_interpolator()
1995 (wsa->comp_enabled[WSA_MACRO_COMP1] || in wsa_macro_enable_interpolator()
1996 wsa->comp_enabled[WSA_MACRO_COMP2])) { in wsa_macro_enable_interpolator()
2014 wsa_macro_config_ear_spkr_gain(component, wsa, in wsa_macro_enable_interpolator()
2078 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_enable_echo() local
2098 if (wsa->ec_hq[ec_tx]) { in wsa_macro_enable_echo()
2119 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_ec_hq() local
2121 ucontrol->value.integer.value[0] = wsa->ec_hq[ec_tx]; in wsa_macro_get_ec_hq()
2132 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_ec_hq() local
2134 wsa->ec_hq[ec_tx] = value; in wsa_macro_set_ec_hq()
2145 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_get_compander() local
2147 ucontrol->value.integer.value[0] = wsa->comp_enabled[comp]; in wsa_macro_get_compander()
2157 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_set_compander() local
2159 wsa->comp_enabled[comp] = value; in wsa_macro_set_compander()
2168 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_ear_spkr_pa_gain_get() local
2170 ucontrol->value.integer.value[0] = wsa->ear_spkr_gain; in wsa_macro_ear_spkr_pa_gain_get()
2179 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_ear_spkr_pa_gain_put() local
2181 wsa->ear_spkr_gain = ucontrol->value.integer.value[0]; in wsa_macro_ear_spkr_pa_gain_put()
2193 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_rx_mux_get() local
2196 wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_get()
2213 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_rx_mux_put() local
2215 aif_rst = wsa->rx_port_value[widget->shift]; in wsa_macro_rx_mux_put()
2224 wsa->rx_port_value[widget->shift] = rx_port_value; in wsa_macro_rx_mux_put()
2235 if (wsa->active_ch_cnt[dai_id]) { in wsa_macro_rx_mux_put()
2236 clear_bit(bit_input, &wsa->active_ch_mask[dai_id]); in wsa_macro_rx_mux_put()
2237 wsa->active_ch_cnt[dai_id]--; in wsa_macro_rx_mux_put()
2244 set_bit(bit_input, &wsa->active_ch_mask[dai_id]); in wsa_macro_rx_mux_put()
2245 wsa->active_ch_cnt[dai_id]++; in wsa_macro_rx_mux_put()
2249 "%s: Invalid AIF_ID for WSA RX MUX %d\n", in wsa_macro_rx_mux_put()
2263 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_soft_clip_enable_get() local
2266 ucontrol->value.integer.value[0] = wsa->is_softclip_on[path]; in wsa_macro_soft_clip_enable_get()
2275 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_soft_clip_enable_put() local
2278 wsa->is_softclip_on[path] = ucontrol->value.integer.value[0]; in wsa_macro_soft_clip_enable_put()
2321 SOC_DAPM_ENUM_EXT("WSA RX0 Mux", rx_mux_enum,
2323 SOC_DAPM_ENUM_EXT("WSA RX1 Mux", rx_mux_enum,
2325 SOC_DAPM_ENUM_EXT("WSA RX_MIX0 Mux", rx_mux_enum,
2327 SOC_DAPM_ENUM_EXT("WSA RX_MIX1 Mux", rx_mux_enum,
2337 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_vi_feed_mixer_get() local
2341 if (test_bit(spk_tx_id, &wsa->active_ch_mask[dai_id])) in wsa_macro_vi_feed_mixer_get()
2355 struct wsa_macro *wsa = snd_soc_component_get_drvdata(component); in wsa_macro_vi_feed_mixer_put() local
2363 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2365 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2366 wsa->active_ch_cnt[dai_id]++; in wsa_macro_vi_feed_mixer_put()
2370 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2372 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2373 wsa->active_ch_cnt[dai_id]++; in wsa_macro_vi_feed_mixer_put()
2378 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2380 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2381 wsa->active_ch_cnt[dai_id]--; in wsa_macro_vi_feed_mixer_put()
2385 &wsa->active_ch_mask[dai_id])) { in wsa_macro_vi_feed_mixer_put()
2387 &wsa->active_ch_mask[dai_id]); in wsa_macro_vi_feed_mixer_put()
2388 wsa->active_ch_cnt[dai_id]--; in wsa_macro_vi_feed_mixer_put()
2406 SND_SOC_DAPM_AIF_IN("WSA AIF1 PB", "WSA_AIF1 Playback", 0,
2408 SND_SOC_DAPM_AIF_IN("WSA AIF_MIX1 PB", "WSA_AIF_MIX1 Playback", 0,
2411 SND_SOC_DAPM_AIF_OUT_E("WSA AIF_VI", "WSA_AIF_VI Capture", 0,
2415 SND_SOC_DAPM_AIF_OUT("WSA AIF_ECHO", "WSA_AIF_ECHO Capture", 0,
2420 SND_SOC_DAPM_MUX_E("WSA RX_MIX EC0_MUX", SND_SOC_NOPM,
2424 SND_SOC_DAPM_MUX_E("WSA RX_MIX EC1_MUX", SND_SOC_NOPM,
2429 SND_SOC_DAPM_MUX("WSA RX0 MUX", SND_SOC_NOPM, WSA_MACRO_RX0, 0,
2431 SND_SOC_DAPM_MUX("WSA RX1 MUX", SND_SOC_NOPM, WSA_MACRO_RX1, 0,
2433 SND_SOC_DAPM_MUX("WSA RX_MIX0 MUX", SND_SOC_NOPM, WSA_MACRO_RX_MIX0, 0,
2435 SND_SOC_DAPM_MUX("WSA RX_MIX1 MUX", SND_SOC_NOPM, WSA_MACRO_RX_MIX1, 0,
2438 SND_SOC_DAPM_MIXER("WSA RX0", SND_SOC_NOPM, 0, 0, NULL, 0),
2439 SND_SOC_DAPM_MIXER("WSA RX1", SND_SOC_NOPM, 0, 0, NULL, 0),
2440 SND_SOC_DAPM_MIXER("WSA RX_MIX0", SND_SOC_NOPM, 0, 0, NULL, 0),
2441 SND_SOC_DAPM_MIXER("WSA RX_MIX1", SND_SOC_NOPM, 0, 0, NULL, 0),
2454 SND_SOC_DAPM_INPUT("WSA SRC0_INP"),
2527 {"WSA AIF_VI", NULL, "WSA_AIF_VI Mixer"},
2528 {"WSA AIF_VI", NULL, "WSA_MCLK"},
2530 {"WSA RX_MIX EC0_MUX", "RX_MIX_TX0", "WSA_RX INT0 SEC MIX"},
2531 {"WSA RX_MIX EC1_MUX", "RX_MIX_TX0", "WSA_RX INT0 SEC MIX"},
2532 {"WSA RX_MIX EC0_MUX", "RX_MIX_TX1", "WSA_RX INT1 SEC MIX"},
2533 {"WSA RX_MIX EC1_MUX", "RX_MIX_TX1", "WSA_RX INT1 SEC MIX"},
2534 {"WSA AIF_ECHO", NULL, "WSA RX_MIX EC0_MUX"},
2535 {"WSA AIF_ECHO", NULL, "WSA RX_MIX EC1_MUX"},
2536 {"WSA AIF_ECHO", NULL, "WSA_MCLK"},
2538 {"WSA AIF1 PB", NULL, "WSA_MCLK"},
2539 {"WSA AIF_MIX1 PB", NULL, "WSA_MCLK"},
2541 {"WSA RX0 MUX", "AIF1_PB", "WSA AIF1 PB"},
2542 {"WSA RX1 MUX", "AIF1_PB", "WSA AIF1 PB"},
2543 {"WSA RX_MIX0 MUX", "AIF1_PB", "WSA AIF1 PB"},
2544 {"WSA RX_MIX1 MUX", "AIF1_PB", "WSA AIF1 PB"},
2546 {"WSA RX0 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2547 {"WSA RX1 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2548 {"WSA RX_MIX0 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2549 {"WSA RX_MIX1 MUX", "AIF_MIX1_PB", "WSA AIF_MIX1 PB"},
2551 {"WSA RX0", NULL, "WSA RX0 MUX"},
2552 {"WSA RX1", NULL, "WSA RX1 MUX"},
2553 {"WSA RX_MIX0", NULL, "WSA RX_MIX0 MUX"},
2554 {"WSA RX_MIX1", NULL, "WSA RX_MIX1 MUX"},
2556 {"WSA RX0", NULL, "WSA_RX0_CLK"},
2557 {"WSA RX1", NULL, "WSA_RX1_CLK"},
2558 {"WSA RX_MIX0", NULL, "WSA_RX_MIX0_CLK"},
2559 {"WSA RX_MIX1", NULL, "WSA_RX_MIX1_CLK"},
2561 {"WSA_RX0 INP0", "RX0", "WSA RX0"},
2562 {"WSA_RX0 INP0", "RX1", "WSA RX1"},
2563 {"WSA_RX0 INP0", "RX_MIX0", "WSA RX_MIX0"},
2564 {"WSA_RX0 INP0", "RX_MIX1", "WSA RX_MIX1"},
2569 {"WSA_RX0 INP1", "RX0", "WSA RX0"},
2570 {"WSA_RX0 INP1", "RX1", "WSA RX1"},
2571 {"WSA_RX0 INP1", "RX_MIX0", "WSA RX_MIX0"},
2572 {"WSA_RX0 INP1", "RX_MIX1", "WSA RX_MIX1"},
2577 {"WSA_RX0 INP2", "RX0", "WSA RX0"},
2578 {"WSA_RX0 INP2", "RX1", "WSA RX1"},
2579 {"WSA_RX0 INP2", "RX_MIX0", "WSA RX_MIX0"},
2580 {"WSA_RX0 INP2", "RX_MIX1", "WSA RX_MIX1"},
2585 {"WSA_RX0 MIX INP", "RX0", "WSA RX0"},
2586 {"WSA_RX0 MIX INP", "RX1", "WSA RX1"},
2587 {"WSA_RX0 MIX INP", "RX_MIX0", "WSA RX_MIX0"},
2588 {"WSA_RX0 MIX INP", "RX_MIX1", "WSA RX_MIX1"},
2593 {"WSA_RX0 INT0 SIDETONE MIX", "SRC0", "WSA SRC0_INP"},
2600 {"WSA_RX1 INP0", "RX0", "WSA RX0"},
2601 {"WSA_RX1 INP0", "RX1", "WSA RX1"},
2602 {"WSA_RX1 INP0", "RX_MIX0", "WSA RX_MIX0"},
2603 {"WSA_RX1 INP0", "RX_MIX1", "WSA RX_MIX1"},
2608 {"WSA_RX1 INP1", "RX0", "WSA RX0"},
2609 {"WSA_RX1 INP1", "RX1", "WSA RX1"},
2610 {"WSA_RX1 INP1", "RX_MIX0", "WSA RX_MIX0"},
2611 {"WSA_RX1 INP1", "RX_MIX1", "WSA RX_MIX1"},
2616 {"WSA_RX1 INP2", "RX0", "WSA RX0"},
2617 {"WSA_RX1 INP2", "RX1", "WSA RX1"},
2618 {"WSA_RX1 INP2", "RX_MIX0", "WSA RX_MIX0"},
2619 {"WSA_RX1 INP2", "RX_MIX1", "WSA RX_MIX1"},
2624 {"WSA_RX1 MIX INP", "RX0", "WSA RX0"},
2625 {"WSA_RX1 MIX INP", "RX1", "WSA RX1"},
2626 {"WSA_RX1 MIX INP", "RX_MIX0", "WSA RX_MIX0"},
2627 {"WSA_RX1 MIX INP", "RX_MIX1", "WSA RX_MIX1"},
2638 static int wsa_swrm_clock(struct wsa_macro *wsa, bool enable) in wsa_swrm_clock() argument
2640 struct regmap *regmap = wsa->regmap; in wsa_swrm_clock()
2645 ret = clk_prepare_enable(wsa->mclk); in wsa_swrm_clock()
2647 dev_err(wsa->dev, "failed to enable mclk\n"); in wsa_swrm_clock()
2650 wsa_macro_mclk_enable(wsa, true); in wsa_swrm_clock()
2659 wsa_macro_mclk_enable(wsa, false); in wsa_swrm_clock()
2660 clk_disable_unprepare(wsa->mclk); in wsa_swrm_clock()
2669 struct wsa_macro *wsa = snd_soc_component_get_drvdata(comp); in wsa_macro_component_probe() local
2673 snd_soc_component_init_regmap(comp, wsa->regmap); in wsa_macro_component_probe()
2675 wsa->spkr_gain_offset = WSA_MACRO_GAIN_OFFSET_M1P5_DB; in wsa_macro_component_probe()
2688 switch (wsa->codec_version) { in wsa_macro_component_probe()
2724 struct wsa_macro *wsa = to_wsa_macro(hw); in swclk_gate_is_enabled() local
2727 regmap_read(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
2746 static int wsa_macro_register_mclk_output(struct wsa_macro *wsa) in wsa_macro_register_mclk_output() argument
2748 struct device *dev = wsa->dev; in wsa_macro_register_mclk_output()
2754 if (wsa->npl) in wsa_macro_register_mclk_output()
2755 parent_clk_name = __clk_get_name(wsa->npl); in wsa_macro_register_mclk_output()
2757 parent_clk_name = __clk_get_name(wsa->mclk); in wsa_macro_register_mclk_output()
2766 wsa->hw.init = &init; in wsa_macro_register_mclk_output()
2767 hw = &wsa->hw; in wsa_macro_register_mclk_output()
2768 ret = clk_hw_register(wsa->dev, hw); in wsa_macro_register_mclk_output()
2776 .name = "WSA MACRO",
2789 struct wsa_macro *wsa; in wsa_macro_probe() local
2796 wsa = devm_kzalloc(dev, sizeof(*wsa), GFP_KERNEL); in wsa_macro_probe()
2797 if (!wsa) in wsa_macro_probe()
2800 wsa->macro = devm_clk_get_optional(dev, "macro"); in wsa_macro_probe()
2801 if (IS_ERR(wsa->macro)) in wsa_macro_probe()
2802 return dev_err_probe(dev, PTR_ERR(wsa->macro), "unable to get macro clock\n"); in wsa_macro_probe()
2804 wsa->dcodec = devm_clk_get_optional(dev, "dcodec"); in wsa_macro_probe()
2805 if (IS_ERR(wsa->dcodec)) in wsa_macro_probe()
2806 return dev_err_probe(dev, PTR_ERR(wsa->dcodec), "unable to get dcodec clock\n"); in wsa_macro_probe()
2808 wsa->mclk = devm_clk_get(dev, "mclk"); in wsa_macro_probe()
2809 if (IS_ERR(wsa->mclk)) in wsa_macro_probe()
2810 return dev_err_probe(dev, PTR_ERR(wsa->mclk), "unable to get mclk clock\n"); in wsa_macro_probe()
2813 wsa->npl = devm_clk_get(dev, "npl"); in wsa_macro_probe()
2814 if (IS_ERR(wsa->npl)) in wsa_macro_probe()
2815 return dev_err_probe(dev, PTR_ERR(wsa->npl), "unable to get npl clock\n"); in wsa_macro_probe()
2818 wsa->fsgen = devm_clk_get(dev, "fsgen"); in wsa_macro_probe()
2819 if (IS_ERR(wsa->fsgen)) in wsa_macro_probe()
2820 return dev_err_probe(dev, PTR_ERR(wsa->fsgen), "unable to get fsgen clock\n"); in wsa_macro_probe()
2826 wsa->codec_version = lpass_macro_get_codec_version(); in wsa_macro_probe()
2829 switch (wsa->codec_version) { in wsa_macro_probe()
2835 wsa->reg_layout = &wsa_codec_v2_1; in wsa_macro_probe()
2851 wsa->reg_layout = &wsa_codec_v2_5; in wsa_macro_probe()
2863 dev_err(dev, "Unsupported Codec version (%d)\n", wsa->codec_version); in wsa_macro_probe()
2876 wsa->regmap = devm_regmap_init_mmio(dev, base, reg_config); in wsa_macro_probe()
2877 if (IS_ERR(wsa->regmap)) in wsa_macro_probe()
2878 return PTR_ERR(wsa->regmap); in wsa_macro_probe()
2880 dev_set_drvdata(dev, wsa); in wsa_macro_probe()
2882 wsa->dev = dev; in wsa_macro_probe()
2885 clk_set_rate(wsa->mclk, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2886 clk_set_rate(wsa->npl, WSA_MACRO_MCLK_FREQ); in wsa_macro_probe()
2888 ret = clk_prepare_enable(wsa->macro); in wsa_macro_probe()
2892 ret = clk_prepare_enable(wsa->dcodec); in wsa_macro_probe()
2896 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_probe()
2900 ret = clk_prepare_enable(wsa->npl); in wsa_macro_probe()
2904 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_probe()
2909 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2912 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2916 regmap_update_bits(wsa->regmap, CDC_WSA_CLK_RST_CTRL_SWR_CONTROL, in wsa_macro_probe()
2931 ret = wsa_macro_register_mclk_output(wsa); in wsa_macro_probe()
2938 clk_disable_unprepare(wsa->fsgen); in wsa_macro_probe()
2940 clk_disable_unprepare(wsa->npl); in wsa_macro_probe()
2942 clk_disable_unprepare(wsa->mclk); in wsa_macro_probe()
2944 clk_disable_unprepare(wsa->dcodec); in wsa_macro_probe()
2946 clk_disable_unprepare(wsa->macro); in wsa_macro_probe()
2954 struct wsa_macro *wsa = dev_get_drvdata(&pdev->dev); in wsa_macro_remove() local
2956 clk_disable_unprepare(wsa->macro); in wsa_macro_remove()
2957 clk_disable_unprepare(wsa->dcodec); in wsa_macro_remove()
2958 clk_disable_unprepare(wsa->mclk); in wsa_macro_remove()
2959 clk_disable_unprepare(wsa->npl); in wsa_macro_remove()
2960 clk_disable_unprepare(wsa->fsgen); in wsa_macro_remove()
2965 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_macro_runtime_suspend() local
2967 regcache_cache_only(wsa->regmap, true); in wsa_macro_runtime_suspend()
2968 regcache_mark_dirty(wsa->regmap); in wsa_macro_runtime_suspend()
2970 clk_disable_unprepare(wsa->fsgen); in wsa_macro_runtime_suspend()
2971 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_suspend()
2972 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_suspend()
2979 struct wsa_macro *wsa = dev_get_drvdata(dev); in wsa_macro_runtime_resume() local
2982 ret = clk_prepare_enable(wsa->mclk); in wsa_macro_runtime_resume()
2988 ret = clk_prepare_enable(wsa->npl); in wsa_macro_runtime_resume()
2994 ret = clk_prepare_enable(wsa->fsgen); in wsa_macro_runtime_resume()
3000 regcache_cache_only(wsa->regmap, false); in wsa_macro_runtime_resume()
3001 regcache_sync(wsa->regmap); in wsa_macro_runtime_resume()
3005 clk_disable_unprepare(wsa->npl); in wsa_macro_runtime_resume()
3007 clk_disable_unprepare(wsa->mclk); in wsa_macro_runtime_resume()
3018 .compatible = "qcom,sc7280-lpass-wsa-macro",
3021 .compatible = "qcom,sm8250-lpass-wsa-macro",
3024 .compatible = "qcom,sm8450-lpass-wsa-macro",
3027 .compatible = "qcom,sm8550-lpass-wsa-macro",
3029 .compatible = "qcom,sc8280xp-lpass-wsa-macro",
3047 MODULE_DESCRIPTION("WSA macro driver");