Lines Matching +full:dmic +full:- +full:init +full:- +full:delay +full:- +full:ms
1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
5 #include <linux/init.h>
12 #include <sound/soc-dapm.h>
15 #include <linux/clk-provider.h>
17 #include "lpass-macro-common.h"
41 /* Default divider for AMIC and DMIC clock: DIV2 */
201 #define TX_ADC_TO_DMIC(n) ((n - TX_ADC_MAX)/2)
291 static const DECLARE_TLV_DB_SCALE(digital_gain, -8400, 100, -8400);
616 struct regmap *regmap = tx->regmap; in tx_macro_mclk_enable()
619 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
631 tx->tx_mclk_users++; in tx_macro_mclk_enable()
633 if (tx->tx_mclk_users <= 0) { in tx_macro_mclk_enable()
634 dev_err(tx->dev, "clock already disabled\n"); in tx_macro_mclk_enable()
635 tx->tx_mclk_users = 0; in tx_macro_mclk_enable()
638 tx->tx_mclk_users--; in tx_macro_mclk_enable()
639 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
658 if (tx->data->ver > LPASS_VER_9_0_0) in is_amic_enabled()
683 tx = hpf_work->tx; in tx_macro_tx_hpf_corner_freq_callback()
684 component = tx->component; in tx_macro_tx_hpf_corner_freq_callback()
685 hpf_cut_off_freq = hpf_work->hpf_cut_off_freq; in tx_macro_tx_hpf_corner_freq_callback()
687 dec_cfg_reg = CDC_TXn_TX_PATH_CFG0(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
688 hpf_gate_reg = CDC_TXn_TX_PATH_SEC2(hpf_work->decimator); in tx_macro_tx_hpf_corner_freq_callback()
690 if (is_amic_enabled(component, tx, hpf_work->decimator)) { in tx_macro_tx_hpf_corner_freq_callback()
709 /* Minimum 1 clk cycle delay is required as per HW spec */ in tx_macro_tx_hpf_corner_freq_callback()
726 tx = tx_mute_dwork->tx; in tx_macro_mute_update_callback()
727 component = tx->component; in tx_macro_mute_update_callback()
728 decimator = tx_mute_dwork->decimator; in tx_macro_mute_update_callback()
737 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_mclk_event()
759 unsigned int dmic; in tx_macro_update_smic_sel_v9() local
768 dmic = TX_ADC_TO_DMIC(val); in tx_macro_update_smic_sel_v9()
769 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_update_smic_sel_v9()
781 unsigned int dmic; in tx_macro_update_smic_sel_v9_2() local
784 if (widget->shift) { in tx_macro_update_smic_sel_v9_2()
785 /* MSM DMIC */ in tx_macro_update_smic_sel_v9_2()
789 dmic = TX_ADC_TO_DMIC(val); in tx_macro_update_smic_sel_v9_2()
790 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_update_smic_sel_v9_2()
804 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_put_dec_enum()
805 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_put_dec_enum()
810 val = ucontrol->value.enumerated.item[0]; in tx_macro_put_dec_enum()
811 if (val >= e->items) in tx_macro_put_dec_enum()
812 return -EINVAL; in tx_macro_put_dec_enum()
814 switch (e->reg) { in tx_macro_put_dec_enum()
840 dev_err(component->dev, "Error in configuration!!\n"); in tx_macro_put_dec_enum()
841 return -EINVAL; in tx_macro_put_dec_enum()
845 if (widget->shift) /* MSM DMIC */ in tx_macro_put_dec_enum()
848 else if (tx->data->ver <= LPASS_VER_9_0_0) in tx_macro_put_dec_enum()
863 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_get()
864 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_get()
865 u32 dai_id = widget->shift; in tx_macro_tx_mixer_get()
866 u32 dec_id = mc->shift; in tx_macro_tx_mixer_get()
869 if (test_bit(dec_id, &tx->active_ch_mask[dai_id])) in tx_macro_tx_mixer_get()
870 ucontrol->value.integer.value[0] = 1; in tx_macro_tx_mixer_get()
872 ucontrol->value.integer.value[0] = 0; in tx_macro_tx_mixer_get()
881 struct snd_soc_component *component = snd_soc_dapm_to_component(widget->dapm); in tx_macro_tx_mixer_put()
883 struct soc_mixer_control *mc = (struct soc_mixer_control *)kcontrol->private_value; in tx_macro_tx_mixer_put()
884 u32 dai_id = widget->shift; in tx_macro_tx_mixer_put()
885 u32 dec_id = mc->shift; in tx_macro_tx_mixer_put()
886 u32 enable = ucontrol->value.integer.value[0]; in tx_macro_tx_mixer_put()
890 if (tx->active_decimator[dai_id] == dec_id) in tx_macro_tx_mixer_put()
893 set_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
894 tx->active_ch_cnt[dai_id]++; in tx_macro_tx_mixer_put()
895 tx->active_decimator[dai_id] = dec_id; in tx_macro_tx_mixer_put()
897 if (tx->active_decimator[dai_id] == -1) in tx_macro_tx_mixer_put()
900 tx->active_ch_cnt[dai_id]--; in tx_macro_tx_mixer_put()
901 clear_bit(dec_id, &tx->active_ch_mask[dai_id]); in tx_macro_tx_mixer_put()
902 tx->active_decimator[dai_id] = -1; in tx_macro_tx_mixer_put()
904 snd_soc_dapm_mixer_update_power(widget->dapm, kcontrol, enable, update); in tx_macro_tx_mixer_put()
912 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in tx_macro_enable_dec()
918 u16 adc_mux_reg, adc_reg, adc_n, dmic; in tx_macro_enable_dec() local
922 decimator = w->shift; in tx_macro_enable_dec()
936 dmic = TX_ADC_TO_DMIC(adc_n); in tx_macro_enable_dec()
937 dmic_clk_reg = CDC_TX_TOP_CSR_SWR_DMICn_CTL(dmic); in tx_macro_enable_dec()
946 tx->dec_mode[decimator]); in tx_macro_enable_dec()
956 /* Minimum 1 clk cycle delay is required as per HW spec */ in tx_macro_enable_dec()
962 tx->tx_hpf_work[decimator].hpf_cut_off_freq = in tx_macro_enable_dec()
976 &tx->tx_mute_dwork[decimator].dwork, in tx_macro_enable_dec()
978 if (tx->tx_hpf_work[decimator].hpf_cut_off_freq != CF_MIN_3DB_150HZ) { in tx_macro_enable_dec()
980 &tx->tx_hpf_work[decimator].dwork, in tx_macro_enable_dec()
997 * 6ms delay is required as per HW spec in tx_macro_enable_dec()
1005 if (tx->bcs_enable) { in tx_macro_enable_dec()
1008 tx->bcs_clk_en = true; in tx_macro_enable_dec()
1013 tx->tx_hpf_work[decimator].hpf_cut_off_freq; in tx_macro_enable_dec()
1017 &tx->tx_hpf_work[decimator].dwork)) { in tx_macro_enable_dec()
1037 * Minimum 1 clk cycle delay is required in tx_macro_enable_dec()
1047 cancel_delayed_work_sync(&tx->tx_mute_dwork[decimator].dwork); in tx_macro_enable_dec()
1056 if (tx->bcs_enable) { in tx_macro_enable_dec()
1063 tx->bcs_clk_en = false; in tx_macro_enable_dec()
1075 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_get()
1076 int path = e->shift_l; in tx_macro_dec_mode_get()
1078 ucontrol->value.integer.value[0] = tx->dec_mode[path]; in tx_macro_dec_mode_get()
1087 int value = ucontrol->value.integer.value[0]; in tx_macro_dec_mode_put()
1088 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in tx_macro_dec_mode_put()
1089 int path = e->shift_l; in tx_macro_dec_mode_put()
1092 if (tx->dec_mode[path] == value) in tx_macro_dec_mode_put()
1095 tx->dec_mode[path] = value; in tx_macro_dec_mode_put()
1106 ucontrol->value.integer.value[0] = tx->bcs_enable; in tx_macro_get_bcs()
1115 int value = ucontrol->value.integer.value[0]; in tx_macro_set_bcs()
1118 tx->bcs_enable = value; in tx_macro_set_bcs()
1127 struct snd_soc_component *component = dai->component; in tx_macro_hw_params()
1157 dev_err(component->dev, "%s: Invalid TX sample rate: %d\n", in tx_macro_hw_params()
1159 return -EINVAL; in tx_macro_hw_params()
1162 for_each_set_bit(decimator, &tx->active_ch_mask[dai->id], TX_MACRO_DEC_MAX) in tx_macro_hw_params()
1173 struct snd_soc_component *component = dai->component; in tx_macro_get_channel_map()
1176 switch (dai->id) { in tx_macro_get_channel_map()
1180 *tx_slot = tx->active_ch_mask[dai->id]; in tx_macro_get_channel_map()
1181 *tx_num = tx->active_ch_cnt[dai->id]; in tx_macro_get_channel_map()
1191 struct snd_soc_component *component = dai->component; in tx_macro_digital_mute()
1196 if (tx->active_decimator[dai->id] == -1) in tx_macro_digital_mute()
1199 decimator = tx->active_decimator[dai->id]; in tx_macro_digital_mute()
1439 SND_SOC_DAPM_MUX("TX DMIC MUX0", SND_SOC_NOPM, 4, 0, &tx_dmic0_mux),
1440 SND_SOC_DAPM_MUX("TX DMIC MUX1", SND_SOC_NOPM, 4, 0, &tx_dmic1_mux),
1441 SND_SOC_DAPM_MUX("TX DMIC MUX2", SND_SOC_NOPM, 4, 0, &tx_dmic2_mux),
1442 SND_SOC_DAPM_MUX("TX DMIC MUX3", SND_SOC_NOPM, 4, 0, &tx_dmic3_mux),
1443 SND_SOC_DAPM_MUX("TX DMIC MUX4", SND_SOC_NOPM, 4, 0, &tx_dmic4_mux),
1444 SND_SOC_DAPM_MUX("TX DMIC MUX5", SND_SOC_NOPM, 4, 0, &tx_dmic5_mux),
1445 SND_SOC_DAPM_MUX("TX DMIC MUX6", SND_SOC_NOPM, 4, 0, &tx_dmic6_mux),
1446 SND_SOC_DAPM_MUX("TX DMIC MUX7", SND_SOC_NOPM, 4, 0, &tx_dmic7_mux),
1559 {"TX DEC0 MUX", "MSM_DMIC", "TX DMIC MUX0"},
1560 {"TX DMIC MUX0", "DMIC0", "TX DMIC0"},
1561 {"TX DMIC MUX0", "DMIC1", "TX DMIC1"},
1562 {"TX DMIC MUX0", "DMIC2", "TX DMIC2"},
1563 {"TX DMIC MUX0", "DMIC3", "TX DMIC3"},
1564 {"TX DMIC MUX0", "DMIC4", "TX DMIC4"},
1565 {"TX DMIC MUX0", "DMIC5", "TX DMIC5"},
1566 {"TX DMIC MUX0", "DMIC6", "TX DMIC6"},
1567 {"TX DMIC MUX0", "DMIC7", "TX DMIC7"},
1569 {"TX DEC1 MUX", "MSM_DMIC", "TX DMIC MUX1"},
1570 {"TX DMIC MUX1", "DMIC0", "TX DMIC0"},
1571 {"TX DMIC MUX1", "DMIC1", "TX DMIC1"},
1572 {"TX DMIC MUX1", "DMIC2", "TX DMIC2"},
1573 {"TX DMIC MUX1", "DMIC3", "TX DMIC3"},
1574 {"TX DMIC MUX1", "DMIC4", "TX DMIC4"},
1575 {"TX DMIC MUX1", "DMIC5", "TX DMIC5"},
1576 {"TX DMIC MUX1", "DMIC6", "TX DMIC6"},
1577 {"TX DMIC MUX1", "DMIC7", "TX DMIC7"},
1579 {"TX DEC2 MUX", "MSM_DMIC", "TX DMIC MUX2"},
1580 {"TX DMIC MUX2", "DMIC0", "TX DMIC0"},
1581 {"TX DMIC MUX2", "DMIC1", "TX DMIC1"},
1582 {"TX DMIC MUX2", "DMIC2", "TX DMIC2"},
1583 {"TX DMIC MUX2", "DMIC3", "TX DMIC3"},
1584 {"TX DMIC MUX2", "DMIC4", "TX DMIC4"},
1585 {"TX DMIC MUX2", "DMIC5", "TX DMIC5"},
1586 {"TX DMIC MUX2", "DMIC6", "TX DMIC6"},
1587 {"TX DMIC MUX2", "DMIC7", "TX DMIC7"},
1589 {"TX DEC3 MUX", "MSM_DMIC", "TX DMIC MUX3"},
1590 {"TX DMIC MUX3", "DMIC0", "TX DMIC0"},
1591 {"TX DMIC MUX3", "DMIC1", "TX DMIC1"},
1592 {"TX DMIC MUX3", "DMIC2", "TX DMIC2"},
1593 {"TX DMIC MUX3", "DMIC3", "TX DMIC3"},
1594 {"TX DMIC MUX3", "DMIC4", "TX DMIC4"},
1595 {"TX DMIC MUX3", "DMIC5", "TX DMIC5"},
1596 {"TX DMIC MUX3", "DMIC6", "TX DMIC6"},
1597 {"TX DMIC MUX3", "DMIC7", "TX DMIC7"},
1599 {"TX DEC4 MUX", "MSM_DMIC", "TX DMIC MUX4"},
1600 {"TX DMIC MUX4", "DMIC0", "TX DMIC0"},
1601 {"TX DMIC MUX4", "DMIC1", "TX DMIC1"},
1602 {"TX DMIC MUX4", "DMIC2", "TX DMIC2"},
1603 {"TX DMIC MUX4", "DMIC3", "TX DMIC3"},
1604 {"TX DMIC MUX4", "DMIC4", "TX DMIC4"},
1605 {"TX DMIC MUX4", "DMIC5", "TX DMIC5"},
1606 {"TX DMIC MUX4", "DMIC6", "TX DMIC6"},
1607 {"TX DMIC MUX4", "DMIC7", "TX DMIC7"},
1609 {"TX DEC5 MUX", "MSM_DMIC", "TX DMIC MUX5"},
1610 {"TX DMIC MUX5", "DMIC0", "TX DMIC0"},
1611 {"TX DMIC MUX5", "DMIC1", "TX DMIC1"},
1612 {"TX DMIC MUX5", "DMIC2", "TX DMIC2"},
1613 {"TX DMIC MUX5", "DMIC3", "TX DMIC3"},
1614 {"TX DMIC MUX5", "DMIC4", "TX DMIC4"},
1615 {"TX DMIC MUX5", "DMIC5", "TX DMIC5"},
1616 {"TX DMIC MUX5", "DMIC6", "TX DMIC6"},
1617 {"TX DMIC MUX5", "DMIC7", "TX DMIC7"},
1619 {"TX DEC6 MUX", "MSM_DMIC", "TX DMIC MUX6"},
1620 {"TX DMIC MUX6", "DMIC0", "TX DMIC0"},
1621 {"TX DMIC MUX6", "DMIC1", "TX DMIC1"},
1622 {"TX DMIC MUX6", "DMIC2", "TX DMIC2"},
1623 {"TX DMIC MUX6", "DMIC3", "TX DMIC3"},
1624 {"TX DMIC MUX6", "DMIC4", "TX DMIC4"},
1625 {"TX DMIC MUX6", "DMIC5", "TX DMIC5"},
1626 {"TX DMIC MUX6", "DMIC6", "TX DMIC6"},
1627 {"TX DMIC MUX6", "DMIC7", "TX DMIC7"},
1629 {"TX DEC7 MUX", "MSM_DMIC", "TX DMIC MUX7"},
1630 {"TX DMIC MUX7", "DMIC0", "TX DMIC0"},
1631 {"TX DMIC MUX7", "DMIC1", "TX DMIC1"},
1632 {"TX DMIC MUX7", "DMIC2", "TX DMIC2"},
1633 {"TX DMIC MUX7", "DMIC3", "TX DMIC3"},
1634 {"TX DMIC MUX7", "DMIC4", "TX DMIC4"},
1635 {"TX DMIC MUX7", "DMIC5", "TX DMIC5"},
1636 {"TX DMIC MUX7", "DMIC6", "TX DMIC6"},
1637 {"TX DMIC MUX7", "DMIC7", "TX DMIC7"},
2031 -84, 40, digital_gain),
2034 -84, 40, digital_gain),
2037 -84, 40, digital_gain),
2040 -84, 40, digital_gain),
2043 -84, 40, digital_gain),
2046 -84, 40, digital_gain),
2049 -84, 40, digital_gain),
2052 -84, 40, digital_gain),
2088 if (tx->data->extra_widgets_num) { in tx_macro_component_extend()
2089 ret = snd_soc_dapm_new_controls(dapm, tx->data->extra_widgets, in tx_macro_component_extend()
2090 tx->data->extra_widgets_num); in tx_macro_component_extend()
2092 dev_err(tx->dev, "failed to add extra widgets: %d\n", ret); in tx_macro_component_extend()
2097 if (tx->data->extra_routes_num) { in tx_macro_component_extend()
2098 ret = snd_soc_dapm_add_routes(dapm, tx->data->extra_routes, in tx_macro_component_extend()
2099 tx->data->extra_routes_num); in tx_macro_component_extend()
2101 dev_err(tx->dev, "failed to add extra routes: %d\n", ret); in tx_macro_component_extend()
2118 snd_soc_component_init_regmap(comp, tx->regmap); in tx_macro_component_probe()
2121 tx->tx_hpf_work[i].tx = tx; in tx_macro_component_probe()
2122 tx->tx_hpf_work[i].decimator = i; in tx_macro_component_probe()
2123 INIT_DELAYED_WORK(&tx->tx_hpf_work[i].dwork, in tx_macro_component_probe()
2128 tx->tx_mute_dwork[i].tx = tx; in tx_macro_component_probe()
2129 tx->tx_mute_dwork[i].decimator = i; in tx_macro_component_probe()
2130 INIT_DELAYED_WORK(&tx->tx_mute_dwork[i].dwork, in tx_macro_component_probe()
2133 tx->component = comp; in tx_macro_component_probe()
2149 struct regmap *regmap = tx->regmap; in swclk_gate_enable()
2152 ret = clk_prepare_enable(tx->mclk); in swclk_gate_enable()
2154 dev_err(tx->dev, "failed to enable mclk\n"); in swclk_gate_enable()
2169 struct regmap *regmap = tx->regmap; in swclk_gate_disable()
2175 clk_disable_unprepare(tx->mclk); in swclk_gate_disable()
2183 regmap_read(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, &val); in swclk_gate_is_enabled()
2205 struct device *dev = tx->dev; in tx_macro_register_mclk_output()
2207 const char *clk_name = "lpass-tx-mclk"; in tx_macro_register_mclk_output()
2209 struct clk_init_data init; in tx_macro_register_mclk_output() local
2212 if (tx->npl) in tx_macro_register_mclk_output()
2213 parent_clk_name = __clk_get_name(tx->npl); in tx_macro_register_mclk_output()
2215 parent_clk_name = __clk_get_name(tx->mclk); in tx_macro_register_mclk_output()
2217 init.name = clk_name; in tx_macro_register_mclk_output()
2218 init.ops = &swclk_gate_ops; in tx_macro_register_mclk_output()
2219 init.flags = 0; in tx_macro_register_mclk_output()
2220 init.parent_names = &parent_clk_name; in tx_macro_register_mclk_output()
2221 init.num_parents = 1; in tx_macro_register_mclk_output()
2222 tx->hw.init = &init; in tx_macro_register_mclk_output()
2223 hw = &tx->hw; in tx_macro_register_mclk_output()
2232 .name = "TX-MACRO",
2244 struct device *dev = &pdev->dev; in tx_macro_probe()
2245 struct device_node *np = dev->of_node; in tx_macro_probe()
2252 return -ENOMEM; in tx_macro_probe()
2254 tx->data = device_get_match_data(dev); in tx_macro_probe()
2256 tx->macro = devm_clk_get_optional(dev, "macro"); in tx_macro_probe()
2257 if (IS_ERR(tx->macro)) in tx_macro_probe()
2258 return dev_err_probe(dev, PTR_ERR(tx->macro), "unable to get macro clock\n"); in tx_macro_probe()
2260 tx->dcodec = devm_clk_get_optional(dev, "dcodec"); in tx_macro_probe()
2261 if (IS_ERR(tx->dcodec)) in tx_macro_probe()
2262 return dev_err_probe(dev, PTR_ERR(tx->dcodec), "unable to get dcodec clock\n"); in tx_macro_probe()
2264 tx->mclk = devm_clk_get(dev, "mclk"); in tx_macro_probe()
2265 if (IS_ERR(tx->mclk)) in tx_macro_probe()
2266 return dev_err_probe(dev, PTR_ERR(tx->mclk), "unable to get mclk clock\n"); in tx_macro_probe()
2268 if (tx->data->flags & LPASS_MACRO_FLAG_HAS_NPL_CLOCK) { in tx_macro_probe()
2269 tx->npl = devm_clk_get(dev, "npl"); in tx_macro_probe()
2270 if (IS_ERR(tx->npl)) in tx_macro_probe()
2271 return dev_err_probe(dev, PTR_ERR(tx->npl), "unable to get npl clock\n"); in tx_macro_probe()
2274 tx->fsgen = devm_clk_get(dev, "fsgen"); in tx_macro_probe()
2275 if (IS_ERR(tx->fsgen)) in tx_macro_probe()
2276 return dev_err_probe(dev, PTR_ERR(tx->fsgen), "unable to get fsgen clock\n"); in tx_macro_probe()
2278 tx->pds = lpass_macro_pds_init(dev); in tx_macro_probe()
2279 if (IS_ERR(tx->pds)) in tx_macro_probe()
2280 return PTR_ERR(tx->pds); in tx_macro_probe()
2289 if (of_device_is_compatible(np, "qcom,sc7280-lpass-tx-macro")) { in tx_macro_probe()
2302 tx->regmap = devm_regmap_init_mmio(dev, base, &tx_regmap_config); in tx_macro_probe()
2303 if (IS_ERR(tx->regmap)) { in tx_macro_probe()
2304 ret = PTR_ERR(tx->regmap); in tx_macro_probe()
2310 tx->dev = dev; in tx_macro_probe()
2313 tx->active_decimator[TX_MACRO_AIF1_CAP] = -1; in tx_macro_probe()
2314 tx->active_decimator[TX_MACRO_AIF2_CAP] = -1; in tx_macro_probe()
2315 tx->active_decimator[TX_MACRO_AIF3_CAP] = -1; in tx_macro_probe()
2318 clk_set_rate(tx->mclk, MCLK_FREQ); in tx_macro_probe()
2319 clk_set_rate(tx->npl, MCLK_FREQ); in tx_macro_probe()
2321 ret = clk_prepare_enable(tx->macro); in tx_macro_probe()
2325 ret = clk_prepare_enable(tx->dcodec); in tx_macro_probe()
2329 ret = clk_prepare_enable(tx->mclk); in tx_macro_probe()
2333 ret = clk_prepare_enable(tx->npl); in tx_macro_probe()
2337 ret = clk_prepare_enable(tx->fsgen); in tx_macro_probe()
2343 if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR) in tx_macro_probe()
2344 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2347 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2351 if (tx->data->flags & LPASS_MACRO_FLAG_RESET_SWR) in tx_macro_probe()
2352 regmap_update_bits(tx->regmap, CDC_TX_CLK_RST_CTRL_SWR_CONTROL, in tx_macro_probe()
2374 clk_disable_unprepare(tx->fsgen); in tx_macro_probe()
2376 clk_disable_unprepare(tx->npl); in tx_macro_probe()
2378 clk_disable_unprepare(tx->mclk); in tx_macro_probe()
2380 clk_disable_unprepare(tx->dcodec); in tx_macro_probe()
2382 clk_disable_unprepare(tx->macro); in tx_macro_probe()
2384 lpass_macro_pds_exit(tx->pds); in tx_macro_probe()
2391 struct tx_macro *tx = dev_get_drvdata(&pdev->dev); in tx_macro_remove()
2393 clk_disable_unprepare(tx->macro); in tx_macro_remove()
2394 clk_disable_unprepare(tx->dcodec); in tx_macro_remove()
2395 clk_disable_unprepare(tx->mclk); in tx_macro_remove()
2396 clk_disable_unprepare(tx->npl); in tx_macro_remove()
2397 clk_disable_unprepare(tx->fsgen); in tx_macro_remove()
2399 lpass_macro_pds_exit(tx->pds); in tx_macro_remove()
2406 regcache_cache_only(tx->regmap, true); in tx_macro_runtime_suspend()
2407 regcache_mark_dirty(tx->regmap); in tx_macro_runtime_suspend()
2409 clk_disable_unprepare(tx->fsgen); in tx_macro_runtime_suspend()
2410 clk_disable_unprepare(tx->npl); in tx_macro_runtime_suspend()
2411 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_suspend()
2421 ret = clk_prepare_enable(tx->mclk); in tx_macro_runtime_resume()
2427 ret = clk_prepare_enable(tx->npl); in tx_macro_runtime_resume()
2433 ret = clk_prepare_enable(tx->fsgen); in tx_macro_runtime_resume()
2439 regcache_cache_only(tx->regmap, false); in tx_macro_runtime_resume()
2440 regcache_sync(tx->regmap); in tx_macro_runtime_resume()
2444 clk_disable_unprepare(tx->npl); in tx_macro_runtime_resume()
2446 clk_disable_unprepare(tx->mclk); in tx_macro_runtime_resume()
2501 .compatible = "qcom,sc7280-lpass-tx-macro",
2504 .compatible = "qcom,sm6115-lpass-tx-macro",
2507 .compatible = "qcom,sm8250-lpass-tx-macro",
2510 .compatible = "qcom,sm8450-lpass-tx-macro",
2513 .compatible = "qcom,sm8550-lpass-tx-macro",
2516 .compatible = "qcom,sc8280xp-lpass-tx-macro",