Lines Matching full:rx2
681 "ZERO", "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
685 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
695 "RX0", "RX1", "RX2", "RX3", "RX4", "RX5"
1863 * CDC_DMA_RX_1 port drives RX2/RX3 -- ch_mask 0x1/0x2/0x3 in rx_macro_get_channel_map()
3170 SND_SOC_DAPM_MUX("RX_MACRO RX2 MUX", SND_SOC_NOPM, RX_MACRO_RX2, 0,
3307 {"RX_MACRO RX2 MUX", "AIF1_PB", "RX AIF1 PB"},
3314 {"RX_MACRO RX2 MUX", "AIF2_PB", "RX AIF2 PB"},
3321 {"RX_MACRO RX2 MUX", "AIF3_PB", "RX AIF3 PB"},
3328 {"RX_MACRO RX2 MUX", "AIF4_PB", "RX AIF4 PB"},
3335 {"RX_RX2", NULL, "RX_MACRO RX2 MUX"},
3342 {"RX INT0_1 MIX1 INP0", "RX2", "RX_RX2"},
3352 {"RX INT0_1 MIX1 INP1", "RX2", "RX_RX2"},
3362 {"RX INT0_1 MIX1 INP2", "RX2", "RX_RX2"},
3373 {"RX INT1_1 MIX1 INP0", "RX2", "RX_RX2"},
3383 {"RX INT1_1 MIX1 INP1", "RX2", "RX_RX2"},
3393 {"RX INT1_1 MIX1 INP2", "RX2", "RX_RX2"},
3404 {"RX INT2_1 MIX1 INP0", "RX2", "RX_RX2"},
3414 {"RX INT2_1 MIX1 INP1", "RX2", "RX_RX2"},
3424 {"RX INT2_1 MIX1 INP2", "RX2", "RX_RX2"},
3460 {"RX INT0_2 MUX", "RX2", "RX_RX2"},
3470 {"RX INT1_2 MUX", "RX2", "RX_RX2"},
3480 {"RX INT2_2 MUX", "RX2", "RX_RX2"},
3519 {"IIR0 INP0 MUX", "RX2", "RX_RX2"},
3530 {"IIR0 INP1 MUX", "RX2", "RX_RX2"},
3541 {"IIR0 INP2 MUX", "RX2", "RX_RX2"},
3552 {"IIR0 INP3 MUX", "RX2", "RX_RX2"},
3565 {"IIR1 INP0 MUX", "RX2", "RX_RX2"},
3576 {"IIR1 INP1 MUX", "RX2", "RX_RX2"},
3587 {"IIR1 INP2 MUX", "RX2", "RX_RX2"},
3598 {"IIR1 INP3 MUX", "RX2", "RX_RX2"},