Lines Matching defs:IIR0
580 IIR0 = 0,
685 "ZERO", "DEC0", "DEC1", "IIR0", "IIR1", "RX0", "RX1", "RX2",
2843 if (strnstr(w->name, "IIR0", sizeof("IIR0"))) {
3044 SOC_SINGLE_S8_TLV("IIR0 INP0 Volume",
3047 SOC_SINGLE_S8_TLV("IIR0 INP1 Volume",
3050 SOC_SINGLE_S8_TLV("IIR0 INP2 Volume",
3053 SOC_SINGLE_S8_TLV("IIR0 INP3 Volume",
3090 RX_MACRO_IIR_FILTER_CTL("IIR0 Band1", IIR0, BAND1),
3091 RX_MACRO_IIR_FILTER_CTL("IIR0 Band2", IIR0, BAND2),
3092 RX_MACRO_IIR_FILTER_CTL("IIR0 Band3", IIR0, BAND3),
3093 RX_MACRO_IIR_FILTER_CTL("IIR0 Band4", IIR0, BAND4),
3094 RX_MACRO_IIR_FILTER_CTL("IIR0 Band5", IIR0, BAND5),
3186 SND_SOC_DAPM_MUX("IIR0 INP0 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp0_mux),
3187 SND_SOC_DAPM_MUX("IIR0 INP1 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp1_mux),
3188 SND_SOC_DAPM_MUX("IIR0 INP2 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp2_mux),
3189 SND_SOC_DAPM_MUX("IIR0 INP3 MUX", SND_SOC_NOPM, 0, 0, &iir0_inp3_mux),
3208 SND_SOC_DAPM_MIXER_E("IIR0", CDC_RX_SIDETONE_IIR0_IIR_PATH_CTL,
3346 {"RX INT0_1 MIX1 INP0", "IIR0", "IIR0"},
3356 {"RX INT0_1 MIX1 INP1", "IIR0", "IIR0"},
3366 {"RX INT0_1 MIX1 INP2", "IIR0", "IIR0"},
3377 {"RX INT1_1 MIX1 INP0", "IIR0", "IIR0"},
3387 {"RX INT1_1 MIX1 INP1", "IIR0", "IIR0"},
3397 {"RX INT1_1 MIX1 INP2", "IIR0", "IIR0"},
3408 {"RX INT2_1 MIX1 INP0", "IIR0", "IIR0"},
3418 {"RX INT2_1 MIX1 INP1", "IIR0", "IIR0"},
3428 {"RX INT2_1 MIX1 INP2", "IIR0", "IIR0"},
3511 {"IIR0", NULL, "RX_MCLK"},
3512 {"IIR0", NULL, "IIR0 INP0 MUX"},
3513 {"IIR0 INP0 MUX", "DEC0", "RX_TX DEC0_INP"},
3514 {"IIR0 INP0 MUX", "DEC1", "RX_TX DEC1_INP"},
3515 {"IIR0 INP0 MUX", "DEC2", "RX_TX DEC2_INP"},
3516 {"IIR0 INP0 MUX", "DEC3", "RX_TX DEC3_INP"},
3517 {"IIR0 INP0 MUX", "RX0", "RX_RX0"},
3518 {"IIR0 INP0 MUX", "RX1", "RX_RX1"},
3519 {"IIR0 INP0 MUX", "RX2", "RX_RX2"},
3520 {"IIR0 INP0 MUX", "RX3", "RX_RX3"},
3521 {"IIR0 INP0 MUX", "RX4", "RX_RX4"},
3522 {"IIR0 INP0 MUX", "RX5", "RX_RX5"},
3523 {"IIR0", NULL, "IIR0 INP1 MUX"},
3524 {"IIR0 INP1 MUX", "DEC0", "RX_TX DEC0_INP"},
3525 {"IIR0 INP1 MUX", "DEC1", "RX_TX DEC1_INP"},
3526 {"IIR0 INP1 MUX", "DEC2", "RX_TX DEC2_INP"},
3527 {"IIR0 INP1 MUX", "DEC3", "RX_TX DEC3_INP"},
3528 {"IIR0 INP1 MUX", "RX0", "RX_RX0"},
3529 {"IIR0 INP1 MUX", "RX1", "RX_RX1"},
3530 {"IIR0 INP1 MUX", "RX2", "RX_RX2"},
3531 {"IIR0 INP1 MUX", "RX3", "RX_RX3"},
3532 {"IIR0 INP1 MUX", "RX4", "RX_RX4"},
3533 {"IIR0 INP1 MUX", "RX5", "RX_RX5"},
3534 {"IIR0", NULL, "IIR0 INP2 MUX"},
3535 {"IIR0 INP2 MUX", "DEC0", "RX_TX DEC0_INP"},
3536 {"IIR0 INP2 MUX", "DEC1", "RX_TX DEC1_INP"},
3537 {"IIR0 INP2 MUX", "DEC2", "RX_TX DEC2_INP"},
3538 {"IIR0 INP2 MUX", "DEC3", "RX_TX DEC3_INP"},
3539 {"IIR0 INP2 MUX", "RX0", "RX_RX0"},
3540 {"IIR0 INP2 MUX", "RX1", "RX_RX1"},
3541 {"IIR0 INP2 MUX", "RX2", "RX_RX2"},
3542 {"IIR0 INP2 MUX", "RX3", "RX_RX3"},
3543 {"IIR0 INP2 MUX", "RX4", "RX_RX4"},
3544 {"IIR0 INP2 MUX", "RX5", "RX_RX5"},
3545 {"IIR0", NULL, "IIR0 INP3 MUX"},
3546 {"IIR0 INP3 MUX", "DEC0", "RX_TX DEC0_INP"},
3547 {"IIR0 INP3 MUX", "DEC1", "RX_TX DEC1_INP"},
3548 {"IIR0 INP3 MUX", "DEC2", "RX_TX DEC2_INP"},
3549 {"IIR0 INP3 MUX", "DEC3", "RX_TX DEC3_INP"},
3550 {"IIR0 INP3 MUX", "RX0", "RX_RX0"},
3551 {"IIR0 INP3 MUX", "RX1", "RX_RX1"},
3552 {"IIR0 INP3 MUX", "RX2", "RX_RX2"},
3553 {"IIR0 INP3 MUX", "RX3", "RX_RX3"},
3554 {"IIR0 INP3 MUX", "RX4", "RX_RX4"},
3555 {"IIR0 INP3 MUX", "RX5", "RX_RX5"},
3603 {"SRC0", NULL, "IIR0"},