Lines Matching +full:dmic +full:- +full:freq
1 // SPDX-License-Identifier: GPL-2.0-only
3 * es8375.c -- ES8375 ALSA SoC Audio Codec
7 * Authors: Michael Zhang (zhangyi@everest-semi.com)
42 static const DECLARE_TLV_DB_SCALE(es8375_adc_osr_gain_tlv, -3100, 100, 0);
43 static const DECLARE_TLV_DB_SCALE(es8375_adc_volume_tlv, -9550, 50, 0);
46 static const DECLARE_TLV_DB_SCALE(es8375_dac_volume_tlv, -9550, 50, 0);
47 static const DECLARE_TLV_DB_SCALE(es8375_dac_vppscale_tlv, -388, 12, 0);
49 static const DECLARE_TLV_DB_SCALE(es8375_automute_ng_tlv, -9600, 600, 0);
100 "DMIC",
115 SOC_ENUM("DMIC Polarity", es8375_dmic_pol),
116 SOC_SINGLE_TLV("DMIC Volume", ES8375_ADC1,
158 SND_SOC_DAPM_INPUT("DMIC"),
174 {"ADC MUX", "DMIC", "DMIC"},
266 static inline int get_coeff(u8 vddd, u8 dmic, int mclk, int rate) in get_coeff() argument
274 dmic_det = ~(coeff_div[i].dmic_sel ^ dmic) & 0x01; in get_coeff()
283 return -EINVAL; in get_coeff()
289 struct snd_soc_component *component = dai->component; in es8375_hw_params()
296 if (es8375->mclk_src == ES8375_BCLK_PIN) { in es8375_hw_params()
297 regmap_update_bits(es8375->regmap, in es8375_hw_params()
300 es8375->mclk_freq = 2 * (unsigned int)par_width * params_rate(params); in es8375_hw_params()
303 regmap_read(es8375->regmap, ES8375_ADC1, ®v); in es8375_hw_params()
306 ret = regulator_get_voltage(es8375->core_supply[ES8375_SUPPLY_VD].consumer); in es8375_hw_params()
309 es8375->vddd = ES8375_1V8; in es8375_hw_params()
312 es8375->vddd = ES8375_3V3; in es8375_hw_params()
315 es8375->vddd = ES8375_3V3; in es8375_hw_params()
319 coeff = get_coeff(es8375->vddd, dmic_enable, es8375->mclk_freq, params_rate(params)); in es8375_hw_params()
321 dev_warn(component->dev, "Clock coefficients do not match"); in es8375_hw_params()
324 regmap_write(es8375->regmap, ES8375_CLK_MGR4, in es8375_hw_params()
326 regmap_write(es8375->regmap, ES8375_CLK_MGR5, in es8375_hw_params()
328 regmap_write(es8375->regmap, ES8375_CLK_MGR6, in es8375_hw_params()
330 regmap_write(es8375->regmap, ES8375_CLK_MGR7, in es8375_hw_params()
332 regmap_write(es8375->regmap, ES8375_CLK_MGR8, in es8375_hw_params()
334 regmap_write(es8375->regmap, ES8375_CLK_MGR9, in es8375_hw_params()
336 regmap_write(es8375->regmap, ES8375_CLK_MGR10, in es8375_hw_params()
338 regmap_write(es8375->regmap, ES8375_CLK_MGR11, in es8375_hw_params()
340 regmap_write(es8375->regmap, ES8375_ADC_OSR_GAIN, in es8375_hw_params()
357 regmap_update_bits(es8375->regmap, ES8375_SDP, 0x1c, iface); in es8375_hw_params()
363 unsigned int freq, int dir) in es8375_set_sysclk() argument
365 struct snd_soc_component *component = dai->component; in es8375_set_sysclk()
368 es8375->mclk_freq = freq; in es8375_set_sysclk()
375 struct snd_soc_component *component = dai->component; in es8375_set_dai_fmt()
379 regmap_read(es8375->regmap, ES8375_SDP, &codeciface); in es8375_set_dai_fmt()
383 es8375->mastermode = 1; in es8375_set_dai_fmt()
384 regmap_update_bits(es8375->regmap, ES8375_RESET1, in es8375_set_dai_fmt()
388 es8375->mastermode = 0; in es8375_set_dai_fmt()
389 regmap_update_bits(es8375->regmap, ES8375_RESET1, in es8375_set_dai_fmt()
393 return -EINVAL; in es8375_set_dai_fmt()
401 return -EINVAL; in es8375_set_dai_fmt()
415 return -EINVAL; in es8375_set_dai_fmt()
418 regmap_read(es8375->regmap, ES8375_CLK_MGR3, &iface); in es8375_set_dai_fmt()
438 return -EINVAL; in es8375_set_dai_fmt()
441 regmap_write(es8375->regmap, ES8375_CLK_MGR3, iface); in es8375_set_dai_fmt()
442 regmap_write(es8375->regmap, ES8375_SDP, codeciface); in es8375_set_dai_fmt()
455 ret = clk_prepare_enable(es8375->mclk); in es8375_set_bias_level()
457 dev_err(component->dev, "unable to prepare mclk\n"); in es8375_set_bias_level()
460 regmap_write(es8375->regmap, ES8375_CSM1, 0xA6); in es8375_set_bias_level()
465 regmap_write(es8375->regmap, ES8375_CSM1, 0x96); in es8375_set_bias_level()
466 clk_disable_unprepare(es8375->mclk); in es8375_set_bias_level()
476 struct snd_soc_component *component = dai->component; in es8375_mute()
481 regmap_update_bits(es8375->regmap, ES8375_SDP, 0x40, 0x40); in es8375_mute()
483 regmap_update_bits(es8375->regmap, ES8375_SDP2, 0x20, 0x20); in es8375_mute()
486 regmap_update_bits(es8375->regmap, ES8375_SDP, 0x40, 0x00); in es8375_mute()
488 regmap_update_bits(es8375->regmap, ES8375_SDP2, 0x20, 0x00); in es8375_mute()
530 regmap_write(es8375->regmap, ES8375_CLK_MGR10, 0x95); in es8375_init()
531 regmap_write(es8375->regmap, ES8375_CLK_MGR3, 0x48); in es8375_init()
532 regmap_write(es8375->regmap, ES8375_DIV_SPKCLK, 0x18); in es8375_init()
533 regmap_write(es8375->regmap, ES8375_CLK_MGR4, 0x02); in es8375_init()
534 regmap_write(es8375->regmap, ES8375_CLK_MGR5, 0x05); in es8375_init()
535 regmap_write(es8375->regmap, ES8375_CSM1, 0x82); in es8375_init()
536 regmap_write(es8375->regmap, ES8375_VMID_CHARGE2, 0x20); in es8375_init()
537 regmap_write(es8375->regmap, ES8375_VMID_CHARGE3, 0x20); in es8375_init()
538 regmap_write(es8375->regmap, ES8375_DAC_CAL, 0x28); in es8375_init()
539 regmap_write(es8375->regmap, ES8375_ANALOG_SPK1, 0xFC); in es8375_init()
540 regmap_write(es8375->regmap, ES8375_ANALOG_SPK2, 0xE0); in es8375_init()
541 regmap_write(es8375->regmap, ES8375_VMID_SEL, 0xFE); in es8375_init()
542 regmap_write(es8375->regmap, ES8375_ANALOG1, 0xB8); in es8375_init()
543 regmap_write(es8375->regmap, ES8375_SYS_CTRL2, 0x03); in es8375_init()
544 regmap_write(es8375->regmap, ES8375_CLK_MGR2, 0x16); in es8375_init()
545 regmap_write(es8375->regmap, ES8375_RESET1, 0x00); in es8375_init()
547 regmap_write(es8375->regmap, ES8375_CLK_MGR3, 0x00); in es8375_init()
548 regmap_write(es8375->regmap, ES8375_CSM1, 0x86); in es8375_init()
549 regmap_write(es8375->regmap, ES8375_CLK_MGR4, 0x0B); in es8375_init()
550 regmap_write(es8375->regmap, ES8375_CLK_MGR5, 0x00); in es8375_init()
551 regmap_write(es8375->regmap, ES8375_CLK_MGR6, 0x31); in es8375_init()
552 regmap_write(es8375->regmap, ES8375_CLK_MGR7, 0x11); in es8375_init()
553 regmap_write(es8375->regmap, ES8375_CLK_MGR8, 0x1F); in es8375_init()
554 regmap_write(es8375->regmap, ES8375_CLK_MGR9, 0x00); in es8375_init()
555 regmap_write(es8375->regmap, ES8375_ADC_OSR_GAIN, 0x1F); in es8375_init()
556 regmap_write(es8375->regmap, ES8375_ADC2, 0x00); in es8375_init()
557 regmap_write(es8375->regmap, ES8375_DAC2, 0x00); in es8375_init()
558 regmap_write(es8375->regmap, ES8375_DAC_OTP, 0x88); in es8375_init()
559 regmap_write(es8375->regmap, ES8375_ANALOG_SPK2, 0xE7); in es8375_init()
560 regmap_write(es8375->regmap, ES8375_ANALOG2, 0xF0); in es8375_init()
561 regmap_write(es8375->regmap, ES8375_ANALOG3, 0x40); in es8375_init()
562 regmap_write(es8375->regmap, ES8375_CLK_MGR2, 0xFE); in es8375_init()
564 regmap_update_bits(es8375->regmap, ES8375_SDP, 0x40, 0x40); in es8375_init()
565 regmap_update_bits(es8375->regmap, ES8375_SDP2, 0x20, 0x20); in es8375_init()
572 regmap_write(es8375->regmap, ES8375_CSM1, 0x96); in es8375_suspend()
573 regcache_cache_only(es8375->regmap, true); in es8375_suspend()
574 regcache_mark_dirty(es8375->regmap); in es8375_suspend()
583 regcache_cache_only(es8375->regmap, false); in es8375_resume()
584 regcache_cache_bypass(es8375->regmap, true); in es8375_resume()
585 regmap_read(es8375->regmap, ES8375_CLK_MGR2, ®); in es8375_resume()
586 regcache_cache_bypass(es8375->regmap, false); in es8375_resume()
593 regcache_sync(es8375->regmap); in es8375_resume()
602 es8375->mastermode = 0; in es8375_codec_probe()
653 ret = device_property_read_u8(dev, "everest,mclk-src", &es8375->mclk_src); in es8375_read_device_properities()
655 es8375->mclk_src = ES8375_MCLK_SOURCE; in es8375_read_device_properities()
656 dev_dbg(dev, "mclk-src %x", es8375->mclk_src); in es8375_read_device_properities()
659 es8375->core_supply[i].supply = es8375_core_supplies[i]; in es8375_read_device_properities()
660 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(es8375_core_supplies), es8375->core_supply); in es8375_read_device_properities()
666 es8375->mclk = devm_clk_get(dev, "mclk"); in es8375_read_device_properities()
667 if (IS_ERR(es8375->mclk)) in es8375_read_device_properities()
668 return dev_err_probe(dev, PTR_ERR(es8375->mclk), "unable to get mclk\n"); in es8375_read_device_properities()
670 if (!es8375->mclk) in es8375_read_device_properities()
673 ret = clk_prepare_enable(es8375->mclk); in es8375_read_device_properities()
678 ret = regulator_bulk_enable(ARRAY_SIZE(es8375_core_supplies), es8375->core_supply); in es8375_read_device_properities()
681 clk_disable_unprepare(es8375->mclk); in es8375_read_device_properities()
691 struct device *dev = &i2c_client->dev; in es8375_i2c_probe()
695 es8375 = devm_kzalloc(&i2c_client->dev, sizeof(*es8375), GFP_KERNEL); in es8375_i2c_probe()
697 return -ENOMEM; in es8375_i2c_probe()
699 es8375->regmap = devm_regmap_init_i2c(i2c_client, in es8375_i2c_probe()
701 if (IS_ERR(es8375->regmap)) in es8375_i2c_probe()
702 return dev_err_probe(&i2c_client->dev, PTR_ERR(es8375->regmap), in es8375_i2c_probe()
707 ret = regmap_read(es8375->regmap, ES8375_CHIP_ID1, &val); in es8375_i2c_probe()
709 dev_err(&i2c_client->dev, "failed to read i2c at addr %X\n", in es8375_i2c_probe()
710 i2c_client->addr); in es8375_i2c_probe()
715 dev_err(&i2c_client->dev, "device at addr %X is not an es8375\n", in es8375_i2c_probe()
716 i2c_client->addr); in es8375_i2c_probe()
717 return -ENODEV; in es8375_i2c_probe()
720 ret = regmap_read(es8375->regmap, ES8375_CHIP_ID0, &val); in es8375_i2c_probe()
722 dev_err(&i2c_client->dev, "device at addr %X is not an es8375\n", in es8375_i2c_probe()
723 i2c_client->addr); in es8375_i2c_probe()
724 return -ENODEV; in es8375_i2c_probe()
729 dev_err(&i2c_client->dev, "get an error from dts info %X\n", ret); in es8375_i2c_probe()
733 return devm_snd_soc_register_component(&i2c_client->dev, &es8375_codec_driver, in es8375_i2c_probe()
743 regmap_write(es8375->regmap, ES8375_CSM1, 0x3C); in es8375_i2c_shutdown()
744 regmap_write(es8375->regmap, ES8375_CLK_MGR3, 0x48); in es8375_i2c_shutdown()
745 regmap_write(es8375->regmap, ES8375_CSM2, 0x80); in es8375_i2c_shutdown()
746 regmap_write(es8375->regmap, ES8375_CSM1, 0x3E); in es8375_i2c_shutdown()
747 regmap_write(es8375->regmap, ES8375_CLK_MGR10, 0x15); in es8375_i2c_shutdown()
748 regmap_write(es8375->regmap, ES8375_SYS_CTRL2, 0x0C); in es8375_i2c_shutdown()
749 regmap_write(es8375->regmap, ES8375_RESET1, 0x00); in es8375_i2c_shutdown()
750 regmap_write(es8375->regmap, ES8375_CSM2, 0x00); in es8375_i2c_shutdown()
752 regulator_bulk_disable(ARRAY_SIZE(es8375_core_supplies), es8375->core_supply); in es8375_i2c_shutdown()
753 clk_disable_unprepare(es8375->mclk); in es8375_i2c_shutdown()
793 MODULE_AUTHOR("Michael Zhang <zhangyi@everest-semi.com>");