Lines Matching defs:dai_clk_mode
1326 u8 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_64;
1350 dai_clk_mode = DA7213_DAI_BCLKS_PER_WCLK_32; /* 32bit for 1ch and 2ch */
1412 DA7213_DAI_BCLKS_PER_WCLK_MASK, dai_clk_mode);
1425 u8 dai_clk_mode = 0, dai_ctrl = 0;
1449 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1452 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1455 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1467 dai_clk_mode |= DA7213_DAI_CLK_POL_INV;
1470 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV |
1476 dai_clk_mode |= DA7213_DAI_WCLK_POL_INV;
1514 dai_clk_mode |= DA7213_DAI_BCLKS_PER_WCLK_64;
1519 dai_clk_mode);