Lines Matching +full:vlc +full:- +full:supply
30 "VLC",
52 /* -127.5dB to 0dB with step of 0.5dB */
53 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
54 /* -64dB to 24dB with step of 0.5dB */
55 static const DECLARE_TLV_DB_SCALE(adc_tlv, -6400, 50, 0);
57 static const char *const cs42xx8_adc_single[] = { "Differential", "Single-Ended" };
82 CS42XX8_VOLAIN2, 0, -0x80, 0x30, 7, 0, adc_tlv),
84 CS42XX8_VOLAIN4, 0, -0x80, 0x30, 7, 0, adc_tlv),
91 SOC_SINGLE("ADC High-Pass Filter Switch", CS42XX8_ADCCTL, 7, 1, 1),
92 SOC_SINGLE("DAC De-emphasis Switch", CS42XX8_ADCCTL, 5, 1, 0),
105 CS42XX8_VOLAIN6, 0, -0x80, 0x30, 7, 0, adc_tlv),
205 struct snd_soc_component *component = codec_dai->component; in cs42xx8_set_dai_sysclk()
208 cs42xx8->sysclk = freq; in cs42xx8_set_dai_sysclk()
216 struct snd_soc_component *component = codec_dai->component; in cs42xx8_set_dai_fmt()
235 dev_err(component->dev, "unsupported dai format\n"); in cs42xx8_set_dai_fmt()
236 return -EINVAL; in cs42xx8_set_dai_fmt()
239 regmap_update_bits(cs42xx8->regmap, CS42XX8_INTF, in cs42xx8_set_dai_fmt()
246 cs42xx8->slave_mode = true; in cs42xx8_set_dai_fmt()
249 cs42xx8->slave_mode = false; in cs42xx8_set_dai_fmt()
252 dev_err(component->dev, "unsupported master/slave mode\n"); in cs42xx8_set_dai_fmt()
253 return -EINVAL; in cs42xx8_set_dai_fmt()
263 struct snd_soc_component *component = dai->component; in cs42xx8_hw_params()
265 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in cs42xx8_hw_params()
273 cs42xx8->tx_channels = params_channels(params); in cs42xx8_hw_params()
276 rate[!tx] = cs42xx8->rate[!tx]; in cs42xx8_hw_params()
278 ratio[tx] = rate[tx] > 0 ? cs42xx8->sysclk / rate[tx] : 0; in cs42xx8_hw_params()
279 ratio[!tx] = rate[!tx] > 0 ? cs42xx8->sysclk / rate[!tx] : 0; in cs42xx8_hw_params()
283 if (cs42xx8->slave_mode) { in cs42xx8_hw_params()
293 dev_err(component->dev, in cs42xx8_hw_params()
295 return -EINVAL; in cs42xx8_hw_params()
307 cs42xx8->sysclk >= cs42xx8_ratios[i].min_mclk && in cs42xx8_hw_params()
308 cs42xx8->sysclk <= cs42xx8_ratios[i].max_mclk; in cs42xx8_hw_params()
332 dev_err(component->dev, "unsupported sysclk ratio\n"); in cs42xx8_hw_params()
333 return -EINVAL; in cs42xx8_hw_params()
336 cs42xx8->rate[tx] = params_rate(params); in cs42xx8_hw_params()
341 regmap_update_bits(cs42xx8->regmap, CS42XX8_FUNCMOD, in cs42xx8_hw_params()
351 struct snd_soc_component *component = dai->component; in cs42xx8_hw_free()
353 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; in cs42xx8_hw_free()
356 cs42xx8->rate[tx] = 0; in cs42xx8_hw_free()
358 regmap_update_bits(cs42xx8->regmap, CS42XX8_FUNCMOD, in cs42xx8_hw_free()
366 struct snd_soc_component *component = dai->component; in cs42xx8_mute()
368 u8 dac_unmute = cs42xx8->tx_channels ? in cs42xx8_mute()
369 ~((0x1 << cs42xx8->tx_channels) - 1) : 0; in cs42xx8_mute()
371 regmap_write(cs42xx8->regmap, CS42XX8_DACMUTE, in cs42xx8_mute()
407 { 0x05, 0x00 }, /* ADC Control & DAC De-Emphasis */
470 switch (cs42xx8->drvdata->num_adcs) { in cs42xx8_component_probe()
484 regmap_write(cs42xx8->regmap, CS42XX8_DACMUTE, CS42XX8_DACMUTE_ALL); in cs42xx8_component_probe()
526 return -ENOMEM; in cs42xx8_probe()
530 cs42xx8->regmap = regmap; in cs42xx8_probe()
532 cs42xx8->drvdata = drvdata; in cs42xx8_probe()
534 cs42xx8->gpiod_reset = devm_gpiod_get_optional(dev, "reset", in cs42xx8_probe()
536 if (IS_ERR(cs42xx8->gpiod_reset)) in cs42xx8_probe()
537 return PTR_ERR(cs42xx8->gpiod_reset); in cs42xx8_probe()
539 gpiod_set_value_cansleep(cs42xx8->gpiod_reset, 0); in cs42xx8_probe()
541 cs42xx8->clk = devm_clk_get(dev, "mclk"); in cs42xx8_probe()
542 if (IS_ERR(cs42xx8->clk)) { in cs42xx8_probe()
544 PTR_ERR(cs42xx8->clk)); in cs42xx8_probe()
545 return -EINVAL; in cs42xx8_probe()
548 cs42xx8->sysclk = clk_get_rate(cs42xx8->clk); in cs42xx8_probe()
550 for (i = 0; i < ARRAY_SIZE(cs42xx8->supplies); i++) in cs42xx8_probe()
551 cs42xx8->supplies[i].supply = cs42xx8_supply_names[i]; in cs42xx8_probe()
554 ARRAY_SIZE(cs42xx8->supplies), cs42xx8->supplies); in cs42xx8_probe()
560 ret = regulator_bulk_enable(ARRAY_SIZE(cs42xx8->supplies), in cs42xx8_probe()
561 cs42xx8->supplies); in cs42xx8_probe()
571 ret = regmap_read(cs42xx8->regmap, CS42XX8_CHIPID, &val); in cs42xx8_probe()
581 ret = -EINVAL; in cs42xx8_probe()
588 cs42xx8_dai.name = cs42xx8->drvdata->name; in cs42xx8_probe()
591 cs42xx8_dai.capture.channels_max = cs42xx8->drvdata->num_adcs * 2; in cs42xx8_probe()
599 regcache_cache_only(cs42xx8->regmap, true); in cs42xx8_probe()
602 regulator_bulk_disable(ARRAY_SIZE(cs42xx8->supplies), in cs42xx8_probe()
603 cs42xx8->supplies); in cs42xx8_probe()
615 ret = clk_prepare_enable(cs42xx8->clk); in cs42xx8_runtime_resume()
621 gpiod_set_value_cansleep(cs42xx8->gpiod_reset, 0); in cs42xx8_runtime_resume()
623 ret = regulator_bulk_enable(ARRAY_SIZE(cs42xx8->supplies), in cs42xx8_runtime_resume()
624 cs42xx8->supplies); in cs42xx8_runtime_resume()
633 regcache_cache_only(cs42xx8->regmap, false); in cs42xx8_runtime_resume()
634 regcache_mark_dirty(cs42xx8->regmap); in cs42xx8_runtime_resume()
636 ret = regcache_sync(cs42xx8->regmap); in cs42xx8_runtime_resume()
645 regulator_bulk_disable(ARRAY_SIZE(cs42xx8->supplies), in cs42xx8_runtime_resume()
646 cs42xx8->supplies); in cs42xx8_runtime_resume()
648 clk_disable_unprepare(cs42xx8->clk); in cs42xx8_runtime_resume()
657 regcache_cache_only(cs42xx8->regmap, true); in cs42xx8_runtime_suspend()
659 regulator_bulk_disable(ARRAY_SIZE(cs42xx8->supplies), in cs42xx8_runtime_suspend()
660 cs42xx8->supplies); in cs42xx8_runtime_suspend()
662 gpiod_set_value_cansleep(cs42xx8->gpiod_reset, 1); in cs42xx8_runtime_suspend()
664 clk_disable_unprepare(cs42xx8->clk); in cs42xx8_runtime_suspend()