Lines Matching +full:dmic +full:- +full:freq

1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs42l73.c -- CS42L73 ALSA Soc Audio driver
25 #include <sound/soc-dapm.h>
47 { 6, 0xF1 }, /* r06 - Power Ctl 1 */
48 { 7, 0xDF }, /* r07 - Power Ctl 2 */
49 { 8, 0x3F }, /* r08 - Power Ctl 3 */
50 { 9, 0x50 }, /* r09 - Charge Pump Freq */
51 { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */
52 { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */
53 { 12, 0x00 }, /* r0C - Aux PCM Ctl */
54 { 13, 0x15 }, /* r0D - Aux PCM Master Clock Ctl */
55 { 14, 0x00 }, /* r0E - Audio PCM Ctl */
56 { 15, 0x15 }, /* r0F - Audio PCM Master Clock Ctl */
57 { 16, 0x00 }, /* r10 - Voice PCM Ctl */
58 { 17, 0x15 }, /* r11 - Voice PCM Master Clock Ctl */
59 { 18, 0x00 }, /* r12 - Voice/Aux Sample Rate */
60 { 19, 0x06 }, /* r13 - Misc I/O Path Ctl */
61 { 20, 0x00 }, /* r14 - ADC Input Path Ctl */
62 { 21, 0x00 }, /* r15 - MICA Preamp, PGA Volume */
63 { 22, 0x00 }, /* r16 - MICB Preamp, PGA Volume */
64 { 23, 0x00 }, /* r17 - Input Path A Digital Volume */
65 { 24, 0x00 }, /* r18 - Input Path B Digital Volume */
66 { 25, 0x00 }, /* r19 - Playback Digital Ctl */
67 { 26, 0x00 }, /* r1A - HP/LO Left Digital Volume */
68 { 27, 0x00 }, /* r1B - HP/LO Right Digital Volume */
69 { 28, 0x00 }, /* r1C - Speakerphone Digital Volume */
70 { 29, 0x00 }, /* r1D - Ear/SPKLO Digital Volume */
71 { 30, 0x00 }, /* r1E - HP Left Analog Volume */
72 { 31, 0x00 }, /* r1F - HP Right Analog Volume */
73 { 32, 0x00 }, /* r20 - LO Left Analog Volume */
74 { 33, 0x00 }, /* r21 - LO Right Analog Volume */
75 { 34, 0x00 }, /* r22 - Stereo Input Path Advisory Volume */
76 { 35, 0x00 }, /* r23 - Aux PCM Input Advisory Volume */
77 { 36, 0x00 }, /* r24 - Audio PCM Input Advisory Volume */
78 { 37, 0x00 }, /* r25 - Voice PCM Input Advisory Volume */
79 { 38, 0x00 }, /* r26 - Limiter Attack Rate HP/LO */
80 { 39, 0x7F }, /* r27 - Limter Ctl, Release Rate HP/LO */
81 { 40, 0x00 }, /* r28 - Limter Threshold HP/LO */
82 { 41, 0x00 }, /* r29 - Limiter Attack Rate Speakerphone */
83 { 42, 0x3F }, /* r2A - Limter Ctl, Release Rate Speakerphone */
84 { 43, 0x00 }, /* r2B - Limter Threshold Speakerphone */
85 { 44, 0x00 }, /* r2C - Limiter Attack Rate Ear/SPKLO */
86 { 45, 0x3F }, /* r2D - Limter Ctl, Release Rate Ear/SPKLO */
87 { 46, 0x00 }, /* r2E - Limter Threshold Ear/SPKLO */
88 { 47, 0x00 }, /* r2F - ALC Enable, Attack Rate Left/Right */
89 { 48, 0x3F }, /* r30 - ALC Release Rate Left/Right */
90 { 49, 0x00 }, /* r31 - ALC Threshold Left/Right */
91 { 50, 0x00 }, /* r32 - Noise Gate Ctl Left/Right */
92 { 51, 0x00 }, /* r33 - ALC/NG Misc Ctl */
93 { 52, 0x18 }, /* r34 - Mixer Ctl */
94 { 53, 0x3F }, /* r35 - HP/LO Left Mixer Input Path Volume */
95 { 54, 0x3F }, /* r36 - HP/LO Right Mixer Input Path Volume */
96 { 55, 0x3F }, /* r37 - HP/LO Left Mixer Aux PCM Volume */
97 { 56, 0x3F }, /* r38 - HP/LO Right Mixer Aux PCM Volume */
98 { 57, 0x3F }, /* r39 - HP/LO Left Mixer Audio PCM Volume */
99 { 58, 0x3F }, /* r3A - HP/LO Right Mixer Audio PCM Volume */
100 { 59, 0x3F }, /* r3B - HP/LO Left Mixer Voice PCM Mono Volume */
101 { 60, 0x3F }, /* r3C - HP/LO Right Mixer Voice PCM Mono Volume */
102 { 61, 0x3F }, /* r3D - Aux PCM Left Mixer Input Path Volume */
103 { 62, 0x3F }, /* r3E - Aux PCM Right Mixer Input Path Volume */
104 { 63, 0x3F }, /* r3F - Aux PCM Left Mixer Volume */
105 { 64, 0x3F }, /* r40 - Aux PCM Left Mixer Volume */
106 { 65, 0x3F }, /* r41 - Aux PCM Left Mixer Audio PCM L Volume */
107 { 66, 0x3F }, /* r42 - Aux PCM Right Mixer Audio PCM R Volume */
108 { 67, 0x3F }, /* r43 - Aux PCM Left Mixer Voice PCM Volume */
109 { 68, 0x3F }, /* r44 - Aux PCM Right Mixer Voice PCM Volume */
110 { 69, 0x3F }, /* r45 - Audio PCM Left Input Path Volume */
111 { 70, 0x3F }, /* r46 - Audio PCM Right Input Path Volume */
112 { 71, 0x3F }, /* r47 - Audio PCM Left Mixer Aux PCM L Volume */
113 { 72, 0x3F }, /* r48 - Audio PCM Right Mixer Aux PCM R Volume */
114 { 73, 0x3F }, /* r49 - Audio PCM Left Mixer Volume */
115 { 74, 0x3F }, /* r4A - Audio PCM Right Mixer Volume */
116 { 75, 0x3F }, /* r4B - Audio PCM Left Mixer Voice PCM Volume */
117 { 76, 0x3F }, /* r4C - Audio PCM Right Mixer Voice PCM Volume */
118 { 77, 0x3F }, /* r4D - Voice PCM Left Input Path Volume */
119 { 78, 0x3F }, /* r4E - Voice PCM Right Input Path Volume */
120 { 79, 0x3F }, /* r4F - Voice PCM Left Mixer Aux PCM L Volume */
121 { 80, 0x3F }, /* r50 - Voice PCM Right Mixer Aux PCM R Volume */
122 { 81, 0x3F }, /* r51 - Voice PCM Left Mixer Audio PCM L Volume */
123 { 82, 0x3F }, /* r52 - Voice PCM Right Mixer Audio PCM R Volume */
124 { 83, 0x3F }, /* r53 - Voice PCM Left Mixer Voice PCM Volume */
125 { 84, 0x3F }, /* r54 - Voice PCM Right Mixer Voice PCM Volume */
126 { 85, 0xAA }, /* r55 - Mono Mixer Ctl */
127 { 86, 0x3F }, /* r56 - SPK Mono Mixer Input Path Volume */
128 { 87, 0x3F }, /* r57 - SPK Mono Mixer Aux PCM Mono/L/R Volume */
129 { 88, 0x3F }, /* r58 - SPK Mono Mixer Audio PCM Mono/L/R Volume */
130 { 89, 0x3F }, /* r59 - SPK Mono Mixer Voice PCM Mono Volume */
131 { 90, 0x3F }, /* r5A - SPKLO Mono Mixer Input Path Mono Volume */
132 { 91, 0x3F }, /* r5B - SPKLO Mono Mixer Aux Mono/L/R Volume */
133 { 92, 0x3F }, /* r5C - SPKLO Mono Mixer Audio Mono/L/R Volume */
134 { 93, 0x3F }, /* r5D - SPKLO Mono Mixer Voice Mono Volume */
135 { 94, 0x00 }, /* r5E - Interrupt Mask 1 */
136 { 95, 0x00 }, /* r5F - Interrupt Mask 2 */
162 0, 13, TLV_DB_SCALE_ITEM(-7600, 200, 0),
163 14, 75, TLV_DB_SCALE_ITEM(-4900, 100, 0)
168 static DECLARE_TLV_DB_SCALE(hl_tlv, -10200, 50, 0);
170 static DECLARE_TLV_DB_SCALE(ipd_tlv, -9600, 100, 0);
172 static DECLARE_TLV_DB_SCALE(micpga_tlv, -600, 50, 0);
175 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0),
176 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0)
179 static const DECLARE_TLV_DB_SCALE(attn_tlv, -6300, 100, 1);
201 SOC_DAPM_SINGLE("DMIC Left Input", CS42L73_PWRCTL1,
208 SOC_DAPM_SINGLE("DMIC Right Input", CS42L73_PWRCTL1,
261 "Stereo", "Mono A", "Mono B", "Swap A-B"};
339 SOC_SINGLE("PGA Soft-Ramp Switch", CS42L73_MIOPC, 3, 1, 0),
341 SOC_SINGLE("Digital Soft-Ramp Switch", CS42L73_MIOPC, 1, 1, 0),
342 SOC_SINGLE("Analog Output Soft-Ramp Switch", CS42L73_MIOPC, 0, 1, 0),
405 SOC_DOUBLE_R_TLV("XSP-IP Volume",
408 SOC_DOUBLE_R_TLV("XSP-XSP Volume",
411 SOC_DOUBLE_R_TLV("XSP-ASP Volume",
414 SOC_DOUBLE_R_TLV("XSP-VSP Volume",
418 SOC_DOUBLE_R_TLV("ASP-IP Volume",
421 SOC_DOUBLE_R_TLV("ASP-XSP Volume",
424 SOC_DOUBLE_R_TLV("ASP-ASP Volume",
427 SOC_DOUBLE_R_TLV("ASP-VSP Volume",
431 SOC_DOUBLE_R_TLV("VSP-IP Volume",
434 SOC_DOUBLE_R_TLV("VSP-XSP Volume",
437 SOC_DOUBLE_R_TLV("VSP-ASP Volume",
440 SOC_DOUBLE_R_TLV("VSP-VSP Volume",
444 SOC_DOUBLE_R_TLV("HL-IP Volume",
447 SOC_DOUBLE_R_TLV("HL-XSP Volume",
450 SOC_DOUBLE_R_TLV("HL-ASP Volume",
453 SOC_DOUBLE_R_TLV("HL-VSP Volume",
457 SOC_SINGLE_TLV("SPK-IP Mono Volume",
459 SOC_SINGLE_TLV("SPK-XSP Mono Volume",
461 SOC_SINGLE_TLV("SPK-ASP Mono Volume",
463 SOC_SINGLE_TLV("SPK-VSP Mono Volume",
466 SOC_SINGLE_TLV("ESL-IP Mono Volume",
468 SOC_SINGLE_TLV("ESL-XSP Mono Volume",
470 SOC_SINGLE_TLV("ESL-ASP Mono Volume",
472 SOC_SINGLE_TLV("ESL-VSP Mono Volume",
484 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l73_spklo_spk_amp_event()
489 priv->shutdwn_delay = 150; in cs42l73_spklo_spk_amp_event()
500 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l73_ear_amp_event()
505 if (priv->shutdwn_delay < 50) in cs42l73_ear_amp_event()
506 priv->shutdwn_delay = 50; in cs42l73_ear_amp_event()
518 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l73_hp_amp_event()
523 if (priv->shutdwn_delay < 30) in cs42l73_hp_amp_event()
524 priv->shutdwn_delay = 30; in cs42l73_hp_amp_event()
561 SND_SOC_DAPM_ADC("DMIC Left", NULL, CS42L73_PWRCTL1, 6, 1),
562 SND_SOC_DAPM_ADC("DMIC Right", NULL, CS42L73_PWRCTL1, 4, 1),
600 SND_SOC_DAPM_MUX("ESL-XSP Mux", SND_SOC_NOPM,
603 SND_SOC_DAPM_MUX("ESL-ASP Mux", SND_SOC_NOPM,
606 SND_SOC_DAPM_MUX("SPK-ASP Mux", SND_SOC_NOPM,
609 SND_SOC_DAPM_MUX("SPK-XSP Mux", SND_SOC_NOPM,
650 {"ESL DAC", "ESL-ASP Mono Volume", "ESL Mixer"},
651 {"ESL DAC", "ESL-XSP Mono Volume", "ESL Mixer"},
652 {"ESL DAC", "ESL-VSP Mono Volume", "VSPINOUT"},
654 {"ESL DAC", "ESL-IP Mono Volume", "Input Left Capture"},
655 {"ESL DAC", "ESL-IP Mono Volume", "Input Right Capture"},
657 {"ESL Mixer", NULL, "ESL-ASP Mux"},
658 {"ESL Mixer", NULL, "ESL-XSP Mux"},
660 {"ESL-ASP Mux", "Left", "ASPINL"},
661 {"ESL-ASP Mux", "Right", "ASPINR"},
662 {"ESL-ASP Mux", "Mono Mix", "ASPINM"},
664 {"ESL-XSP Mux", "Left", "XSPINL"},
665 {"ESL-XSP Mux", "Right", "XSPINR"},
666 {"ESL-XSP Mux", "Mono Mix", "XSPINM"},
672 {"SPK DAC", "SPK-ASP Mono Volume", "SPK Mixer"},
673 {"SPK DAC", "SPK-XSP Mono Volume", "SPK Mixer"},
674 {"SPK DAC", "SPK-VSP Mono Volume", "VSPINOUT"},
676 {"SPK DAC", "SPK-IP Mono Volume", "Input Left Capture"},
677 {"SPK DAC", "SPK-IP Mono Volume", "Input Right Capture"},
679 {"SPK Mixer", NULL, "SPK-ASP Mux"},
680 {"SPK Mixer", NULL, "SPK-XSP Mux"},
682 {"SPK-ASP Mux", "Left", "ASPINL"},
683 {"SPK-ASP Mux", "Mono Mix", "ASPINM"},
684 {"SPK-ASP Mux", "Right", "ASPINR"},
686 {"SPK-XSP Mux", "Left", "XSPINL"},
687 {"SPK-XSP Mux", "Mono Mix", "XSPINM"},
688 {"SPK-XSP Mux", "Right", "XSPINR"},
701 {"HL Left DAC", "HL-XSP Volume", "HL Left Mixer"},
702 {"HL Right DAC", "HL-XSP Volume", "HL Right Mixer"},
703 {"HL Left DAC", "HL-ASP Volume", "HL Left Mixer"},
704 {"HL Right DAC", "HL-ASP Volume", "HL Right Mixer"},
705 {"HL Left DAC", "HL-VSP Volume", "HL Left Mixer"},
706 {"HL Right DAC", "HL-VSP Volume", "HL Right Mixer"},
708 {"HL Left DAC", "HL-IP Volume", "HL Left Mixer"},
709 {"HL Right DAC", "HL-IP Volume", "HL Right Mixer"},
742 {"DMIC Left", NULL, "DMICA"},
743 {"DMIC Right", NULL, "DMICB"},
747 {"Input Left Capture", "DMIC Left Input", "DMIC Left"},
748 {"Input Right Capture", "DMIC Right Input", "DMIC Right"},
754 {"ASPOUTL", "ASP-IP Volume", "ASPL Output Mixer"},
755 {"ASPOUTR", "ASP-IP Volume", "ASPR Output Mixer"},
761 {"XSPOUTL", "XSP-IP Volume", "XSPL Output Mixer"},
762 {"XSPOUTR", "XSP-IP Volume", "XSPR Output Mixer"},
771 {"VSPINOUT", "VSP-IP Volume", "VSP Output Mixer"},
860 return -EINVAL; in cs42l73_get_mclkx_coeff()
872 return -EINVAL; in cs42l73_get_mclk_coeff()
876 static int cs42l73_set_mclk(struct snd_soc_dai *dai, unsigned int freq) in cs42l73_set_mclk() argument
878 struct snd_soc_component *component = dai->component; in cs42l73_set_mclk()
885 /* MCLKX -> MCLK */ in cs42l73_set_mclk()
886 mclkx_coeff = cs42l73_get_mclkx_coeff(freq); in cs42l73_set_mclk()
893 dev_dbg(component->dev, "MCLK%u %u <-> internal MCLK %u\n", in cs42l73_set_mclk()
894 priv->mclksel + 1, cs42l73_mclkx_coeffs[mclkx_coeff].mclkx, in cs42l73_set_mclk()
897 dmmcc = (priv->mclksel << 4) | in cs42l73_set_mclk()
902 priv->sysclk = mclkx_coeff; in cs42l73_set_mclk()
903 priv->mclk = mclk; in cs42l73_set_mclk()
909 int clk_id, unsigned int freq, int dir) in cs42l73_set_sysclk() argument
911 struct snd_soc_component *component = dai->component; in cs42l73_set_sysclk()
920 return -EINVAL; in cs42l73_set_sysclk()
923 if ((cs42l73_set_mclk(dai, freq)) < 0) { in cs42l73_set_sysclk()
924 dev_err(component->dev, "Unable to set MCLK for dai %s\n", in cs42l73_set_sysclk()
925 dai->name); in cs42l73_set_sysclk()
926 return -EINVAL; in cs42l73_set_sysclk()
929 priv->mclksel = clk_id; in cs42l73_set_sysclk()
936 struct snd_soc_component *component = codec_dai->component; in cs42l73_set_dai_fmt()
938 u8 id = codec_dai->id; in cs42l73_set_dai_fmt()
955 return -EINVAL; in cs42l73_set_dai_fmt()
968 dev_err(component->dev, in cs42l73_set_dai_fmt()
970 return -EINVAL; in cs42l73_set_dai_fmt()
973 dev_err(component->dev, in cs42l73_set_dai_fmt()
975 return -EINVAL; in cs42l73_set_dai_fmt()
980 return -EINVAL; in cs42l73_set_dai_fmt()
984 /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */ in cs42l73_set_dai_fmt()
998 return -EINVAL; in cs42l73_set_dai_fmt()
1002 priv->config[id].spc = spc; in cs42l73_set_dai_fmt()
1003 priv->config[id].mmcc = mmcc; in cs42l73_set_dai_fmt()
1049 struct snd_soc_component *component = dai->component; in cs42l73_pcm_hw_params()
1051 int id = dai->id; in cs42l73_pcm_hw_params()
1055 if (priv->config[id].mmcc & CS42L73_MS_MASTER) { in cs42l73_pcm_hw_params()
1057 /* MCLK -> srate */ in cs42l73_pcm_hw_params()
1059 cs42l73_get_mclk_coeff(priv->mclk, srate); in cs42l73_pcm_hw_params()
1062 return -EINVAL; in cs42l73_pcm_hw_params()
1064 dev_dbg(component->dev, in cs42l73_pcm_hw_params()
1066 id, priv->mclk, srate, in cs42l73_pcm_hw_params()
1069 priv->config[id].mmcc &= 0xC0; in cs42l73_pcm_hw_params()
1070 priv->config[id].mmcc |= cs42l73_mclk_coeffs[mclk_coeff].mmcc; in cs42l73_pcm_hw_params()
1071 priv->config[id].spc &= 0xFC; in cs42l73_pcm_hw_params()
1073 if (priv->mclk >= 6400000) in cs42l73_pcm_hw_params()
1074 priv->config[id].spc |= CS42L73_MCK_SCLK_64FS; in cs42l73_pcm_hw_params()
1076 priv->config[id].spc |= CS42L73_MCK_SCLK_MCLK; in cs42l73_pcm_hw_params()
1079 priv->config[id].spc &= 0xFC; in cs42l73_pcm_hw_params()
1080 priv->config[id].spc |= CS42L73_MCK_SCLK_64FS; in cs42l73_pcm_hw_params()
1083 priv->config[id].srate = srate; in cs42l73_pcm_hw_params()
1085 snd_soc_component_write(component, CS42L73_SPC(id), priv->config[id].spc); in cs42l73_pcm_hw_params()
1086 snd_soc_component_write(component, CS42L73_MMCC(id), priv->config[id].mmcc); in cs42l73_pcm_hw_params()
1109 regcache_cache_only(cs42l73->regmap, false); in cs42l73_set_bias_level()
1110 regcache_sync(cs42l73->regmap); in cs42l73_set_bias_level()
1117 if (cs42l73->shutdwn_delay > 0) { in cs42l73_set_bias_level()
1118 mdelay(cs42l73->shutdwn_delay); in cs42l73_set_bias_level()
1119 cs42l73->shutdwn_delay = 0; in cs42l73_set_bias_level()
1133 struct snd_soc_component *component = dai->component; in cs42l73_set_tristate()
1134 int id = dai->id; in cs42l73_set_tristate()
1148 snd_pcm_hw_constraint_list(substream->runtime, 0, in cs42l73_pcm_startup()
1168 .name = "cs42l73-xsp",
1188 .name = "cs42l73-asp",
1208 .name = "cs42l73-vsp",
1234 if (cs42l73->pdata.chgfreq) in cs42l73_probe()
1237 cs42l73->pdata.chgfreq << 4); in cs42l73_probe()
1240 cs42l73->mclksel = CS42L73_CLKID_MCLK1; in cs42l73_probe()
1241 cs42l73->mclk = 0; in cs42l73_probe()
1279 struct cs42l73_platform_data *pdata = dev_get_platdata(&i2c_client->dev); in cs42l73_i2c_probe()
1284 cs42l73 = devm_kzalloc(&i2c_client->dev, sizeof(*cs42l73), GFP_KERNEL); in cs42l73_i2c_probe()
1286 return -ENOMEM; in cs42l73_i2c_probe()
1288 cs42l73->regmap = devm_regmap_init_i2c(i2c_client, &cs42l73_regmap); in cs42l73_i2c_probe()
1289 if (IS_ERR(cs42l73->regmap)) { in cs42l73_i2c_probe()
1290 ret = PTR_ERR(cs42l73->regmap); in cs42l73_i2c_probe()
1291 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret); in cs42l73_i2c_probe()
1296 cs42l73->pdata = *pdata; in cs42l73_i2c_probe()
1298 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata), in cs42l73_i2c_probe()
1301 return -ENOMEM; in cs42l73_i2c_probe()
1303 if (i2c_client->dev.of_node) { in cs42l73_i2c_probe()
1304 if (of_property_read_u32(i2c_client->dev.of_node, in cs42l73_i2c_probe()
1306 pdata->chgfreq = val32; in cs42l73_i2c_probe()
1308 pdata->reset_gpio = of_get_named_gpio(i2c_client->dev.of_node, in cs42l73_i2c_probe()
1309 "reset-gpio", 0); in cs42l73_i2c_probe()
1310 cs42l73->pdata = *pdata; in cs42l73_i2c_probe()
1315 if (cs42l73->pdata.reset_gpio) { in cs42l73_i2c_probe()
1316 ret = devm_gpio_request_one(&i2c_client->dev, in cs42l73_i2c_probe()
1317 cs42l73->pdata.reset_gpio, in cs42l73_i2c_probe()
1321 dev_err(&i2c_client->dev, "Failed to request /RST %d: %d\n", in cs42l73_i2c_probe()
1322 cs42l73->pdata.reset_gpio, ret); in cs42l73_i2c_probe()
1325 gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 0); in cs42l73_i2c_probe()
1326 gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 1); in cs42l73_i2c_probe()
1330 devid = cirrus_read_device_id(cs42l73->regmap, CS42L73_DEVID_AB); in cs42l73_i2c_probe()
1333 dev_err(&i2c_client->dev, "Failed to read device ID: %d\n", ret); in cs42l73_i2c_probe()
1338 ret = -ENODEV; in cs42l73_i2c_probe()
1339 dev_err(&i2c_client->dev, in cs42l73_i2c_probe()
1345 ret = regmap_read(cs42l73->regmap, CS42L73_REVID, &reg); in cs42l73_i2c_probe()
1347 dev_err(&i2c_client->dev, "Get Revision ID failed\n"); in cs42l73_i2c_probe()
1351 dev_info(&i2c_client->dev, in cs42l73_i2c_probe()
1354 ret = devm_snd_soc_register_component(&i2c_client->dev, in cs42l73_i2c_probe()
1363 gpio_set_value_cansleep(cs42l73->pdata.reset_gpio, 0); in cs42l73_i2c_probe()