Lines Matching +full:vd +full:- +full:supply
1 // SPDX-License-Identifier: GPL-2.0-only
9 * Based on cs4270.c - Copyright (c) Freescale Semiconductor
12 * - Only I2C is support. Not SPI
13 * - master mode *NOT* supported
39 "VD",
47 unsigned int audio_mode; /* The mode (I2S or left-justified) */
66 ucontrol->value.enumerated.item[0] = 0;
71 ucontrol->value.enumerated.item[0] = 1;
74 ucontrol->value.enumerated.item[0] = 2;
91 switch (ucontrol->value.enumerated.item[0]) {
109 static const DECLARE_TLV_DB_SCALE(adc_pcm_tlv, -5150, 50, 0);
110 static const DECLARE_TLV_DB_SCALE(tone_tlv, -1050, 150, 0);
112 static const DECLARE_TLV_DB_SCALE(aout_tlv, -10200, 50, 0);
122 static const DECLARE_TLV_DB_SCALE(pga_tlv, -300, 50, 0);
123 static const DECLARE_TLV_DB_SCALE(adc_att_tlv, -9600, 100, 0);
148 SOC_SINGLE("Auto-Mute Switch", CS42L51_DAC_CTL, 2, 1, 0),
165 * 2.) enable power-down for the select channels
171 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
248 SND_SOC_DAPM_MUX("PGA-ADC Mux Left", SND_SOC_NOPM, 0, 0,
250 SND_SOC_DAPM_MUX("PGA-ADC Mux Right", SND_SOC_NOPM, 0, 0,
257 struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
262 return clk_prepare_enable(cs42l51->mclk_handle);
264 /* Delay mclk shutdown to fulfill power-down sequence requirements */
266 clk_disable_unprepare(cs42l51->mclk_handle);
294 {"PGA-ADC Mux Left", "AIN1 Left", "AIN1L" },
295 {"PGA-ADC Mux Left", "AIN2 Left", "AIN2L" },
296 {"PGA-ADC Mux Left", "MIC Left", "MICL" },
297 {"PGA-ADC Mux Left", "MIC+preamp Left", "Mic Preamp Left" },
298 {"PGA-ADC Mux Right", "AIN1 Right", "AIN1R" },
299 {"PGA-ADC Mux Right", "AIN2 Right", "AIN2R" },
300 {"PGA-ADC Mux Right", "MIC Right", "MICR" },
301 {"PGA-ADC Mux Right", "MIC+preamp Right", "Mic Preamp Right" },
303 {"Left PGA", NULL, "PGA-ADC Mux Left"},
304 {"Right PGA", NULL, "PGA-ADC Mux Right"},
310 struct snd_soc_component *component = codec_dai->component;
317 cs42l51->audio_mode = format & SND_SOC_DAIFMT_FORMAT_MASK;
320 dev_err(component->dev, "invalid DAI format\n");
321 return -EINVAL;
326 cs42l51->func = MODE_MASTER;
329 cs42l51->func = MODE_SLAVE_AUTO;
332 dev_err(component->dev, "Unknown master/slave configuration\n");
333 return -EINVAL;
372 * Recommended configurations are SSM for 4-50khz and DSM for 50-100kHz ranges
386 struct snd_soc_component *component = codec_dai->component;
389 cs42l51->mclk = freq;
397 struct snd_soc_component *component = dai->component;
407 switch (cs42l51->func) {
424 ratio = cs42l51->mclk / rate; /* MCLK/LRCK ratio */
432 dev_err(component->dev, "could not find matching ratio\n");
433 return -EINVAL;
444 switch (cs42l51->func) {
466 switch (cs42l51->audio_mode) {
489 dev_err(component->dev, "unknown format\n");
490 return -EINVAL;
495 dev_err(component->dev, "unknown format\n");
496 return -EINVAL;
515 struct snd_soc_component *component = dai->component;
545 .name = "cs42l51-hifi",
572 if (cs42l51->mclk_handle)
577 * - Use signal processor
578 * - auto mute
579 * - vol changes immediate
580 * - no de-emphasize
722 return -ENOMEM;
725 cs42l51->regmap = regmap;
727 cs42l51->mclk_handle = devm_clk_get_optional(dev, "MCLK");
728 if (IS_ERR(cs42l51->mclk_handle))
729 return PTR_ERR(cs42l51->mclk_handle);
731 for (i = 0; i < ARRAY_SIZE(cs42l51->supplies); i++)
732 cs42l51->supplies[i].supply = cs42l51_supply_names[i];
734 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(cs42l51->supplies),
735 cs42l51->supplies);
741 ret = regulator_bulk_enable(ARRAY_SIZE(cs42l51->supplies),
742 cs42l51->supplies);
748 cs42l51->reset_gpio = devm_gpiod_get_optional(dev, "reset",
750 if (IS_ERR(cs42l51->reset_gpio)) {
751 ret = PTR_ERR(cs42l51->reset_gpio);
755 if (cs42l51->reset_gpio) {
757 gpiod_set_value_cansleep(cs42l51->reset_gpio, 0);
771 ret = -ENODEV;
785 gpiod_set_value_cansleep(cs42l51->reset_gpio, 1);
786 regulator_bulk_disable(ARRAY_SIZE(cs42l51->supplies),
787 cs42l51->supplies);
797 gpiod_set_value_cansleep(cs42l51->reset_gpio, 1);
799 ret = regulator_bulk_disable(ARRAY_SIZE(cs42l51->supplies),
800 cs42l51->supplies);
812 regcache_cache_only(cs42l51->regmap, true);
813 regcache_mark_dirty(cs42l51->regmap);
823 regcache_cache_only(cs42l51->regmap, false);
825 return regcache_sync(cs42l51->regmap);
829 MODULE_AUTHOR("Arnaud Patard <arnaud.patard@rtp-net.org>");