153  * struct cs4270_mode_ratios - clock ratio tables
154  * @ratio: the ratio of MCLK to the sample rate
156  *              this ratio
157  * @mclk: the Ratio Select bits to set in the Mode Control register for this
158  *        ratio
173  * In situations where a single ratio is represented by multiple speed
174  * modes, we favor the slowest speed.  E.g, for a ratio of 128, we pick
185 	unsigned int ratio;  member
232  * by the CS4270.  The ratio of MCLK / Fs must be equal to one of nine
328 	unsigned int ratio;  in cs4270_hw_params()  local
331 	/* Figure out which MCLK/LRCK ratio to use */  in cs4270_hw_params()
334 	ratio = cs4270->mclk / rate;	/* MCLK/LRCK ratio */  in cs4270_hw_params()
337 		if (cs4270_mode_ratios[i].ratio == ratio)  in cs4270_hw_params()
342 		/* We did not find a matching ratio */  in cs4270_hw_params()
343 		dev_err(component->dev, "could not find matching ratio\n");  in cs4270_hw_params()