Lines Matching +full:0 +full:x00000018
24 { CS35L56_ASP1_ENABLES1, 0x00000000 },
25 { CS35L56_ASP1_CONTROL1, 0x00000028 },
26 { CS35L56_ASP1_CONTROL2, 0x18180200 },
27 { CS35L56_ASP1_CONTROL3, 0x00000002 },
28 { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 },
29 { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
30 { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
31 { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
32 { CS35L56_ASP1TX1_INPUT, 0x00000000 },
33 { CS35L56_ASP1TX2_INPUT, 0x00000000 },
34 { CS35L56_ASP1TX3_INPUT, 0x00000000 },
35 { CS35L56_ASP1TX4_INPUT, 0x00000000 },
36 { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
37 { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
38 { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
39 { CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 },
40 { CS35L56_IRQ1_MASK_18, 0x1f7df0ff },
45 { CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 },
46 { CS35L56_MAIN_RENDER_USER_VOLUME, 0x00000000 },
47 { CS35L56_MAIN_POSTURE_NUMBER, 0x00000000 },
52 { CS35L63_MAIN_RENDER_USER_MUTE, 0x00000000 },
53 { CS35L63_MAIN_RENDER_USER_VOLUME, 0x00000000 },
54 { CS35L63_MAIN_POSTURE_NUMBER, 0x00000000 },
68 case 0x54:
69 case 0x56:
70 case 0x57:
74 case 0x63:
89 { CS35L56_ASP1_ENABLES1, 0x00000000 },
90 { CS35L56_ASP1_CONTROL1, 0x00000028 },
91 { CS35L56_ASP1_CONTROL2, 0x18180200 },
92 { CS35L56_ASP1_CONTROL3, 0x00000002 },
93 { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 },
94 { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
95 { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
96 { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
97 { CS35L56_ASP1TX1_INPUT, 0x00000000 },
98 { CS35L56_ASP1TX2_INPUT, 0x00000000 },
99 { CS35L56_ASP1TX3_INPUT, 0x00000000 },
100 { CS35L56_ASP1TX4_INPUT, 0x00000000 },
101 { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
102 { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
103 { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
104 { CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 },
105 { CS35L56_IRQ1_MASK_1, 0x83ffffff },
106 { CS35L56_IRQ1_MASK_2, 0xffff7fff },
107 { CS35L56_IRQ1_MASK_4, 0xe0ffffff },
108 { CS35L56_IRQ1_MASK_8, 0xfc000fff },
109 { CS35L56_IRQ1_MASK_18, 0x1f7df0ff },
110 { CS35L56_IRQ1_MASK_20, 0x15c00000 },
111 { CS35L56_MAIN_RENDER_USER_MUTE, 0x00000000 },
112 { CS35L56_MAIN_RENDER_USER_VOLUME, 0x00000000 },
113 { CS35L56_MAIN_POSTURE_NUMBER, 0x00000000 },
119 { CS35L56_ASP1_ENABLES1, 0x00000000 },
120 { CS35L56_ASP1_CONTROL1, 0x00000028 },
121 { CS35L56_ASP1_CONTROL2, 0x18180200 },
122 { CS35L56_ASP1_CONTROL3, 0x00000002 },
123 { CS35L56_ASP1_FRAME_CONTROL1, 0x03020100 },
124 { CS35L56_ASP1_FRAME_CONTROL5, 0x00020100 },
125 { CS35L56_ASP1_DATA_CONTROL1, 0x00000018 },
126 { CS35L56_ASP1_DATA_CONTROL5, 0x00000018 },
127 { CS35L56_ASP1TX1_INPUT, 0x00000000 },
128 { CS35L56_ASP1TX2_INPUT, 0x00000000 },
129 { CS35L56_ASP1TX3_INPUT, 0x00000000 },
130 { CS35L56_ASP1TX4_INPUT, 0x00000000 },
131 { CS35L56_SWIRE_DP3_CH1_INPUT, 0x00000018 },
132 { CS35L56_SWIRE_DP3_CH2_INPUT, 0x00000019 },
133 { CS35L56_SWIRE_DP3_CH3_INPUT, 0x00000029 },
134 { CS35L56_SWIRE_DP3_CH4_INPUT, 0x00000028 },
135 { CS35L56_IRQ1_MASK_1, 0x8003ffff },
136 { CS35L56_IRQ1_MASK_2, 0xffff7fff },
137 { CS35L56_IRQ1_MASK_4, 0xe0ffffff },
138 { CS35L56_IRQ1_MASK_8, 0x8c000fff },
139 { CS35L56_IRQ1_MASK_18, 0x0760f000 },
140 { CS35L56_IRQ1_MASK_20, 0x15c00000 },
141 { CS35L63_MAIN_RENDER_USER_MUTE, 0x00000000 },
142 { CS35L63_MAIN_RENDER_USER_VOLUME, 0x00000000 },
143 { CS35L63_MAIN_POSTURE_NUMBER, 0x00000000 },
350 case 0xb0:
358 case 0x63:
371 val, (val == 0),
378 return 0;
396 if (ret < 0)
405 unsigned int val = 0;
413 (val < 0xFFFF) && (val >= CS35L56_HALO_STATE_BOOT_DONE),
427 return 0;
465 for (i = 0; i < ARRAY_SIZE(cs35l56_spi_system_reset_stages); i++) {
505 (val > 0) && (val < 0xffffffff),
519 REG_SEQ0(CS35L56_DSP1_HALO_STATE, 0),
524 REG_SEQ0(CS35L56_B2_DSP1_HALO_STATE, 0),
529 REG_SEQ0(CS35L63_DSP1_HALO_STATE, 0),
547 case 0x54:
548 case 0x56:
549 case 0x57:
551 case 0xb0:
563 case 0x63:
587 return 0;
604 unsigned int status1 = 0, status8 = 0, status20 = 0;
617 if (rv < 0) {
623 if ((val & CS35L56_IRQ1_STS_MASK) == 0) {
643 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
733 return 0;
751 return 0;
766 return 0;
776 return 0;
809 return 0;
834 cs_dsp->rev = 0;
854 static_assert((sizeof(struct cs35l56_pte) % sizeof(u32)) == 0);
868 unique_id = (u32)pte.lot[2] | ((u32)pte.lot[1] << 8) | ((u32)pte.lot[0] << 16);
875 return 0;
891 *uid |= tmp[0];
893 return 0;
898 .alg_id = 0x9f210,
908 .alg_id = 0xbf210,
918 u64 silicon_uid = 0;
923 return 0;
926 case 0x54:
927 case 0x56:
928 case 0x57:
931 case 0x63:
939 if (ret < 0)
950 return 0;
952 if (ret < 0)
957 return 0;
983 return 0;
994 case 0x54:
995 case 0x56:
996 case 0x57:
997 alg_id = 0x9f212;
1000 alg_id = 0xbf212;
1007 0, &pid, sizeof(pid));
1011 0, &sid, sizeof(sid));
1015 0, &tid, sizeof(tid));
1043 if (ret < 0) {
1055 if (ret < 0) {
1062 case 0x35A54:
1063 case 0x35A56:
1064 case 0x35A57:
1067 case 0x35A630:
1076 cs35l56_base->type = devid & 0xFF;
1092 if (ret < 0) {
1103 fw_ver >> 16, (fw_ver >> 8) & 0xff, fw_ver & 0xff, !fw_missing);
1106 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff);
1109 0);
1112 0);
1114 return 0;
1126 if (ret >= 0) {
1150 speaker_id = 0;
1151 for (i = 0; i < descs->ndescs; i++) {
1153 if (ret < 0) {
1171 [0x0C] = 128000,
1172 [0x0F] = 256000,
1173 [0x11] = 384000,
1174 [0x12] = 512000,
1175 [0x15] = 768000,
1176 [0x17] = 1024000,
1177 [0x1A] = 1500000,
1178 [0x1B] = 1536000,
1179 [0x1C] = 2000000,
1180 [0x1D] = 2048000,
1181 [0x1E] = 2400000,
1182 [0x20] = 3000000,
1183 [0x21] = 3072000,
1184 [0x23] = 4000000,
1185 [0x24] = 4096000,
1186 [0x25] = 4800000,
1187 [0x27] = 6000000,
1188 [0x28] = 6144000,
1189 [0x29] = 6250000,
1190 [0x2A] = 6400000,
1191 [0x2E] = 8000000,
1192 [0x2F] = 8192000,
1193 [0x30] = 9600000,
1194 [0x32] = 12000000,
1195 [0x33] = 12288000,
1196 [0x37] = 13500000,
1197 [0x38] = 19200000,
1198 [0x39] = 22579200,
1199 [0x3B] = 24576000,
1206 if (freq == 0)
1210 for (i = 0; i < ARRAY_SIZE(cs35l56_bclk_valid_for_pll_freq_table); ++i) {
1230 for (i = 0; i < ARRAY_SIZE(cs35l56_supplies); i++)
1321 .reg_base = 0x8000,