Lines Matching +full:- +full:uses +full:- +full:gpio +full:- +full:dvs

1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/gpio/consumer.h>
14 #include <sound/cs-amp-lib.h>
20 * Firmware can change these to non-defaults to satisfy SDCA.
41 /* These are not reset by a soft-reset, so patch to defaults. */
49 return regmap_register_patch(cs35l56_base->regmap, cs35l56_patch, in cs35l56_set_patch()
55 /* no defaults for OTP_MEM - first read populates cache */
233 regmap_write(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, command); in cs35l56_mbox_send()
234 ret = regmap_read_poll_timeout(cs35l56_base->regmap, CS35L56_DSP_VIRTUAL1_MBOX_1, in cs35l56_mbox_send()
238 dev_warn(cs35l56_base->dev, "MBOX command %#x failed: %d\n", command, ret); in cs35l56_mbox_send()
255 ret = regmap_read_poll_timeout(cs35l56_base->regmap, CS35L56_DSP1_PM_CUR_STATE, in cs35l56_firmware_shutdown()
260 dev_err(cs35l56_base->dev, "Failed to poll PM_CUR_STATE to 1 is %d (ret %d)\n", in cs35l56_firmware_shutdown()
272 * The regmap must remain in cache-only until the chip has in cs35l56_wait_for_firmware_boot()
280 cs35l56_base->regmap, CS35L56_DSP1_HALO_STATE, &val); in cs35l56_wait_for_firmware_boot()
283 dev_err(cs35l56_base->dev, "Firmware boot timed out(%d): HALO_STATE=%#x\n", in cs35l56_wait_for_firmware_boot()
285 return -EIO; in cs35l56_wait_for_firmware_boot()
314 * Must enter cache-only first so there can't be any more register in cs35l56_system_reset()
317 regcache_cache_only(cs35l56_base->regmap, true); in cs35l56_system_reset()
318 regmap_multi_reg_write_bypassed(cs35l56_base->regmap, in cs35l56_system_reset()
322 /* On SoundWire the registers won't be accessible until it re-enumerates. */ in cs35l56_system_reset()
328 /* Leave in cache-only. This will be revoked when the chip has rebooted. */ in cs35l56_system_reset()
339 ret = devm_request_threaded_irq(cs35l56_base->dev, irq, NULL, cs35l56_irq, in cs35l56_irq_request()
343 cs35l56_base->irq = irq; in cs35l56_irq_request()
345 dev_err(cs35l56_base->dev, "Failed to get IRQ: %d\n", ret); in cs35l56_irq_request()
361 if (!cs35l56_base->init_done) in cs35l56_irq()
364 mutex_lock(&cs35l56_base->irq_lock); in cs35l56_irq()
366 rv = pm_runtime_resume_and_get(cs35l56_base->dev); in cs35l56_irq()
368 dev_err(cs35l56_base->dev, "irq: failed to get pm_runtime: %d\n", rv); in cs35l56_irq()
372 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val); in cs35l56_irq()
374 dev_dbg(cs35l56_base->dev, "Spurious IRQ: no pending interrupt\n"); in cs35l56_irq()
379 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_1, &status1); in cs35l56_irq()
380 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_1, &mask1); in cs35l56_irq()
382 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_1, status1); in cs35l56_irq()
384 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_8, &status8); in cs35l56_irq()
385 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_8, &mask8); in cs35l56_irq()
387 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_8, status8); in cs35l56_irq()
389 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_20, &status20); in cs35l56_irq()
390 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, &mask20); in cs35l56_irq()
393 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff); in cs35l56_irq()
395 dev_dbg(cs35l56_base->dev, "%s: %#x %#x\n", __func__, status1, status8); in cs35l56_irq()
402 dev_crit(cs35l56_base->dev, "Amp short error\n"); in cs35l56_irq()
405 dev_crit(cs35l56_base->dev, "Overtemp error\n"); in cs35l56_irq()
410 pm_runtime_put(cs35l56_base->dev); in cs35l56_irq()
412 mutex_unlock(&cs35l56_base->irq_lock); in cs35l56_irq()
426 * Assume that tuning must be re-loaded. in cs35l56_is_fw_reload_needed()
428 if (cs35l56_base->secured) in cs35l56_is_fw_reload_needed()
431 ret = pm_runtime_resume_and_get(cs35l56_base->dev); in cs35l56_is_fw_reload_needed()
433 dev_err(cs35l56_base->dev, "Failed to runtime_get: %d\n", ret); in cs35l56_is_fw_reload_needed()
437 ret = regmap_read(cs35l56_base->regmap, CS35L56_PROTECTION_STATUS, &val); in cs35l56_is_fw_reload_needed()
439 dev_err(cs35l56_base->dev, "Failed to read PROTECTION_STATUS: %d\n", ret); in cs35l56_is_fw_reload_needed()
443 pm_runtime_put_autosuspend(cs35l56_base->dev); in cs35l56_is_fw_reload_needed()
459 * Dummy transactions to trigger I2C/SPI auto-wake. Issue two in cs35l56_issue_wake_event()
463 * It uses bypassed read because we must wake the chip before in cs35l56_issue_wake_event()
464 * disabling regmap cache-only. in cs35l56_issue_wake_event()
466 regmap_read_bypassed(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val); in cs35l56_issue_wake_event()
470 regmap_read_bypassed(cs35l56_base->regmap, CS35L56_IRQ1_STATUS, &val); in cs35l56_issue_wake_event()
480 if (!cs35l56_base->init_done) in cs35l56_runtime_suspend_common()
483 /* Firmware must have entered a power-save state */ in cs35l56_runtime_suspend_common()
484 ret = regmap_read_poll_timeout(cs35l56_base->regmap, in cs35l56_runtime_suspend_common()
490 dev_warn(cs35l56_base->dev, "PS3 wait failed: %d\n", ret); in cs35l56_runtime_suspend_common()
493 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, CS35L56_OTP_BOOT_DONE_MASK); in cs35l56_runtime_suspend_common()
495 if (!cs35l56_base->can_hibernate) { in cs35l56_runtime_suspend_common()
496 regcache_cache_only(cs35l56_base->regmap, true); in cs35l56_runtime_suspend_common()
497 dev_dbg(cs35l56_base->dev, "Suspended: no hibernate"); in cs35l56_runtime_suspend_common()
503 * Must enter cache-only first so there can't be any more register in cs35l56_runtime_suspend_common()
506 regcache_cache_only(cs35l56_base->regmap, true); in cs35l56_runtime_suspend_common()
508 regmap_multi_reg_write_bypassed(cs35l56_base->regmap, in cs35l56_runtime_suspend_common()
512 dev_dbg(cs35l56_base->dev, "Suspended: hibernate"); in cs35l56_runtime_suspend_common()
523 if (!cs35l56_base->init_done) in cs35l56_runtime_resume_common()
526 if (!cs35l56_base->can_hibernate) in cs35l56_runtime_resume_common()
529 /* Must be done before releasing cache-only */ in cs35l56_runtime_resume_common()
536 dev_err(cs35l56_base->dev, "Hibernate wake failed: %d\n", ret); in cs35l56_runtime_resume_common()
540 regcache_cache_only(cs35l56_base->regmap, false); in cs35l56_runtime_resume_common()
547 regmap_read(cs35l56_base->regmap, CS35L56_IRQ1_EINT_4, &val); in cs35l56_runtime_resume_common()
549 dev_dbg(cs35l56_base->dev, "Registers reset in suspend\n"); in cs35l56_runtime_resume_common()
550 regcache_mark_dirty(cs35l56_base->regmap); in cs35l56_runtime_resume_common()
553 regcache_sync(cs35l56_base->regmap); in cs35l56_runtime_resume_common()
555 dev_dbg(cs35l56_base->dev, "Resumed"); in cs35l56_runtime_resume_common()
560 regcache_cache_only(cs35l56_base->regmap, true); in cs35l56_runtime_resume_common()
562 regmap_multi_reg_write_bypassed(cs35l56_base->regmap, in cs35l56_runtime_resume_common()
580 cs_dsp->num = 1; in cs35l56_init_cs_dsp()
581 cs_dsp->type = WMFW_HALO; in cs35l56_init_cs_dsp()
582 cs_dsp->rev = 0; in cs35l56_init_cs_dsp()
583 cs_dsp->dev = cs35l56_base->dev; in cs35l56_init_cs_dsp()
584 cs_dsp->regmap = cs35l56_base->regmap; in cs35l56_init_cs_dsp()
585 cs_dsp->base = CS35L56_DSP1_CORE_BASE; in cs35l56_init_cs_dsp()
586 cs_dsp->base_sysinfo = CS35L56_DSP1_SYS_INFO_ID; in cs35l56_init_cs_dsp()
587 cs_dsp->mem = cs35l56_dsp1_regions; in cs35l56_init_cs_dsp()
588 cs_dsp->num_mems = ARRAY_SIZE(cs35l56_dsp1_regions); in cs35l56_init_cs_dsp()
589 cs_dsp->no_core_startstop = true; in cs35l56_init_cs_dsp()
600 u8 dvs; member
610 ret = regmap_raw_read(cs35l56_base->regmap, CS35L56_OTP_MEM_53, &pte, sizeof(pte)); in cs35l56_read_silicon_uid()
612 dev_err(cs35l56_base->dev, "Failed to read OTP: %d\n", ret); in cs35l56_read_silicon_uid()
619 ((u32)pte.dvs << 24); in cs35l56_read_silicon_uid()
621 dev_dbg(cs35l56_base->dev, "UniqueID = %#llx\n", unique_id); in cs35l56_read_silicon_uid()
645 if (cs35l56_base->secured) in cs35l56_get_calibration()
652 ret = cs_amp_get_efi_calibration_data(cs35l56_base->dev, silicon_uid, in cs35l56_get_calibration()
653 cs35l56_base->cal_index, in cs35l56_get_calibration()
654 &cs35l56_base->cal_data); in cs35l56_get_calibration()
657 if ((ret == -ENOENT) || (ret == -EOVERFLOW)) in cs35l56_get_calibration()
663 cs35l56_base->cal_data_valid = true; in cs35l56_get_calibration()
675 ret = regmap_read(cs35l56_base->regmap, CS35L56_PROTECTION_STATUS, &prot_status); in cs35l56_read_prot_status()
677 dev_err(cs35l56_base->dev, "Get PROTECTION_STATUS failed: %d\n", ret); in cs35l56_read_prot_status()
683 ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP1_FW_VER, fw_version); in cs35l56_read_prot_status()
685 dev_err(cs35l56_base->dev, "Get FW VER failed: %d\n", ret); in cs35l56_read_prot_status()
704 if (!cs35l56_base->reset_gpio) in cs35l56_hw_init()
709 ret = regmap_read_bypassed(cs35l56_base->regmap, CS35L56_REVID, &revid); in cs35l56_hw_init()
711 dev_err(cs35l56_base->dev, "Get Revision ID failed\n"); in cs35l56_hw_init()
714 cs35l56_base->rev = revid & (CS35L56_AREVID_MASK | CS35L56_MTLREVID_MASK); in cs35l56_hw_init()
720 ret = regmap_read_bypassed(cs35l56_base->regmap, CS35L56_DEVID, &devid); in cs35l56_hw_init()
722 dev_err(cs35l56_base->dev, "Get Device ID failed\n"); in cs35l56_hw_init()
733 dev_err(cs35l56_base->dev, "Unknown device %x\n", devid); in cs35l56_hw_init()
737 cs35l56_base->type = devid & 0xFF; in cs35l56_hw_init()
739 /* Silicon is now identified and booted so exit cache-only */ in cs35l56_hw_init()
740 regcache_cache_only(cs35l56_base->regmap, false); in cs35l56_hw_init()
742 ret = regmap_read(cs35l56_base->regmap, CS35L56_DSP_RESTRICT_STS1, &secured); in cs35l56_hw_init()
744 dev_err(cs35l56_base->dev, "Get Secure status failed\n"); in cs35l56_hw_init()
750 cs35l56_base->secured = true; in cs35l56_hw_init()
752 ret = regmap_read(cs35l56_base->regmap, CS35L56_OTPID, &otpid); in cs35l56_hw_init()
754 dev_err(cs35l56_base->dev, "Get OTP ID failed\n"); in cs35l56_hw_init()
762 dev_info(cs35l56_base->dev, "Cirrus Logic CS35L%02X%s Rev %02X OTP%d fw:%d.%d.%d (patched=%u)\n", in cs35l56_hw_init()
763 cs35l56_base->type, cs35l56_base->secured ? "s" : "", cs35l56_base->rev, otpid, in cs35l56_hw_init()
767 regmap_write(cs35l56_base->regmap, CS35L56_IRQ1_MASK_20, 0xffffffff); in cs35l56_hw_init()
768 regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_1, in cs35l56_hw_init()
771 regmap_update_bits(cs35l56_base->regmap, CS35L56_IRQ1_MASK_8, in cs35l56_hw_init()
786 ret = device_property_read_u32(cs35l56_base->dev, "cirrus,speaker-id", &speaker_id); in cs35l56_get_speaker_id()
788 dev_dbg(cs35l56_base->dev, "Speaker ID = %d\n", speaker_id); in cs35l56_get_speaker_id()
793 descs = gpiod_get_array_optional(cs35l56_base->dev, "spk-id", GPIOD_IN); in cs35l56_get_speaker_id()
795 return -ENOENT; in cs35l56_get_speaker_id()
798 return dev_err_probe(cs35l56_base->dev, ret, "Failed to get spk-id-gpios\n"); in cs35l56_get_speaker_id()
802 for (i = 0; i < descs->ndescs; i++) { in cs35l56_get_speaker_id()
803 ret = gpiod_get_value_cansleep(descs->desc[i]); in cs35l56_get_speaker_id()
805 dev_err_probe(cs35l56_base->dev, ret, "Failed to read spk-id[%d]\n", i); in cs35l56_get_speaker_id()
812 dev_dbg(cs35l56_base->dev, "Speaker ID = %d\n", speaker_id); in cs35l56_get_speaker_id()
858 return -EINVAL; in cs35l56_get_bclk_freq_id()
866 return -EINVAL; in cs35l56_get_bclk_freq_id()
870 static const char * const cs35l56_supplies[/* auto-sized */] = {