Lines Matching +full:0 +full:x000000aa
50 unsigned int sts = 0, i; in cs35l45_set_cspl_mbox_cmd()
60 if (ret < 0) { in cs35l45_set_cspl_mbox_cmd()
67 for (i = 0; i < 5; i++) { in cs35l45_set_cspl_mbox_cmd()
71 if (ret < 0) { in cs35l45_set_cspl_mbox_cmd()
79 return 0; in cs35l45_set_cspl_mbox_cmd()
106 regmap_write(cs35l45->regmap, CS35L45_GLOBAL_ENABLES, 0); in cs35l45_global_en_ev()
112 return 0; in cs35l45_global_en_ev()
125 return 0; in cs35l45_dsp_preload_ev()
130 return 0; in cs35l45_dsp_preload_ev()
138 return 0; in cs35l45_dsp_preload_ev()
148 return 0; in cs35l45_dsp_preload_ev()
166 return 0; in cs35l45_dsp_audio_ev()
169 return 0; in cs35l45_dsp_audio_ev()
195 return 0; in cs35l45_activate_ctl()
206 ucontrol->value.integer.value[0] = cs35l45->amplifier_mode; in cs35l45_amplifier_mode_get()
208 return 0; in cs35l45_amplifier_mode_get()
223 if ((ucontrol->value.integer.value[0] == cs35l45->amplifier_mode) || in cs35l45_amplifier_mode_put()
224 (ucontrol->value.integer.value[0] > AMP_MODE_RCV)) in cs35l45_amplifier_mode_put()
225 return 0; in cs35l45_amplifier_mode_put()
230 if (ret < 0) { in cs35l45_amplifier_mode_put()
241 if (ucontrol->value.integer.value[0] == AMP_MODE_SPK) { in cs35l45_amplifier_mode_put()
255 if (ret < 0) in cs35l45_amplifier_mode_put()
283 if (ret < 0) in cs35l45_amplifier_mode_put()
296 cs35l45->amplifier_mode = ucontrol->value.integer.value[0]; in cs35l45_amplifier_mode_put()
318 SOC_VALUE_ENUM_SINGLE(CS35L45_ASPTX1_INPUT, 0, CS35L45_PCM_SRC_MASK,
321 SOC_VALUE_ENUM_SINGLE(CS35L45_ASPTX2_INPUT, 0, CS35L45_PCM_SRC_MASK,
324 SOC_VALUE_ENUM_SINGLE(CS35L45_ASPTX3_INPUT, 0, CS35L45_PCM_SRC_MASK,
327 SOC_VALUE_ENUM_SINGLE(CS35L45_ASPTX4_INPUT, 0, CS35L45_PCM_SRC_MASK,
330 SOC_VALUE_ENUM_SINGLE(CS35L45_ASPTX5_INPUT, 0, CS35L45_PCM_SRC_MASK,
350 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX1_INPUT, 0, CS35L45_PCM_SRC_MASK,
353 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX2_INPUT, 0, CS35L45_PCM_SRC_MASK,
356 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX3_INPUT, 0, CS35L45_PCM_SRC_MASK,
359 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX4_INPUT, 0, CS35L45_PCM_SRC_MASK,
362 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX5_INPUT, 0, CS35L45_PCM_SRC_MASK,
365 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX6_INPUT, 0, CS35L45_PCM_SRC_MASK,
368 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX7_INPUT, 0, CS35L45_PCM_SRC_MASK,
371 SOC_VALUE_ENUM_SINGLE(CS35L45_DSP1RX8_INPUT, 0, CS35L45_PCM_SRC_MASK,
386 SOC_VALUE_ENUM_SINGLE(CS35L45_DACPCM1_INPUT, 0, CS35L45_PCM_SRC_MASK,
392 SOC_DAPM_ENUM("ASP_TX1 Source", cs35l45_asp_tx_enums[0]),
400 SOC_DAPM_ENUM("DSP_RX1 Source", cs35l45_dsp_rx_enums[0]),
411 SOC_DAPM_ENUM("DACPCM Source", cs35l45_dacpcm_enums[0]),
414 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0);
418 SND_SOC_DAPM_SUPPLY_S("DSP1 Preloader", 100, SND_SOC_NOPM, 0, 0,
421 SND_SOC_DAPM_OUT_DRV_E("DSP1", SND_SOC_NOPM, 0, 0, NULL, 0,
424 SND_SOC_DAPM_SUPPLY("GLOBAL_EN", SND_SOC_NOPM, 0, 0,
427 SND_SOC_DAPM_SUPPLY("ASP_EN", CS35L45_BLOCK_ENABLES2, CS35L45_ASP_EN_SHIFT, 0, NULL, 0),
438 SND_SOC_DAPM_SUPPLY("VMON_EN", CS35L45_BLOCK_ENABLES, CS35L45_VMON_EN_SHIFT, 0, NULL, 0),
439 SND_SOC_DAPM_SUPPLY("IMON_EN", CS35L45_BLOCK_ENABLES, CS35L45_IMON_EN_SHIFT, 0, NULL, 0),
440 SND_SOC_DAPM_SUPPLY("TEMPMON_EN", CS35L45_BLOCK_ENABLES, CS35L45_TEMPMON_EN_SHIFT, 0, NULL, 0),
441 …SOC_DAPM_SUPPLY("VDD_BATTMON_EN", CS35L45_BLOCK_ENABLES, CS35L45_VDD_BATTMON_EN_SHIFT, 0, NULL, 0),
442 …D_SOC_DAPM_SUPPLY("VDD_BSTMON_EN", CS35L45_BLOCK_ENABLES, CS35L45_VDD_BSTMON_EN_SHIFT, 0, NULL, 0),
444 SND_SOC_DAPM_ADC("VMON", NULL, SND_SOC_NOPM, 0, 0),
445 SND_SOC_DAPM_ADC("IMON", NULL, SND_SOC_NOPM, 0, 0),
446 SND_SOC_DAPM_ADC("TEMPMON", NULL, SND_SOC_NOPM, 0, 0),
447 SND_SOC_DAPM_ADC("VDD_BATTMON", NULL, SND_SOC_NOPM, 0, 0),
448 SND_SOC_DAPM_ADC("VDD_BSTMON", NULL, SND_SOC_NOPM, 0, 0),
451 SND_SOC_DAPM_AIF_IN("ASP_RX1", NULL, 0, CS35L45_ASP_ENABLES1, CS35L45_ASP_RX1_EN_SHIFT, 0),
452 SND_SOC_DAPM_AIF_IN("ASP_RX2", NULL, 1, CS35L45_ASP_ENABLES1, CS35L45_ASP_RX2_EN_SHIFT, 0),
454 SND_SOC_DAPM_AIF_OUT("ASP_TX1", NULL, 0, CS35L45_ASP_ENABLES1, CS35L45_ASP_TX1_EN_SHIFT, 0),
455 SND_SOC_DAPM_AIF_OUT("ASP_TX2", NULL, 1, CS35L45_ASP_ENABLES1, CS35L45_ASP_TX2_EN_SHIFT, 0),
456 SND_SOC_DAPM_AIF_OUT("ASP_TX3", NULL, 2, CS35L45_ASP_ENABLES1, CS35L45_ASP_TX3_EN_SHIFT, 0),
457 SND_SOC_DAPM_AIF_OUT("ASP_TX4", NULL, 3, CS35L45_ASP_ENABLES1, CS35L45_ASP_TX4_EN_SHIFT, 0),
458 SND_SOC_DAPM_AIF_OUT("ASP_TX5", NULL, 3, CS35L45_ASP_ENABLES1, CS35L45_ASP_TX5_EN_SHIFT, 0),
460 SND_SOC_DAPM_MUX("ASP_TX1 Source", SND_SOC_NOPM, 0, 0, &cs35l45_asp_muxes[0]),
461 SND_SOC_DAPM_MUX("ASP_TX2 Source", SND_SOC_NOPM, 0, 0, &cs35l45_asp_muxes[1]),
462 SND_SOC_DAPM_MUX("ASP_TX3 Source", SND_SOC_NOPM, 0, 0, &cs35l45_asp_muxes[2]),
463 SND_SOC_DAPM_MUX("ASP_TX4 Source", SND_SOC_NOPM, 0, 0, &cs35l45_asp_muxes[3]),
464 SND_SOC_DAPM_MUX("ASP_TX5 Source", SND_SOC_NOPM, 0, 0, &cs35l45_asp_muxes[4]),
466 SND_SOC_DAPM_MUX("DSP_RX1 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[0]),
467 SND_SOC_DAPM_MUX("DSP_RX2 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[1]),
468 SND_SOC_DAPM_MUX("DSP_RX3 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[2]),
469 SND_SOC_DAPM_MUX("DSP_RX4 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[3]),
470 SND_SOC_DAPM_MUX("DSP_RX5 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[4]),
471 SND_SOC_DAPM_MUX("DSP_RX6 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[5]),
472 SND_SOC_DAPM_MUX("DSP_RX7 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[6]),
473 SND_SOC_DAPM_MUX("DSP_RX8 Source", SND_SOC_NOPM, 0, 0, &cs35l45_dsp_muxes[7]),
475 SND_SOC_DAPM_MUX("DACPCM Source", SND_SOC_NOPM, 0, 0, &cs35l45_dac_muxes[0]),
477 SND_SOC_DAPM_SWITCH("AMP Enable", SND_SOC_NOPM, 0, 0, &_en_ctl),
479 SND_SOC_DAPM_OUT_DRV("AMP", SND_SOC_NOPM, 0, 0, NULL, 0),
591 static SOC_ENUM_SINGLE_DECL(amplifier_mode_enum, SND_SOC_NOPM, 0,
593 static DECLARE_TLV_DB_SCALE(amp_gain_tlv, 1000, 300, 0);
602 0, amp_gain_tlv),
603 /* Ignore bit 0: it is beyond the resolution of TLV_DB_SCALE */
609 0, cs35l45_dig_pcm_vol_tlv),
611 WM_ADSP_FW_CONTROL("DSP1", 0),
620 if (freq_id < 0) { in cs35l45_set_pll()
628 return 0; in cs35l45_set_pll()
638 return 0; in cs35l45_set_pll()
669 bclk_inv = 0; in cs35l45_asp_set_fmt()
672 fsync_inv = 0; in cs35l45_asp_set_fmt()
680 fsync_inv = 0; in cs35l45_asp_set_fmt()
681 bclk_inv = 0; in cs35l45_asp_set_fmt()
696 return 0; in cs35l45_asp_set_fmt()
756 return 0; in cs35l45_asp_hw_params()
784 return 0; in cs35l45_asp_set_tdm_slot()
793 if (clk_id != 0) { in cs35l45_asp_set_sysclk()
799 if (freq == 0) in cs35l45_asp_set_sysclk()
800 return 0; in cs35l45_asp_set_sysclk()
803 if (ret < 0) in cs35l45_asp_set_sysclk()
808 return 0; in cs35l45_asp_set_sysclk()
817 return 0; in cs35l45_mute_stream()
836 { 0x00000040, 0x00000055 }, in cs35l45_mute_stream()
837 { 0x00000040, 0x000000AA }, in cs35l45_mute_stream()
838 { 0x00000044, 0x00000055 }, in cs35l45_mute_stream()
839 { 0x00000044, 0x000000AA }, in cs35l45_mute_stream()
841 { 0x00000040, 0x00000000 }, in cs35l45_mute_stream()
842 { 0x00000044, 0x00000000 }, in cs35l45_mute_stream()
848 return 0; in cs35l45_mute_stream()
948 return 0; in cs35l45_enter_hibernate()
957 for (i = 0; i < sleep_retries; i++) { in cs35l45_exit_hibernate()
960 for (j = 0; j < wake_retries; j++) { in cs35l45_exit_hibernate()
967 return 0; in cs35l45_exit_hibernate()
987 return 0; in cs35l45_runtime_suspend()
996 return 0; in cs35l45_runtime_suspend()
1005 return 0; in cs35l45_runtime_resume()
1016 if (ret != 0) in cs35l45_runtime_resume()
1033 return 0; in cs35l45_sys_suspend()
1043 return 0; in cs35l45_sys_suspend_noirq()
1053 return 0; in cs35l45_sys_resume_noirq()
1063 return 0; in cs35l45_sys_resume()
1079 return 0; in cs35l45_apply_property_config()
1081 for (i = 0; i < CS35L45_NUM_GPIOS; i++) { in cs35l45_apply_property_config()
1130 "cirrus,asp-sdout-hiz-ctrl", &val) == 0) { in cs35l45_apply_property_config()
1136 return 0; in cs35l45_apply_property_config()
1170 return 0; in cs35l45_dsp_virt2_mbox3_irq_handle()
1177 int ret = 0; in cs35l45_dsp_virt2_mbox_cb()
1186 if (!ret && mbox_val != 0) { in cs35l45_dsp_virt2_mbox_cb()
1233 i = irq - regmap_irq_get_virq(cs35l45->irq_data, 0); in cs35l45_spk_safe_err()
1235 if (i < 0 || i >= ARRAY_SIZE(cs35l45_irqs)) in cs35l45_spk_safe_err()
1280 if (ret < 0) { in cs35l45_initialize()
1291 switch (dev_id[0]) { in cs35l45_initialize()
1292 case 0x35A450: in cs35l45_initialize()
1293 case 0x35A460: in cs35l45_initialize()
1296 dev_err(cs35l45->dev, "Bad DEVID 0x%x\n", dev_id[0]); in cs35l45_initialize()
1307 if (ret < 0) { in cs35l45_initialize()
1313 if (ret < 0) in cs35l45_initialize()
1318 return 0; in cs35l45_initialize()
1322 {0x02B80080, 0x00000001},
1323 {0x02B80088, 0x00000001},
1324 {0x02B80090, 0x00000001},
1325 {0x02B80098, 0x00000001},
1326 {0x02B800A0, 0x00000001},
1327 {0x02B800A8, 0x00000001},
1328 {0x02B800B0, 0x00000001},
1329 {0x02B800B8, 0x00000001},
1330 {0x02B80280, 0x00000001},
1331 {0x02B80288, 0x00000001},
1332 {0x02B80290, 0x00000001},
1333 {0x02B80298, 0x00000001},
1334 {0x02B802A0, 0x00000001},
1335 {0x02B802A8, 0x00000001},
1336 {0x02B802B0, 0x00000001},
1337 {0x02B802B8, 0x00000001},
1358 dsp->cs_dsp.rev = 0; in cs35l45_dsp_init()
1365 dsp->cs_dsp.lock_regions = 0xFFFFFFFF; in cs35l45_dsp_init()
1393 if (ret < 0) in cs35l45_probe()
1397 if (ret < 0) in cs35l45_probe()
1421 if (ret < 0) in cs35l45_probe()
1425 if (ret < 0) in cs35l45_probe()
1441 ret = devm_regmap_add_irq_chip(dev, cs35l45->regmap, cs35l45->irq, irq_pol, 0, in cs35l45_probe()
1448 for (i = 0; i < ARRAY_SIZE(cs35l45_irqs); i++) { in cs35l45_probe()
1450 if (irq < 0) { in cs35l45_probe()
1469 if (ret < 0) in cs35l45_probe()
1474 return 0; in cs35l45_probe()
1482 gpiod_set_value_cansleep(cs35l45->reset_gpio, 0); in cs35l45_probe()
1497 gpiod_set_value_cansleep(cs35l45->reset_gpio, 0); in cs35l45_remove()