Lines Matching +full:imon +full:- +full:slot +full:- +full:no
1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs35l34.c -- CS35l34 ALSA SoC audio driver
28 #include <sound/soc-dapm.h>
48 struct gpio_desc *reset_gpio; /* Active-low reset GPIO */
235 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
241 if (priv->tdm_mode)
242 regmap_update_bits(priv->regmap, CS35L34_PWRCTL3,
245 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1,
248 dev_err(component->dev, "Cannot set Power bits %d\n", ret);
254 if (priv->tdm_mode) {
255 regmap_update_bits(priv->regmap, CS35L34_PWRCTL3,
258 ret = regmap_update_bits(priv->regmap, CS35L34_PWRCTL1,
270 struct snd_soc_component *component = dai->component;
273 int slot, slot_num;
276 return -EINVAL;
278 priv->tdm_mode = true;
279 /* scan rx_mask for aud slot */
280 slot = ffs(rx_mask) - 1;
281 if (slot >= 0)
283 CS35L34_X_LOC, slot);
285 /* scan tx_mask: vmon(2 slots); imon (2 slots); vpmon (1 slot)
286 * vbstmon (1 slot)
288 slot = ffs(tx_mask) - 1;
300 while (slot >= 0) {
304 CS35L34_X_STATE | CS35L34_X_LOC, slot);
309 CS35L34_X_STATE | CS35L34_X_LOC, slot);
314 CS35L34_X_STATE | CS35L34_X_LOC, slot);
320 CS35L34_X_STATE | CS35L34_X_LOC, slot);
323 /* Enable the relevant tx slot */
324 reg = CS35L34_TDM_TX_SLOT_EN_4 - (slot/8);
325 bit_pos = slot - ((slot / 8) * (8));
329 tx_mask &= ~(1 << slot);
330 slot = ffs(tx_mask) - 1;
340 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
345 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL,
346 CS35L34_BST_CVTL_MASK, priv->pdata.boost_vtge);
348 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL,
352 regmap_update_bits(priv->regmap, CS35L34_BST_CVTR_V_CTL,
354 regmap_update_bits(priv->regmap, CS35L34_PROTECT_CTL,
364 static DECLARE_TLV_DB_SCALE(dig_vol_tlv, -10200, 50, 0);
380 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
387 ret = regmap_read(priv->regmap, CS35L34_AMP_DIG_VOL_CTL,
399 ret = regmap_read(priv->regmap, CS35L34_INT_STATUS_2,
440 SND_SOC_DAPM_ADC("IMON ADC", NULL, CS35L34_PWRCTL2, 6, 1),
463 {"IMON ADC", NULL, "ISENSE"},
465 {"SDOUT", NULL, "IMON ADC"},
517 return -EINVAL;
522 struct snd_soc_component *component = codec_dai->component;
527 regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
531 regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
535 return -EINVAL;
544 struct snd_soc_component *component = dai->component;
549 int coeff = cs35l34_get_mclk_coeff(priv->mclk_int, srate);
552 dev_err(component->dev, "ERROR: Invalid mclk %d and/or srate %d\n",
553 priv->mclk_int, srate);
557 ret = regmap_update_bits(priv->regmap, CS35L34_ADSP_CLK_CTL,
560 dev_err(component->dev, "Failed to set clock state %d\n", ret);
568 struct snd_soc_component *component = dai->component;
582 struct snd_soc_component *component = dai->component;
589 cs35l34->mclk_int = freq;
593 cs35l34->mclk_int = freq;
597 cs35l34->mclk_int = freq;
601 cs35l34->mclk_int = freq / 2;
605 cs35l34->mclk_int = freq / 2;
609 cs35l34->mclk_int = freq / 2;
612 dev_err(component->dev, "ERROR: Invalid Frequency %d\n", freq);
613 cs35l34->mclk_int = 0;
614 return -EINVAL;
616 regmap_update_bits(cs35l34->regmap, CS35L34_MCLK_CTL,
653 struct snd_soc_component *component = cs35l34->component;
657 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x24);
658 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x24);
659 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
661 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 0);
664 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
665 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
666 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
668 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 1);
671 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x20);
672 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x20);
673 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
675 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 2);
678 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_1, 0x19);
679 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_COEF_2, 0x25);
680 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SLOPE_COMP,
682 regmap_write(cs35l34->regmap, CS35L34_BST_CONV_SW_FREQ, 3);
685 dev_err(component->dev, "%s Invalid Inductor Value %d uH\n",
687 return -EINVAL;
697 pm_runtime_get_sync(component->dev);
700 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
706 regmap_write(cs35l34->regmap, CS35L34_PWRCTL2, 0xFD);
707 regmap_write(cs35l34->regmap, CS35L34_PWRCTL3, 0x1F);
710 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
714 if (cs35l34->pdata.boost_peak)
715 regmap_update_bits(cs35l34->regmap, CS35L34_BST_PEAK_I,
717 cs35l34->pdata.boost_peak);
719 if (cs35l34->pdata.gain_zc_disable)
720 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
723 regmap_update_bits(cs35l34->regmap, CS35L34_PROTECT_CTL,
726 if (cs35l34->pdata.aif_half_drv)
727 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_CLK_CTL,
730 if (cs35l34->pdata.digsft_disable)
731 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
734 if (cs35l34->pdata.amp_inv)
735 regmap_update_bits(cs35l34->regmap, CS35L34_AMP_DIG_VOL_CTL,
738 if (cs35l34->pdata.boost_ind)
739 ret = cs35l34_boost_inductor(cs35l34, cs35l34->pdata.boost_ind);
741 if (cs35l34->pdata.i2s_sdinloc)
742 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_I2S_CTL,
744 cs35l34->pdata.i2s_sdinloc << CS35L34_I2S_LOC_SHIFT);
746 if (cs35l34->pdata.tdm_rising_edge)
747 regmap_update_bits(cs35l34->regmap, CS35L34_ADSP_TDM_CTL,
750 pm_runtime_put_sync(component->dev);
788 struct device_node *np = i2c_client->dev.of_node;
791 if (of_property_read_u32(np, "cirrus,boost-vtge-millivolt",
795 dev_err(&i2c_client->dev,
797 return -EINVAL;
800 pdata->boost_vtge = 0; /* Use VP */
802 pdata->boost_vtge = ((val - 3300)/100) + 1;
804 dev_warn(&i2c_client->dev,
808 if (of_property_read_u32(np, "cirrus,boost-ind-nanohenry", &val) >= 0) {
809 pdata->boost_ind = val;
811 dev_err(&i2c_client->dev, "Inductor not specified.\n");
812 return -EINVAL;
815 if (of_property_read_u32(np, "cirrus,boost-peak-milliamp", &val) >= 0) {
817 dev_err(&i2c_client->dev,
819 return -EINVAL;
821 pdata->boost_peak = ((val - 1200)/80) + 1;
824 pdata->aif_half_drv = of_property_read_bool(np,
825 "cirrus,aif-half-drv");
826 pdata->digsft_disable = of_property_read_bool(np,
827 "cirrus,digsft-disable");
829 pdata->gain_zc_disable = of_property_read_bool(np,
830 "cirrus,gain-zc-disable");
831 pdata->amp_inv = of_property_read_bool(np, "cirrus,amp-inv");
833 if (of_property_read_u32(np, "cirrus,i2s-sdinloc", &val) >= 0)
834 pdata->i2s_sdinloc = val;
835 if (of_property_read_u32(np, "cirrus,tdm-rising-edge", &val) >= 0)
836 pdata->tdm_rising_edge = val;
844 struct snd_soc_component *component = cs35l34->component;
850 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_4, &sticky4);
851 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_3, &sticky3);
852 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_2, &sticky2);
853 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, &sticky1);
855 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_4, &mask4);
856 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_3, &mask3);
857 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_2, &mask2);
858 regmap_read(cs35l34->regmap, CS35L34_INT_MASK_1, &mask1);
864 regmap_read(cs35l34->regmap, CS35L34_INT_STATUS_1, ¤t1);
867 dev_err(component->dev, "Cal error\n");
869 /* error is no longer asserted; safe to reset */
871 dev_dbg(component->dev, "Cal error release\n");
872 regmap_update_bits(cs35l34->regmap,
875 regmap_update_bits(cs35l34->regmap,
879 regmap_update_bits(cs35l34->regmap,
882 /* note: amp will re-calibrate on next resume */
887 dev_err(component->dev, "Alive error\n");
890 dev_crit(component->dev, "Amp short error\n");
892 /* error is no longer asserted; safe to reset */
894 dev_dbg(component->dev,
896 regmap_update_bits(cs35l34->regmap,
899 regmap_update_bits(cs35l34->regmap,
903 regmap_update_bits(cs35l34->regmap,
910 dev_crit(component->dev, "Over temperature warning\n");
912 /* error is no longer asserted; safe to reset */
914 dev_dbg(component->dev,
916 regmap_update_bits(cs35l34->regmap,
919 regmap_update_bits(cs35l34->regmap,
923 regmap_update_bits(cs35l34->regmap,
930 dev_crit(component->dev, "Over temperature error\n");
932 /* error is no longer asserted; safe to reset */
934 dev_dbg(component->dev,
936 regmap_update_bits(cs35l34->regmap,
939 regmap_update_bits(cs35l34->regmap,
943 regmap_update_bits(cs35l34->regmap,
950 dev_crit(component->dev, "VBST too high error; powering off!\n");
951 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
953 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
958 dev_crit(component->dev, "LBST short error; powering off!\n");
959 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL2,
961 regmap_update_bits(cs35l34->regmap, CS35L34_PWRCTL1,
977 dev_get_platdata(&i2c_client->dev);
982 cs35l34 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l34), GFP_KERNEL);
984 return -ENOMEM;
987 cs35l34->regmap = devm_regmap_init_i2c(i2c_client, &cs35l34_regmap);
988 if (IS_ERR(cs35l34->regmap)) {
989 ret = PTR_ERR(cs35l34->regmap);
990 dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
994 cs35l34->num_core_supplies = ARRAY_SIZE(cs35l34_core_supplies);
996 cs35l34->core_supplies[i].supply = cs35l34_core_supplies[i];
998 ret = devm_regulator_bulk_get(&i2c_client->dev,
999 cs35l34->num_core_supplies,
1000 cs35l34->core_supplies);
1002 dev_err(&i2c_client->dev,
1007 ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1008 cs35l34->core_supplies);
1010 dev_err(&i2c_client->dev,
1016 cs35l34->pdata = *pdata;
1018 pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata),
1021 ret = -ENOMEM;
1025 if (i2c_client->dev.of_node) {
1031 cs35l34->pdata = *pdata;
1034 ret = devm_request_threaded_irq(&i2c_client->dev, i2c_client->irq, NULL,
1038 dev_err(&i2c_client->dev, "Failed to request IRQ: %d\n", ret);
1040 cs35l34->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
1042 if (IS_ERR(cs35l34->reset_gpio)) {
1043 ret = PTR_ERR(cs35l34->reset_gpio);
1047 gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1051 devid = cirrus_read_device_id(cs35l34->regmap, CS35L34_DEVID_AB);
1054 dev_err(&i2c_client->dev, "Failed to read device ID: %d\n", ret);
1059 dev_err(&i2c_client->dev,
1062 ret = -ENODEV;
1066 ret = regmap_read(cs35l34->regmap, CS35L34_REV_ID, ®);
1068 dev_err(&i2c_client->dev, "Get Revision ID failed\n");
1072 dev_info(&i2c_client->dev,
1077 regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_1,
1081 regmap_update_bits(cs35l34->regmap, CS35L34_INT_MASK_3,
1084 pm_runtime_set_autosuspend_delay(&i2c_client->dev, 100);
1085 pm_runtime_use_autosuspend(&i2c_client->dev);
1086 pm_runtime_set_active(&i2c_client->dev);
1087 pm_runtime_enable(&i2c_client->dev);
1089 ret = devm_snd_soc_register_component(&i2c_client->dev,
1092 dev_err(&i2c_client->dev,
1100 gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1102 regulator_bulk_disable(cs35l34->num_core_supplies,
1103 cs35l34->core_supplies);
1112 gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1114 pm_runtime_disable(&client->dev);
1115 regulator_bulk_disable(cs35l34->num_core_supplies,
1116 cs35l34->core_supplies);
1124 ret = regulator_bulk_enable(cs35l34->num_core_supplies,
1125 cs35l34->core_supplies);
1133 regcache_cache_only(cs35l34->regmap, false);
1135 gpiod_set_value_cansleep(cs35l34->reset_gpio, 1);
1138 ret = regcache_sync(cs35l34->regmap);
1145 regcache_cache_only(cs35l34->regmap, true);
1146 regulator_bulk_disable(cs35l34->num_core_supplies,
1147 cs35l34->core_supplies);
1156 regcache_cache_only(cs35l34->regmap, true);
1157 regcache_mark_dirty(cs35l34->regmap);
1159 gpiod_set_value_cansleep(cs35l34->reset_gpio, 0);
1161 regulator_bulk_disable(cs35l34->num_core_supplies,
1162 cs35l34->core_supplies);