Lines Matching +full:0 +full:x4010

72 #define ADAU17X1_CLOCK_CONTROL			0x4000
73 #define ADAU17X1_PLL_CONTROL			0x4002
74 #define ADAU17X1_REC_POWER_MGMT			0x4009
75 #define ADAU17X1_MICBIAS			0x4010
76 #define ADAU17X1_SERIAL_PORT0			0x4015
77 #define ADAU17X1_SERIAL_PORT1			0x4016
78 #define ADAU17X1_CONVERTER0			0x4017
79 #define ADAU17X1_CONVERTER1			0x4018
80 #define ADAU17X1_LEFT_INPUT_DIGITAL_VOL		0x401a
81 #define ADAU17X1_RIGHT_INPUT_DIGITAL_VOL	0x401b
82 #define ADAU17X1_ADC_CONTROL			0x4019
83 #define ADAU17X1_PLAY_POWER_MGMT		0x4029
84 #define ADAU17X1_DAC_CONTROL0			0x402a
85 #define ADAU17X1_DAC_CONTROL1			0x402b
86 #define ADAU17X1_DAC_CONTROL2			0x402c
87 #define ADAU17X1_SERIAL_PORT_PAD		0x402d
88 #define ADAU17X1_CONTROL_PORT_PAD0		0x402f
89 #define ADAU17X1_CONTROL_PORT_PAD1		0x4030
90 #define ADAU17X1_DSP_SAMPLING_RATE		0x40eb
91 #define ADAU17X1_SERIAL_INPUT_ROUTE		0x40f2
92 #define ADAU17X1_SERIAL_OUTPUT_ROUTE		0x40f3
93 #define ADAU17X1_DSP_ENABLE			0x40f5
94 #define ADAU17X1_DSP_RUN			0x40f6
95 #define ADAU17X1_SERIAL_SAMPLING_RATE		0x40f8
99 #define ADAU17X1_SERIAL_PORT0_MASTER		BIT(0)
101 #define ADAU17X1_SERIAL_PORT1_DELAY1		0x00
102 #define ADAU17X1_SERIAL_PORT1_DELAY0		0x01
103 #define ADAU17X1_SERIAL_PORT1_DELAY8		0x02
104 #define ADAU17X1_SERIAL_PORT1_DELAY16		0x03
105 #define ADAU17X1_SERIAL_PORT1_DELAY_MASK	0x03
107 #define ADAU17X1_CLOCK_CONTROL_INFREQ_MASK	0x6
109 #define ADAU17X1_CLOCK_CONTROL_SYSCLK_EN	BIT(0)
111 #define ADAU17X1_SERIAL_PORT1_BCLK64		(0x0 << 5)
112 #define ADAU17X1_SERIAL_PORT1_BCLK32		(0x1 << 5)
113 #define ADAU17X1_SERIAL_PORT1_BCLK48		(0x2 << 5)
114 #define ADAU17X1_SERIAL_PORT1_BCLK128		(0x3 << 5)
115 #define ADAU17X1_SERIAL_PORT1_BCLK256		(0x4 << 5)
116 #define ADAU17X1_SERIAL_PORT1_BCLK_MASK		(0x7 << 5)
118 #define ADAU17X1_SERIAL_PORT0_STEREO		(0x0 << 1)
119 #define ADAU17X1_SERIAL_PORT0_TDM4		(0x1 << 1)
120 #define ADAU17X1_SERIAL_PORT0_TDM8		(0x2 << 1)
121 #define ADAU17X1_SERIAL_PORT0_TDM_MASK		(0x3 << 1)
125 #define ADAU17X1_CONVERTER0_DAC_PAIR_MASK	(0x3 << 5)
127 #define ADAU17X1_CONVERTER1_ADC_PAIR_MASK	0x3
129 #define ADAU17X1_CONVERTER0_CONVSR_MASK		0x7