Lines Matching +full:12 +full:bit +full:- +full:clkdiv +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
93 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
94 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
99 #define ADAU1707_CLKDIV_UNSET (-1U)
115 u8 pin_config[12];
191 size = adau1701_register_size(&client->dev, reg);
193 return -EINVAL;
198 for (i = size + 1; i >= 2; --i) {
209 return -EIO;
222 size = adau1701_register_size(&client->dev, reg);
224 return -EINVAL;
229 msgs[0].addr = client->addr;
234 msgs[1].addr = client->addr;
239 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
243 return -EIO;
258 struct i2c_client *client = to_i2c_client(sigmadsp->dev);
265 ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
280 return -EIO;
288 return -EIO;
291 return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
299 static int adau1701_reset(struct snd_soc_component *component, unsigned int clkdiv,
306 sigmadsp_reset(adau1701->sigmadsp);
308 if (clkdiv != ADAU1707_CLKDIV_UNSET && adau1701->gpio_pll_mode) {
309 switch (clkdiv) {
328 gpiod_multi_set_value_cansleep(adau1701->gpio_pll_mode, values);
331 adau1701->pll_clkdiv = clkdiv;
333 if (adau1701->gpio_nreset) {
334 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
337 gpiod_set_value_cansleep(adau1701->gpio_nreset, 1);
338 /* power-up time may be as long as 85ms */
346 if (clkdiv != ADAU1707_CLKDIV_UNSET) {
347 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
349 dev_warn(component->dev, "Failed to load firmware\n");
354 regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
355 regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
357 regcache_mark_dirty(adau1701->regmap);
358 regcache_sync(adau1701->regmap);
381 return -EINVAL;
384 if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
399 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
410 if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
424 return -EINVAL;
427 regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
436 struct snd_soc_component *component = dai->component;
438 unsigned int clkdiv = adau1701->sysclk / params_rate(params);
444 * mode GPIO settings, and a full reset cycle, including a new
447 if (clkdiv != adau1701->pll_clkdiv) {
448 ret = adau1701_reset(component, clkdiv, params_rate(params));
464 return -EINVAL;
467 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
470 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
479 struct snd_soc_component *component = codec_dai->component;
486 /* master, 64-bits per sample, 1 frame per sample */
493 return -EINVAL;
515 return -EINVAL;
532 return -EINVAL;
540 adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
542 regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
543 regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
562 regmap_update_bits(adau1701->regmap,
567 regmap_update_bits(adau1701->regmap,
577 struct snd_soc_component *component = dai->component;
587 regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
606 return -EINVAL;
609 regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
611 adau1701->sysclk = freq;
619 struct adau1701 *adau1701 = snd_soc_component_get_drvdata(dai->component);
621 return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
672 ret = sigmadsp_attach(adau1701->sigmadsp, component);
676 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
677 adau1701->supplies);
679 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
687 * mode parameters.
689 adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
691 /* initalize with pre-configured pll mode settings */
692 ret = adau1701_reset(component, adau1701->pll_clkdiv, 0);
699 val |= adau1701->pin_config[i] << (i * 4);
701 regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
705 val |= adau1701->pin_config[i + 6] << (i * 4);
707 regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
713 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
721 if (adau1701->gpio_nreset)
722 gpiod_set_value_cansleep(adau1701->gpio_nreset, 0);
724 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
732 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies),
733 adau1701->supplies);
743 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
744 adau1701->supplies);
746 dev_err(component->dev, "Failed to enable regulators: %d\n", ret);
750 return adau1701_reset(component, adau1701->pll_clkdiv, 0);
787 struct device *dev = &client->dev;
792 return -ENOMEM;
795 adau1701->supplies[i].supply = supply_names[i];
797 ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(adau1701->supplies),
798 adau1701->supplies);
804 ret = regulator_bulk_enable(ARRAY_SIZE(adau1701->supplies),
805 adau1701->supplies);
811 adau1701->client = client;
812 adau1701->regmap = devm_regmap_init(dev, NULL, client,
814 if (IS_ERR(adau1701->regmap)) {
815 ret = PTR_ERR(adau1701->regmap);
820 if (dev->of_node) {
821 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
822 &adau1701->pll_clkdiv);
824 of_property_read_u8_array(dev->of_node, "adi,pin-config",
825 adau1701->pin_config,
826 ARRAY_SIZE(adau1701->pin_config));
829 adau1701->gpio_nreset = devm_gpiod_get_optional(dev, "reset", GPIOD_IN);
831 if (IS_ERR(adau1701->gpio_nreset)) {
832 ret = PTR_ERR(adau1701->gpio_nreset);
836 adau1701->gpio_pll_mode = devm_gpiod_get_array_optional(dev, "adi,pll-mode", GPIOD_OUT_LOW);
838 if (IS_ERR(adau1701->gpio_pll_mode)) {
839 ret = PTR_ERR(adau1701->gpio_pll_mode);
845 adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
847 if (IS_ERR(adau1701->sigmadsp)) {
848 ret = PTR_ERR(adau1701->sigmadsp);
852 ret = devm_snd_soc_register_component(&client->dev,
858 regulator_bulk_disable(ARRAY_SIZE(adau1701->supplies), adau1701->supplies);
884 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");