57 		rn_writel(BIT(PDM_DMA_STAT), rn_pdm_data->acp_base +  in pdm_irq_handler()
74 	rn_writel(physical_addr, acp_base + ACP_WOV_RX_RINGBUFADDR);  in init_pdm_ring_buffer()
75 	rn_writel(buffer_size, acp_base + ACP_WOV_RX_RINGBUFSIZE);  in init_pdm_ring_buffer()
76 	rn_writel(watermark_size, acp_base + ACP_WOV_RX_INTR_WATERMARK_SIZE);  in init_pdm_ring_buffer()
77 	rn_writel(0x01, acp_base + ACPAXI2AXI_ATU_CTRL);  in init_pdm_ring_buffer()
86 	rn_writel(pdm_clk_enable, acp_base + ACP_WOV_CLK_CTRL);  in enable_pdm_clock()
90 	rn_writel(pdm_ctrl, acp_base + ACP_WOV_MISC_CTRL);  in enable_pdm_clock()
99 	rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);  in enable_pdm_interrupts()
108 	rn_writel(ext_int_ctrl, acp_base + ACP_EXTERNAL_INTR_CNTL);  in disable_pdm_interrupts()
135 	rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);  in start_pdm_dma()
136 	rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);  in start_pdm_dma()
156 		rn_writel(pdm_dma_enable, acp_base + ACP_WOV_PDM_DMA_ENABLE);  in stop_pdm_dma()
170 		rn_writel(pdm_enable, acp_base + ACP_WOV_PDM_ENABLE);  in stop_pdm_dma()
172 	rn_writel(0x01, acp_base + ACP_WOV_PDM_FIFO_FLUSH);  in stop_pdm_dma()
186 	rn_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp_base +  in config_acp_dma()
188 	rn_writel(PAGE_SIZE_4K_ENABLE, rtd->acp_base +  in config_acp_dma()
196 		rn_writel(low, rtd->acp_base + ACP_SCRATCH_REG_0 + val);  in config_acp_dma()
198 		rn_writel(high, rtd->acp_base + ACP_SCRATCH_REG_0 + val + 4);  in config_acp_dma()
331 		rn_writel(ch_mask, rtd->acp_base + ACP_WOV_PDM_NO_OF_CHANNELS);  in acp_pdm_dai_trigger()
332 		rn_writel(PDM_DECIMATION_FACTOR, rtd->acp_base +  in acp_pdm_dai_trigger()