367 #define HDSPM_SyncRefMask    (HDSPM_SyncRef0|HDSPM_SyncRef1|\
505 #define HDSPM_SyncRef0 0x10000  /* Sync Reference */  macro
2707 		case HDSPM_SyncRef0: return 1; /* AES 1 */  in hdspm_pref_sync_ref()
2709 		case HDSPM_SyncRef1+HDSPM_SyncRef0: return 3; /* AES 3 */  in hdspm_pref_sync_ref()
2711 		case HDSPM_SyncRef2+HDSPM_SyncRef0: return 5; /* AES 5 */  in hdspm_pref_sync_ref()
2713 		case HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2716 		case HDSPM_SyncRef3+HDSPM_SyncRef0: return 9; /* TCO */  in hdspm_pref_sync_ref()
2725 			case HDSPM_SyncRef0: return 1;  /* MADI */  in hdspm_pref_sync_ref()
2727 			case HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2733 			case HDSPM_SyncRef0: return 1;  /* MADI */  in hdspm_pref_sync_ref()
2734 			case HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2815 			hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2822 				HDSPM_SyncRef1+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2829 				HDSPM_SyncRef2+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2837 				HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2844 				HDSPM_SyncRef3+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2860 				hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2867 					HDSPM_SyncRef0+HDSPM_SyncRef1;  in hdspm_set_pref_sync_ref()
2877 				hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2881 					HDSPM_SyncRef0+HDSPM_SyncRef1;  in hdspm_set_pref_sync_ref()
5339 			HDSPM_SyncRef0 |	/* AES1 is syncclock */  in snd_hdspm_set_defaults()