Lines Matching +full:min +full:- +full:sample +full:- +full:rate +full:- +full:hz
1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Modified 2006-06-01 for AES32 support by Remy Bruno
12 * Modified 2009-04-13 for proper metering by Florian Faber
15 * Modified 2009-04-14 for native float support by Florian Faber
18 * Modified 2009-04-26 fixed bug in rms metering by Florian Faber
21 * Modified 2009-04-30 added hw serial number support by Florian Faber
23 * Modified 2011-01-14 added S/PDIF input on RayDATs by Adrian Knoth
25 * Modified 2011-01-25 variable period sizes on RayDAT/AIO by Adrian Knoth
27 * Modified 2019-05-23 fix AIO single speed ADAT capture and playback
35 * --------- HDSPM_controlRegister ---------
44 * : . : . : . : x. : HDSPM_ClockModeMaster - 1: Master, 0: Slave
45 * : . : . : . : .210 : HDSPM_LatencyMask - 3 Bit value for latency
94 * ------------ HDSPM_WR_SETTINGS ----------
143 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
169 /* --- Write registers. ---
170 These are defined as byte-offsets from the iobase value. */
184 #define HDSPM_outputEnableBase 512 /* 512-767 input DMA */
185 #define HDSPM_inputEnableBase 768 /* 768-1023 output DMA */
192 #define HDSPM_MADI_mixerBase 32768 /* 32768-65535 for 2x64x64 Fader */
196 /* --- Read registers. ---
197 These are defined as byte-offsets from the iobase value */
200 /* after RME Windows driver sources, status2 is 4-byte word # 48 = word at
256 /* status is data bytes in MIDI-FIFO (0-128) */
267 /* the meters are regular i/o-mapped registers, but offset
269 when read; the least-significant 4 bits are full-scale counters;
270 the actual peak value is in the most-significant 24 bits.
285 /* --- Control Register bits --------- */
313 * -- MADI ONLY
360 /* --- bit helper defines */
378 #define HDSPM_SYNC_FROM_MADI 1 /* choices - used by "pref_sync_ref" */
400 /* AutoSync References - used by "autosync_ref" control switch */
417 /* --- control2 register bits --- */
430 /* --- Status Register bits --- */ /* MADI ONLY */ /* Bits defined here and
478 /* --- status bit helpers */
568 /* HDSPM_LockAES_bit is given by HDSPM_LockAES >> (AES# - 1) */
816 -1, -1, -1, -1,
817 -1, -1, -1, -1, -1, -1, -1, -1,
818 -1, -1, -1, -1, -1, -1, -1, -1,
819 -1, -1, -1, -1, -1, -1, -1, -1,
829 -1, -1, -1, -1,
830 -1, -1, -1, -1, -1, -1, -1, -1,
831 -1, -1, -1, -1, -1, -1, -1, -1,
832 -1, -1, -1, -1, -1, -1, -1, -1,
833 -1, -1, -1, -1, -1, -1, -1, -1,
834 -1, -1, -1, -1, -1, -1, -1, -1,
844 -1, -1, -1, -1,
845 -1, -1, -1, -1, -1, -1, -1, -1,
846 -1, -1, -1, -1, -1, -1, -1, -1,
847 -1, -1, -1, -1, -1, -1, -1, -1,
848 -1, -1, -1, -1, -1, -1, -1, -1,
849 -1, -1, -1, -1, -1, -1, -1, -1,
850 -1, -1, -1, -1, -1, -1, -1, -1,
859 -1, -1, -1, -1, -1, -1,
860 -1, -1, -1, -1, -1, -1, -1, -1,
861 -1, -1, -1, -1, -1, -1, -1, -1,
862 -1, -1, -1, -1, -1, -1, -1, -1,
863 -1, -1, -1, -1, -1, -1, -1, -1,
864 -1, -1, -1, -1, -1, -1, -1, -1,
874 -1, -1, -1, -1,
875 -1, -1, -1, -1, -1, -1, -1, -1,
876 -1, -1, -1, -1, -1, -1, -1, -1,
877 -1, -1, -1, -1, -1, -1, -1, -1,
878 -1, -1, -1, -1, -1, -1, -1, -1,
879 -1, -1, -1, -1, -1, -1, -1, -1,
888 -1, -1,
889 -1, -1, -1, -1, -1, -1, -1, -1,
890 -1, -1, -1, -1, -1, -1, -1, -1,
891 -1, -1, -1, -1, -1, -1, -1, -1,
892 -1, -1, -1, -1, -1, -1, -1, -1,
893 -1, -1, -1, -1, -1, -1, -1, -1,
894 -1, -1, -1, -1, -1, -1, -1, -1
904 -1, -1, -1, -1, -1, -1, -1, -1,
905 -1, -1, -1, -1, -1, -1, -1, -1,
906 -1, -1, -1, -1, -1, -1, -1, -1,
907 -1, -1, -1, -1, -1, -1, -1, -1,
908 -1, -1, -1, -1, -1, -1, -1, -1,
909 -1, -1, -1, -1, -1, -1, -1, -1
918 -1, -1, -1, -1,
919 -1, -1, -1, -1, -1, -1, -1, -1,
920 -1, -1, -1, -1, -1, -1, -1, -1,
921 -1, -1, -1, -1, -1, -1, -1, -1,
922 -1, -1, -1, -1, -1, -1, -1, -1,
923 -1, -1, -1, -1, -1, -1, -1, -1,
924 -1, -1, -1, -1, -1, -1, -1, -1
934 -1, -1,
935 -1, -1, -1, -1, -1, -1, -1, -1,
936 -1, -1, -1, -1, -1, -1, -1, -1,
937 -1, -1, -1, -1, -1, -1, -1, -1,
938 -1, -1, -1, -1, -1, -1, -1, -1,
939 -1, -1, -1, -1, -1, -1, -1, -1,
940 -1, -1, -1, -1, -1, -1, -1, -1
946 -1, -1, -1, -1, -1, -1, -1, -1,
947 -1, -1, -1, -1, -1, -1, -1, -1,
948 -1, -1, -1, -1, -1, -1, -1, -1,
949 -1, -1, -1, -1, -1, -1, -1, -1,
950 -1, -1, -1, -1, -1, -1, -1, -1,
951 -1, -1, -1, -1, -1, -1, -1, -1
975 int wordclock; /* 0=1:1, 1=44.1->48, 2=48->44.1 */
977 int pull; /* 0=0, 1=+0.1%, 2=-0.1%, 3=+4%, 4=-4%*/
1057 /* full mixer accessible over mixer ioctl or hwdep-device */
1127 return ((AIO == hdspm->io_type) || (RayDAT == hdspm->io_type));
1137 writel(val, hdspm->iobase + reg);
1142 return readl(hdspm->iobase + reg);
1155 return hdspm->mixer->ch[chan].in[in];
1163 return hdspm->mixer->ch[chan].pb[pb];
1170 return -1;
1175 (hdspm->mixer->ch[chan].in[in] = data & 0xFFFF));
1183 return -1;
1188 (hdspm->mixer->ch[chan].pb[pb] = data & 0xFFFF));
1193 /* enable DMA for specific channels, now available for DSP-MADI */
1210 spin_lock_irqsave(&hdspm->lock, flags);
1211 if ((hdspm->playback_pid != hdspm->capture_pid) &&
1212 (hdspm->playback_pid >= 0) && (hdspm->capture_pid >= 0)) {
1215 spin_unlock_irqrestore(&hdspm->lock, flags);
1219 /* round arbitrary sample rates to commonly known rates */
1220 static int hdspm_round_frequency(int rate)
1222 if (rate < 38050)
1224 if (rate < 46008)
1235 * user-provided DS/QS bits in the control register
1238 static int hdspm_rate_multiplier(struct hdspm *hdspm, int rate)
1240 if (rate <= 48000) {
1241 if (hdspm->control_register & HDSPM_QuadSpeed)
1242 return rate * 4;
1243 else if (hdspm->control_register &
1245 return rate * 2;
1247 return rate;
1250 /* check for external sample rate, returns the sample rate in Hz*/
1254 int syncref, rate = 0, rate_bits;
1256 switch (hdspm->io_type) {
1264 /* Check WC sync and get sample rate */
1277 /* Check AES sync and get sample rate */
1278 if (hdspm_aes_sync_check(hdspm, syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1))
1280 syncref - HDSPM_AES32_AUTOSYNC_FROM_AES1));
1285 /* Check TCO sync and get sample rate */
1298 rate = 0; /* no lock */
1302 rate = 32000; break;
1304 rate = 44100; break;
1306 rate = 48000; break;
1308 rate = 64000; break;
1310 rate = 88200; break;
1312 rate = 96000; break;
1314 rate = 128000; break;
1316 rate = 176400; break;
1318 rate = 192000; break;
1320 rate = 0; break;
1331 rate = 0;
1342 rate = 32000;
1345 rate = 44100;
1348 rate = 48000;
1351 rate = 64000;
1354 rate = 88200;
1357 rate = 96000;
1360 rate = 128000;
1363 rate = 176400;
1366 rate = 192000;
1369 rate = 0;
1374 /* if rate detected and Syncref is Word than have it,
1377 if (rate != 0 &&
1379 return hdspm_rate_multiplier(hdspm, rate);
1387 rate = 32000;
1390 rate = 44100;
1393 rate = 48000;
1396 rate = 64000;
1399 rate = 88200;
1402 rate = 96000;
1405 rate = 128000;
1408 rate = 176400;
1411 rate = 192000;
1414 rate = 0;
1420 /* check sample rate from TCO or SYNC_IN */
1437 rate = hdspm_round_frequency(
1442 rate = hdspm_rate_multiplier(hdspm, rate);
1447 return rate;
1455 n = hdspm_decode_latency(hdspm->control_register);
1464 if ((7 == n) && (RayDAT == hdspm->io_type || AIO == hdspm->io_type))
1465 n = -1;
1473 hdspm->period_bytes = 4 * hdspm_get_latency(hdspm);
1483 switch (hdspm->io_type) {
1487 position /= 4; /* Bytes per sample */
1491 (hdspm->period_bytes / 4) : 0;
1500 s->control_register |= (HDSPM_AudioInterruptEnable | HDSPM_Start);
1501 hdspm_write(s, HDSPM_controlRegister, s->control_register);
1506 s->control_register &= ~(HDSPM_Start | HDSPM_AudioInterruptEnable);
1507 hdspm_write(s, HDSPM_controlRegister, s->control_register);
1514 int n = hdspm->period_bytes;
1515 void *buf = hdspm->playback_buffer;
1530 spin_lock_irq(&s->lock);
1553 s->control_register &= ~HDSPM_LatencyMask;
1554 s->control_register |= hdspm_encode_latency(n);
1556 hdspm_write(s, HDSPM_controlRegister, s->control_register);
1560 spin_unlock_irq(&s->lock);
1572 switch (hdspm->io_type) {
1593 static void hdspm_set_dds_value(struct hdspm *hdspm, int rate)
1597 if (snd_BUG_ON(rate <= 0))
1600 if (rate >= 112000)
1601 rate /= 4;
1602 else if (rate >= 56000)
1603 rate /= 2;
1605 switch (hdspm->io_type) {
1622 n = div_u64(n, rate);
1628 /* dummy set rate lets see what happens */
1629 static int hdspm_set_rate(struct hdspm * hdspm, int rate, int called_internally)
1636 /* ASSUMPTION: hdspm->lock is either set, or there is no need for
1640 if (!(hdspm->control_register & HDSPM_ClockModeMaster)) {
1642 /* SLAVE --- */
1649 dev_warn(hdspm->card->dev,
1661 dev_warn(hdspm->card->dev,
1665 } else if (rate != external_freq) {
1667 dev_warn(hdspm->card->dev,
1668 "Warning: No AutoSync source for requested rate\n");
1674 current_rate = hdspm->system_sample_rate;
1682 externally-driven rate changes. All we can do is to flag rate
1693 if (rate <= 48000)
1695 else if (rate <= 96000)
1700 switch (rate) {
1729 return -EINVAL;
1733 && (hdspm->capture_pid >= 0 || hdspm->playback_pid >= 0)) {
1734 dev_err(hdspm->card->dev,
1738 hdspm->capture_pid, hdspm->playback_pid);
1739 return -EBUSY;
1742 hdspm->control_register &= ~HDSPM_FrequencyMask;
1743 hdspm->control_register |= rate_bits;
1744 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1748 hdspm_set_dds_value(hdspm, rate);
1750 if (AES32 == hdspm->io_type && rate != current_rate)
1753 hdspm->system_sample_rate = rate;
1755 if (rate <= 48000) {
1756 hdspm->channel_map_in = hdspm->channel_map_in_ss;
1757 hdspm->channel_map_out = hdspm->channel_map_out_ss;
1758 hdspm->max_channels_in = hdspm->ss_in_channels;
1759 hdspm->max_channels_out = hdspm->ss_out_channels;
1760 hdspm->port_names_in = hdspm->port_names_in_ss;
1761 hdspm->port_names_out = hdspm->port_names_out_ss;
1762 } else if (rate <= 96000) {
1763 hdspm->channel_map_in = hdspm->channel_map_in_ds;
1764 hdspm->channel_map_out = hdspm->channel_map_out_ds;
1765 hdspm->max_channels_in = hdspm->ds_in_channels;
1766 hdspm->max_channels_out = hdspm->ds_out_channels;
1767 hdspm->port_names_in = hdspm->port_names_in_ds;
1768 hdspm->port_names_out = hdspm->port_names_out_ds;
1770 hdspm->channel_map_in = hdspm->channel_map_in_qs;
1771 hdspm->channel_map_out = hdspm->channel_map_out_qs;
1772 hdspm->max_channels_in = hdspm->qs_in_channels;
1773 hdspm->max_channels_out = hdspm->qs_out_channels;
1774 hdspm->port_names_in = hdspm->port_names_in_qs;
1775 hdspm->port_names_out = hdspm->port_names_out_qs;
1779 return -1;
1804 /*----------------------------------------------------------------------------
1806 ----------------------------------------------------------------------------*/
1811 /* the hardware already does the relevant bit-mask with 0xff */
1812 return hdspm_read(hdspm, hdspm->midi[id].dataIn);
1818 /* the hardware already does the relevant bit-mask with 0xff */
1819 return hdspm_write(hdspm, hdspm->midi[id].dataOut, val);
1824 return hdspm_read(hdspm, hdspm->midi[id].statusIn) & 0xFF;
1831 fifo_bytes_used = hdspm_read(hdspm, hdspm->midi[id].statusOut) & 0xFF;
1834 return 128 - fifo_bytes_used;
1843 while (snd_hdspm_midi_input_available(hdspm, id) && --count)
1857 spin_lock_irqsave (&hmidi->lock, flags);
1858 if (hmidi->output &&
1859 !snd_rawmidi_transmit_empty (hmidi->output)) {
1860 n_pending = snd_hdspm_midi_output_possible (hmidi->hdspm,
1861 hmidi->id);
1866 to_write = snd_rawmidi_transmit (hmidi->output, buf,
1870 snd_hdspm_midi_write_byte (hmidi->hdspm,
1871 hmidi->id,
1876 spin_unlock_irqrestore (&hmidi->lock, flags);
1889 spin_lock_irqsave (&hmidi->lock, flags);
1890 n_pending = snd_hdspm_midi_input_available (hmidi->hdspm, hmidi->id);
1892 if (hmidi->input) {
1896 buf[i] = snd_hdspm_midi_read_byte (hmidi->hdspm,
1897 hmidi->id);
1899 snd_rawmidi_receive (hmidi->input, buf,
1903 while (n_pending--)
1904 snd_hdspm_midi_read_byte (hmidi->hdspm,
1905 hmidi->id);
1908 hmidi->pending = 0;
1909 spin_unlock_irqrestore(&hmidi->lock, flags);
1911 spin_lock_irqsave(&hmidi->hdspm->lock, flags);
1912 hmidi->hdspm->control_register |= hmidi->ie;
1913 hdspm_write(hmidi->hdspm, HDSPM_controlRegister,
1914 hmidi->hdspm->control_register);
1915 spin_unlock_irqrestore(&hmidi->hdspm->lock, flags);
1927 hmidi = substream->rmidi->private_data;
1928 hdspm = hmidi->hdspm;
1930 spin_lock_irqsave (&hdspm->lock, flags);
1932 if (!(hdspm->control_register & hmidi->ie)) {
1933 snd_hdspm_flush_midi_input (hdspm, hmidi->id);
1934 hdspm->control_register |= hmidi->ie;
1937 hdspm->control_register &= ~hmidi->ie;
1940 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
1941 spin_unlock_irqrestore (&hdspm->lock, flags);
1950 spin_lock_irqsave (&hmidi->lock, flags);
1952 /* this does not bump hmidi->istimer, because the
1958 if (hmidi->istimer)
1959 mod_timer(&hmidi->timer, 1 + jiffies);
1961 spin_unlock_irqrestore (&hmidi->lock, flags);
1970 hmidi = substream->rmidi->private_data;
1971 spin_lock_irqsave (&hmidi->lock, flags);
1973 if (!hmidi->istimer) {
1974 timer_setup(&hmidi->timer,
1976 mod_timer(&hmidi->timer, 1 + jiffies);
1977 hmidi->istimer++;
1980 if (hmidi->istimer && --hmidi->istimer <= 0)
1981 del_timer (&hmidi->timer);
1983 spin_unlock_irqrestore (&hmidi->lock, flags);
1992 hmidi = substream->rmidi->private_data;
1993 spin_lock_irq (&hmidi->lock);
1994 snd_hdspm_flush_midi_input (hmidi->hdspm, hmidi->id);
1995 hmidi->input = substream;
1996 spin_unlock_irq (&hmidi->lock);
2005 hmidi = substream->rmidi->private_data;
2006 spin_lock_irq (&hmidi->lock);
2007 hmidi->output = substream;
2008 spin_unlock_irq (&hmidi->lock);
2019 hmidi = substream->rmidi->private_data;
2020 spin_lock_irq (&hmidi->lock);
2021 hmidi->input = NULL;
2022 spin_unlock_irq (&hmidi->lock);
2033 hmidi = substream->rmidi->private_data;
2034 spin_lock_irq (&hmidi->lock);
2035 hmidi->output = NULL;
2036 spin_unlock_irq (&hmidi->lock);
2061 hdspm->midi[id].id = id;
2062 hdspm->midi[id].hdspm = hdspm;
2063 spin_lock_init (&hdspm->midi[id].lock);
2066 if (MADIface == hdspm->io_type) {
2067 /* MIDI-over-MADI on HDSPe MADIface */
2068 hdspm->midi[0].dataIn = HDSPM_midiDataIn2;
2069 hdspm->midi[0].statusIn = HDSPM_midiStatusIn2;
2070 hdspm->midi[0].dataOut = HDSPM_midiDataOut2;
2071 hdspm->midi[0].statusOut = HDSPM_midiStatusOut2;
2072 hdspm->midi[0].ie = HDSPM_Midi2InterruptEnable;
2073 hdspm->midi[0].irq = HDSPM_midi2IRQPending;
2075 hdspm->midi[0].dataIn = HDSPM_midiDataIn0;
2076 hdspm->midi[0].statusIn = HDSPM_midiStatusIn0;
2077 hdspm->midi[0].dataOut = HDSPM_midiDataOut0;
2078 hdspm->midi[0].statusOut = HDSPM_midiStatusOut0;
2079 hdspm->midi[0].ie = HDSPM_Midi0InterruptEnable;
2080 hdspm->midi[0].irq = HDSPM_midi0IRQPending;
2083 hdspm->midi[1].dataIn = HDSPM_midiDataIn1;
2084 hdspm->midi[1].statusIn = HDSPM_midiStatusIn1;
2085 hdspm->midi[1].dataOut = HDSPM_midiDataOut1;
2086 hdspm->midi[1].statusOut = HDSPM_midiStatusOut1;
2087 hdspm->midi[1].ie = HDSPM_Midi1InterruptEnable;
2088 hdspm->midi[1].irq = HDSPM_midi1IRQPending;
2089 } else if ((2 == id) && (MADI == hdspm->io_type)) {
2090 /* MIDI-over-MADI on HDSPe MADI */
2091 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
2092 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
2093 hdspm->midi[2].dataOut = HDSPM_midiDataOut2;
2094 hdspm->midi[2].statusOut = HDSPM_midiStatusOut2;
2095 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
2096 hdspm->midi[2].irq = HDSPM_midi2IRQPending;
2099 hdspm->midi[2].dataIn = HDSPM_midiDataIn2;
2100 hdspm->midi[2].statusIn = HDSPM_midiStatusIn2;
2101 hdspm->midi[2].dataOut = -1;
2102 hdspm->midi[2].statusOut = -1;
2103 hdspm->midi[2].ie = HDSPM_Midi2InterruptEnable;
2104 hdspm->midi[2].irq = HDSPM_midi2IRQPendingAES;
2107 hdspm->midi[3].dataIn = HDSPM_midiDataIn3;
2108 hdspm->midi[3].statusIn = HDSPM_midiStatusIn3;
2109 hdspm->midi[3].dataOut = -1;
2110 hdspm->midi[3].statusOut = -1;
2111 hdspm->midi[3].ie = HDSPM_Midi3InterruptEnable;
2112 hdspm->midi[3].irq = HDSPM_midi3IRQPending;
2115 if ((id < 2) || ((2 == id) && ((MADI == hdspm->io_type) ||
2116 (MADIface == hdspm->io_type)))) {
2117 if ((id == 0) && (MADIface == hdspm->io_type)) {
2119 card->shortname);
2120 } else if ((id == 2) && (MADI == hdspm->io_type)) {
2122 card->shortname);
2125 card->shortname, id+1);
2128 &hdspm->midi[id].rmidi);
2132 snprintf(hdspm->midi[id].rmidi->name,
2133 sizeof(hdspm->midi[id].rmidi->name),
2134 "%s MIDI %d", card->id, id+1);
2135 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
2137 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2140 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2144 hdspm->midi[id].rmidi->info_flags |=
2151 card->shortname, id+1);
2153 &hdspm->midi[id].rmidi);
2157 snprintf(hdspm->midi[id].rmidi->name,
2158 sizeof(hdspm->midi[id].rmidi->name),
2159 "%s MTC %d", card->id, id+1);
2160 hdspm->midi[id].rmidi->private_data = &hdspm->midi[id];
2162 snd_rawmidi_set_ops(hdspm->midi[id].rmidi,
2166 hdspm->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_INPUT;
2178 while (i < hdspm->midiPorts) {
2179 if (hdspm->midi[i].pending)
2180 snd_hdspm_midi_input_read(&hdspm->midi[i]);
2187 /*-----------------------------------------------------------------------------
2189 ----------------------------------------------------------------------------*/
2191 /* get the system sample rate which is set */
2196 unsigned int period, rate;
2199 rate = hdspm_calc_dds_value(hdspm, period);
2201 return rate;
2205 * Calculate the real sample rate from the
2210 unsigned int rate;
2212 rate = hdspm_get_pll_freq(hdspm);
2214 if (rate > 207000) {
2215 /* Unreasonable high sample rate as seen on PCI MADI cards. */
2217 /* master mode, return internal sample rate */
2218 rate = hdspm->system_sample_rate;
2220 /* slave mode, return external sample rate */
2221 rate = hdspm_external_sample_rate(hdspm);
2222 if (!rate)
2223 rate = hdspm->system_sample_rate;
2227 return rate;
2245 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2246 uinfo->count = 1;
2247 uinfo->value.integer.min = 27000;
2248 uinfo->value.integer.max = 207000;
2249 uinfo->value.integer.step = 1;
2260 ucontrol->value.integer.value[0] = hdspm_get_system_sample_rate(hdspm);
2269 int rate = ucontrol->value.integer.value[0];
2271 if (rate < 27000 || rate > 207000)
2272 return -EINVAL;
2273 hdspm_set_dds_value(hdspm, ucontrol->value.integer.value[0]);
2279 * Returns the WordClock sample rate class for the given card.
2285 switch (hdspm->io_type) {
2303 * Returns the TCO sample rate class for the given card.
2309 if (hdspm->tco) {
2310 switch (hdspm->io_type) {
2328 * Returns the SYNC_IN sample rate class for the given card.
2334 if (hdspm->tco) {
2335 switch (hdspm->io_type) {
2349 * Returns the AES sample rate class for the given card.
2355 switch (hdspm->io_type) {
2366 * Returns the sample rate class for input source <idx> for
2380 /* Helper function to query the external sample rate and return the
2385 int rate = hdspm_external_sample_rate(hdspm);
2388 if (HDSPM_bit2freq(i) == rate) {
2420 switch (hdspm->io_type) {
2422 switch (kcontrol->private_value) {
2424 ucontrol->value.enumerated.item[0] =
2428 ucontrol->value.enumerated.item[0] =
2432 ucontrol->value.enumerated.item[0] =
2436 ucontrol->value.enumerated.item[0] =
2438 kcontrol->private_value-1);
2443 switch (kcontrol->private_value) {
2445 ucontrol->value.enumerated.item[0] =
2449 ucontrol->value.enumerated.item[0] =
2453 ucontrol->value.enumerated.item[0] =
2457 ucontrol->value.enumerated.item[0] =
2459 kcontrol->private_value-1);
2465 switch (kcontrol->private_value) {
2467 ucontrol->value.enumerated.item[0] =
2471 ucontrol->value.enumerated.item[0] =
2475 ucontrol->value.enumerated.item[0] =
2478 case 11: /* External Rate */
2479 ucontrol->value.enumerated.item[0] =
2483 ucontrol->value.enumerated.item[0] =
2485 kcontrol->private_value -
2493 ucontrol->value.enumerated.item[0] =
2518 * @returns 0 - master, 1 - slave
2522 switch (hdspm->io_type) {
2525 if (hdspm->settings_register & HDSPM_c0Master)
2530 if (hdspm->control_register & HDSPM_ClockModeMaster)
2540 * @param mode 0 - master, 1 - slave
2564 ucontrol->value.enumerated.item[0] = hdspm_system_clock_mode(hdspm);
2575 return -EBUSY;
2577 val = ucontrol->value.enumerated.item[0];
2601 switch (hdspm->system_sample_rate) {
2613 return -1;
2618 int rate;
2621 rate = 32000; break;
2623 rate = 44100; break;
2625 rate = 48000; break;
2627 rate = 64000; break;
2629 rate = 88200; break;
2631 rate = 96000; break;
2633 rate = 128000; break;
2635 rate = 176400; break;
2637 rate = 192000; break;
2639 rate = 48000;
2641 hdspm_set_rate(hdspm, rate, 1);
2656 ucontrol->value.enumerated.item[0] = hdspm_clock_source(hdspm);
2668 return -EBUSY;
2669 val = ucontrol->value.enumerated.item[0];
2674 spin_lock_irq(&hdspm->lock);
2679 spin_unlock_irq(&hdspm->lock);
2703 switch (hdspm->io_type) {
2705 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2722 if (hdspm->tco) {
2723 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2731 switch (hdspm->control_register & HDSPM_SyncRefMask) {
2741 if (hdspm->tco) {
2742 switch ((hdspm->settings_register &
2755 switch ((hdspm->settings_register &
2771 if (hdspm->tco) {
2772 switch ((hdspm->settings_register &
2782 switch ((hdspm->settings_register &
2795 return -1;
2808 switch (hdspm->io_type) {
2810 hdspm->control_register &= ~HDSPM_SyncRefMask;
2815 hdspm->control_register |= HDSPM_SyncRef0;
2818 hdspm->control_register |= HDSPM_SyncRef1;
2821 hdspm->control_register |=
2825 hdspm->control_register |= HDSPM_SyncRef2;
2828 hdspm->control_register |=
2832 hdspm->control_register |=
2836 hdspm->control_register |=
2840 hdspm->control_register |= HDSPM_SyncRef3;
2843 hdspm->control_register |=
2847 return -1;
2854 hdspm->control_register &= ~HDSPM_SyncRefMask;
2855 if (hdspm->tco) {
2860 hdspm->control_register |= HDSPM_SyncRef0;
2863 hdspm->control_register |= HDSPM_SyncRef1;
2866 hdspm->control_register |=
2870 return -1;
2877 hdspm->control_register |= HDSPM_SyncRef0;
2880 hdspm->control_register |=
2884 return -1;
2891 if (hdspm->tco) {
2902 default: return -1;
2914 default: return -1;
2920 if (hdspm->tco) {
2928 default: return -1;
2937 default: return -1;
2943 switch (hdspm->io_type) {
2946 hdspm->settings_register &= ~HDSPM_c0_SyncRefMask;
2947 hdspm->settings_register |= HDSPM_c0_SyncRef0 * p;
2948 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
2955 hdspm->control_register);
2967 snd_ctl_enum_info(uinfo, 1, hdspm->texts_autosync_items, hdspm->texts_autosync);
2979 ucontrol->value.enumerated.item[0] = psf;
2983 return -1;
2993 return -EBUSY;
2995 val = ucontrol->value.enumerated.item[0];
2999 else if (val >= hdspm->texts_autosync_items)
3000 val = hdspm->texts_autosync_items-1;
3002 spin_lock_irq(&hdspm->lock);
3006 spin_unlock_irq(&hdspm->lock);
3023 if (AES32 == hdspm->io_type) {
3033 } else if (MADI == hdspm->io_type) {
3061 if (AES32 == hdspm->io_type) {
3066 } else if (MADI == hdspm->io_type) {
3080 ucontrol->value.enumerated.item[0] = hdspm_autosync_ref(hdspm);
3126 ucontrol->value.enumerated.item[0] = ret;
3186 ucontrol->value.enumerated.item[0] = hdspm_tco_ltc_frames(hdspm);
3204 reg = hdspm->settings_register;
3206 reg = hdspm->control_register;
3217 reg = &(hdspm->settings_register);
3220 reg = &(hdspm->control_register);
3240 u32 regmask = kcontrol->private_value;
3242 spin_lock_irq(&hdspm->lock);
3243 ucontrol->value.integer.value[0] = hdspm_toggle_setting(hdspm, regmask);
3244 spin_unlock_irq(&hdspm->lock);
3252 u32 regmask = kcontrol->private_value;
3257 return -EBUSY;
3258 val = ucontrol->value.integer.value[0] & 1;
3259 spin_lock_irq(&hdspm->lock);
3262 spin_unlock_irq(&hdspm->lock);
3277 return (hdspm->control_register & HDSPM_InputSelect0) ? 1 : 0;
3283 hdspm->control_register |= HDSPM_InputSelect0;
3285 hdspm->control_register &= ~HDSPM_InputSelect0;
3286 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3304 spin_lock_irq(&hdspm->lock);
3305 ucontrol->value.enumerated.item[0] = hdspm_input_select(hdspm);
3306 spin_unlock_irq(&hdspm->lock);
3318 return -EBUSY;
3319 val = ucontrol->value.integer.value[0] & 1;
3320 spin_lock_irq(&hdspm->lock);
3323 spin_unlock_irq(&hdspm->lock);
3339 return (hdspm->control_register & HDSPM_DS_DoubleWire) ? 1 : 0;
3345 hdspm->control_register |= HDSPM_DS_DoubleWire;
3347 hdspm->control_register &= ~HDSPM_DS_DoubleWire;
3348 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3366 spin_lock_irq(&hdspm->lock);
3367 ucontrol->value.enumerated.item[0] = hdspm_ds_wire(hdspm);
3368 spin_unlock_irq(&hdspm->lock);
3380 return -EBUSY;
3381 val = ucontrol->value.integer.value[0] & 1;
3382 spin_lock_irq(&hdspm->lock);
3385 spin_unlock_irq(&hdspm->lock);
3401 if (hdspm->control_register & HDSPM_QS_DoubleWire)
3403 if (hdspm->control_register & HDSPM_QS_QuadWire)
3410 hdspm->control_register &= ~(HDSPM_QS_DoubleWire | HDSPM_QS_QuadWire);
3415 hdspm->control_register |= HDSPM_QS_DoubleWire;
3418 hdspm->control_register |= HDSPM_QS_QuadWire;
3421 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3439 spin_lock_irq(&hdspm->lock);
3440 ucontrol->value.enumerated.item[0] = hdspm_qs_wire(hdspm);
3441 spin_unlock_irq(&hdspm->lock);
3453 return -EBUSY;
3454 val = ucontrol->value.integer.value[0];
3459 spin_lock_irq(&hdspm->lock);
3462 spin_unlock_irq(&hdspm->lock);
3477 u32 reg = hdspm->settings_register & (regmask * 3);
3483 hdspm->settings_register &= ~(regmask * 3);
3484 hdspm->settings_register |= (regmask * mode);
3485 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
3493 u32 regmask = kcontrol->private_value;
3496 static const char *const texts_levels[] = { "Hi Gain", "+4 dBu", "-10 dBV" };
3513 u32 regmask = kcontrol->private_value;
3515 spin_lock_irq(&hdspm->lock);
3516 ucontrol->value.enumerated.item[0] = hdspm_tristate(hdspm, regmask);
3517 spin_unlock_irq(&hdspm->lock);
3525 u32 regmask = kcontrol->private_value;
3530 return -EBUSY;
3531 val = ucontrol->value.integer.value[0];
3537 spin_lock_irq(&hdspm->lock);
3540 spin_unlock_irq(&hdspm->lock);
3555 if (hdspm->control_register & HDSPM_QuadSpeed)
3557 if (hdspm->control_register & HDSPM_DoubleSpeed)
3564 hdspm->control_register &= ~(HDSPM_DoubleSpeed | HDSPM_QuadSpeed);
3569 hdspm->control_register |= HDSPM_DoubleSpeed;
3572 hdspm->control_register |= HDSPM_QuadSpeed;
3575 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
3593 spin_lock_irq(&hdspm->lock);
3594 ucontrol->value.enumerated.item[0] = hdspm_madi_speedmode(hdspm);
3595 spin_unlock_irq(&hdspm->lock);
3607 return -EBUSY;
3608 val = ucontrol->value.integer.value[0];
3613 spin_lock_irq(&hdspm->lock);
3616 spin_unlock_irq(&hdspm->lock);
3635 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3636 uinfo->count = 3;
3637 uinfo->value.integer.min = 0;
3638 uinfo->value.integer.max = 65535;
3639 uinfo->value.integer.step = 1;
3650 source = ucontrol->value.integer.value[0];
3654 source = 2 * HDSPM_MAX_CHANNELS - 1;
3656 destination = ucontrol->value.integer.value[1];
3660 destination = HDSPM_MAX_CHANNELS - 1;
3662 spin_lock_irq(&hdspm->lock);
3664 ucontrol->value.integer.value[2] =
3666 source - HDSPM_MAX_CHANNELS);
3668 ucontrol->value.integer.value[2] =
3671 spin_unlock_irq(&hdspm->lock);
3686 return -EBUSY;
3688 source = ucontrol->value.integer.value[0];
3689 destination = ucontrol->value.integer.value[1];
3692 return -1;
3694 return -1;
3696 gain = ucontrol->value.integer.value[2];
3698 spin_lock_irq(&hdspm->lock);
3702 source -
3711 source - HDSPM_MAX_CHANNELS,
3717 spin_unlock_irq(&hdspm->lock);
3739 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3740 uinfo->count = 1;
3741 uinfo->value.integer.min = 0;
3742 uinfo->value.integer.max = 64;
3743 uinfo->value.integer.step = 1;
3753 channel = ucontrol->id.index - 1;
3756 return -EINVAL;
3758 spin_lock_irq(&hdspm->lock);
3759 ucontrol->value.integer.value[0] =
3761 spin_unlock_irq(&hdspm->lock);
3775 return -EBUSY;
3777 channel = ucontrol->id.index - 1;
3780 return -EINVAL;
3782 gain = ucontrol->value.integer.value[0]*UNITY_GAIN/64;
3784 spin_lock_irq(&hdspm->lock);
3791 spin_unlock_irq(&hdspm->lock);
3835 switch (hdspm->io_type) {
3909 switch (hdspm->io_type) {
3969 if (hdspm->tco) {
3970 switch (hdspm->io_type) {
4012 int val = -1;
4014 switch (hdspm->io_type) {
4016 switch (kcontrol->private_value) {
4025 kcontrol->private_value-1);
4030 switch (kcontrol->private_value) {
4039 kcontrol->private_value-1);
4044 switch (kcontrol->private_value) {
4061 switch (kcontrol->private_value) {
4070 kcontrol->private_value-1);
4076 if (hdspm->tco) {
4077 switch (kcontrol->private_value) {
4092 if (-1 == val)
4095 ucontrol->value.enumerated.item[0] = val;
4108 switch (hdspm->tco->input) {
4119 switch (hdspm->tco->framerate) {
4143 switch (hdspm->tco->wordclock) {
4154 switch (hdspm->tco->samplerate) {
4165 switch (hdspm->tco->pull) {
4182 if (1 == hdspm->tco->term) {
4207 /* TODO freq from app could be supported here, see tco->samplerate */
4218 ucontrol->value.enumerated.item[0] = hdspm->tco->samplerate;
4228 if (hdspm->tco->samplerate != ucontrol->value.enumerated.item[0]) {
4229 hdspm->tco->samplerate = ucontrol->value.enumerated.item[0];
4254 static const char *const texts[] = { "0", "+ 0.1 %", "- 0.1 %",
4255 "+ 4 %", "- 4 %" };
4265 ucontrol->value.enumerated.item[0] = hdspm->tco->pull;
4275 if (hdspm->tco->pull != ucontrol->value.enumerated.item[0]) {
4276 hdspm->tco->pull = ucontrol->value.enumerated.item[0];
4300 static const char *const texts[] = { "1:1", "44.1 -> 48", "48 -> 44.1" };
4310 ucontrol->value.enumerated.item[0] = hdspm->tco->wordclock;
4320 if (hdspm->tco->wordclock != ucontrol->value.enumerated.item[0]) {
4321 hdspm->tco->wordclock = ucontrol->value.enumerated.item[0];
4357 ucontrol->value.enumerated.item[0] = hdspm->tco->framerate;
4367 if (hdspm->tco->framerate != ucontrol->value.enumerated.item[0]) {
4368 hdspm->tco->framerate = ucontrol->value.enumerated.item[0];
4403 ucontrol->value.enumerated.item[0] = hdspm->tco->input;
4413 if (hdspm->tco->input != ucontrol->value.enumerated.item[0]) {
4414 hdspm->tco->input = ucontrol->value.enumerated.item[0];
4439 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
4440 uinfo->count = 1;
4441 uinfo->value.integer.min = 0;
4442 uinfo->value.integer.max = 1;
4453 ucontrol->value.integer.value[0] = hdspm->tco->term;
4464 if (hdspm->tco->term != ucontrol->value.integer.value[0]) {
4465 hdspm->tco->term = ucontrol->value.integer.value[0];
4484 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4485 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4504 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4505 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4518 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4519 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
4559 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4588 HDSPM_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
4589 HDSPM_AUTOSYNC_SAMPLE_RATE("External Rate", 11),
4625 HDSPM_TCO_SAMPLE_RATE("TCO Sample Rate", 0),
4628 HDSPM_TCO_FRAME_RATE("TCO Frame Rate", 0),
4633 HDSPM_TCO_LTC_FRAMES("TCO Detected Frame Rate"),
4645 for (i = hdspm->ds_out_channels; i < hdspm->ss_out_channels; ++i) {
4646 if (hdspm->system_sample_rate > 48000) {
4647 hdspm->playback_mixer_ctls[i]->vd[0].access =
4652 hdspm->playback_mixer_ctls[i]->vd[0].access =
4656 snd_ctl_notify(hdspm->card, SNDRV_CTL_EVENT_MASK_VALUE |
4658 &hdspm->playback_mixer_ctls[i]->id);
4673 switch (hdspm->io_type) {
4708 if (hdspm->system_sample_rate >= 128000) {
4709 limit = hdspm->qs_out_channels;
4710 } else if (hdspm->system_sample_rate >= 64000) {
4711 limit = hdspm->ds_out_channels;
4713 limit = hdspm->ss_out_channels;
4721 hdspm->playback_mixer_ctls[idx] = kctl;
4725 if (hdspm->tco) {
4740 /*------------------------------------------------------------
4742 ------------------------------------------------------------*/
4748 struct hdspm *hdspm = entry->private_data;
4753 u32 rate;
4755 snd_iprintf(buffer, "--- TCO ---\n");
4758 control = hdspm->control_register;
4802 switch (hdspm->io_type) {
4819 /* rate = freq_const/period; */
4820 rate = div_u64(freq_const, period);
4823 rate *= 4;
4825 rate *= 2;
4828 snd_iprintf(buffer, " Frequency: %u Hz\n",
4829 (unsigned int) rate);
4860 struct hdspm *hdspm = entry->private_data;
4872 hdspm->card_name, hdspm->card->number + 1,
4873 hdspm->firmware_rev,
4880 hdspm->serial);
4883 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
4885 snd_iprintf(buffer, "--- System ---\n");
4892 hdspm->irq_count);
4894 "HW pointer: id = %d, rawptr = %d (%d->%d) "
4899 (2 * (int)hdspm->period_bytes),
4900 ((status & HDSPM_BufferPositionMask) - 64) %
4901 (2 * (int)hdspm->period_bytes),
4917 hdspm->control_register, hdspm->control2_register,
4921 snd_iprintf(buffer, "--- Settings ---\n");
4927 x, (unsigned long) hdspm->period_bytes);
4930 str_on_off(hdspm->control_register & HDSPM_LineOut));
4935 str_on_off(hdspm->control_register & HDSPM_clr_tms),
4936 (hdspm->control_register & HDSPM_TX_64ch) ? "64" : "56",
4937 str_on_off(hdspm->control_register & HDSPM_AutoInp));
4940 if (!(hdspm->control_register & HDSPM_ClockModeMaster))
4967 hdspm->system_sample_rate);
4970 snd_iprintf(buffer, "--- Status:\n");
4998 autosync_ref = "---";
5022 struct hdspm *hdspm = entry->private_data;
5036 hdspm->card_name, hdspm->card->number + 1,
5037 hdspm->firmware_rev);
5040 hdspm->irq, hdspm->port, (unsigned long)hdspm->iobase);
5042 snd_iprintf(buffer, "--- System ---\n");
5049 hdspm->irq_count);
5051 "HW pointer: id = %d, rawptr = %d (%d->%d) "
5056 (2 * (int)hdspm->period_bytes),
5057 ((status & HDSPM_BufferPositionMask) - 64) %
5058 (2 * (int)hdspm->period_bytes),
5074 hdspm->control_register, hdspm->control2_register,
5077 snd_iprintf(buffer, "--- Settings ---\n");
5083 x, (unsigned long) hdspm->period_bytes);
5086 (hdspm->
5091 str_on_off(hdspm->control_register & HDSPM_clr_tms),
5092 str_on_off(hdspm->control_register & HDSPM_Emphasis),
5093 str_on_off(hdspm->control_register & HDSPM_Dolby));
5104 hdspm->system_sample_rate);
5107 hdspm->control_register & HDSPM_DS_DoubleWire?
5110 hdspm->control_register & HDSPM_QS_DoubleWire?
5112 hdspm->control_register & HDSPM_QS_QuadWire?
5115 snd_iprintf(buffer, "--- Status:\n");
5158 autosync_ref = "---"; break;
5172 struct hdspm *hdspm = entry->private_data;
5189 snd_iprintf(buffer, "System frequency: %d Hz\n",
5230 struct hdspm *hdspm = entry->private_data;
5247 struct hdspm *hdspm = entry->private_data;
5252 for (i = 0; i < hdspm->max_channels_in; i++) {
5253 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_in[i]);
5260 struct hdspm *hdspm = entry->private_data;
5265 for (i = 0; i < hdspm->max_channels_out; i++) {
5266 snd_iprintf(buffer, "%d=%s\n", i+1, hdspm->port_names_out[i]);
5275 switch (hdspm->io_type) {
5292 snd_card_ro_proc_new(hdspm->card, "hdspm", hdspm, read);
5293 snd_card_ro_proc_new(hdspm->card, "ports.in", hdspm,
5295 snd_card_ro_proc_new(hdspm->card, "ports.out", hdspm,
5300 snd_card_ro_proc_new(hdspm->card, "debug", hdspm,
5305 /*------------------------------------------------------------
5307 ------------------------------------------------------------*/
5311 /* ASSUMPTION: hdspm->lock is either held, or there is no need to
5317 hdspm->settings_register = 0;
5319 switch (hdspm->io_type) {
5322 hdspm->control_register =
5328 hdspm->settings_register = 0x1 + 0x1000;
5331 hdspm->control_register =
5336 hdspm->control_register =
5345 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
5347 if (AES32 == hdspm->io_type) {
5350 hdspm->control2_register = HDSPM_BIGENDIAN_MODE;
5352 hdspm->control2_register = 0;
5355 hdspm_write(hdspm, HDSPM_control2Reg, hdspm->control2_register);
5364 hdspm_write(hdspm, HDSPM_WR_SETTINGS, hdspm->settings_register);
5366 /* set a default rate so that the channel map is set up. */
5373 /*------------------------------------------------------------
5375 ------------------------------------------------------------*/
5402 dev_info(hdspm->card->dev, "snd_hdspm_interrupt %llu @ %llx\n",
5403 now-hdspm->last_interrupt, status & 0xFFC0);
5404 hdspm->last_interrupt = now;
5411 hdspm->irq_count++;
5415 if (hdspm->capture_substream)
5416 snd_pcm_period_elapsed(hdspm->capture_substream);
5418 if (hdspm->playback_substream)
5419 snd_pcm_period_elapsed(hdspm->playback_substream);
5424 while (i < hdspm->midiPorts) {
5426 hdspm->midi[i].statusIn) & 0xff) &&
5427 (status & hdspm->midi[i].irq)) {
5431 hdspm->control_register &= ~hdspm->midi[i].ie;
5433 hdspm->control_register);
5434 hdspm->midi[i].pending = 1;
5442 queue_work(system_highpri_wq, &hdspm->midi_work);
5448 /*------------------------------------------------------------
5450 ------------------------------------------------------------*/
5463 struct snd_pcm_runtime *runtime = substream->runtime;
5467 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
5468 other = hdspm->capture_substream;
5470 other = hdspm->playback_substream;
5472 if (hdspm->running)
5473 runtime->status->hw_ptr = hdspm_hw_pointer(hdspm);
5475 runtime->status->hw_ptr = 0;
5478 struct snd_pcm_runtime *oruntime = other->runtime;
5481 oruntime->status->hw_ptr =
5482 runtime->status->hw_ptr;
5499 spin_lock_irq(&hdspm->lock);
5501 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5502 this_pid = hdspm->playback_pid;
5503 other_pid = hdspm->capture_pid;
5505 this_pid = hdspm->capture_pid;
5506 other_pid = hdspm->playback_pid;
5516 if (params_rate(params) != hdspm->system_sample_rate) {
5517 spin_unlock_irq(&hdspm->lock);
5520 return -EBUSY;
5523 if (params_period_size(params) != hdspm->period_bytes / 4) {
5524 spin_unlock_irq(&hdspm->lock);
5527 return -EBUSY;
5532 spin_unlock_irq(&hdspm->lock);
5534 /* how to make sure that the rate matches an externally-set one ? */
5536 spin_lock_irq(&hdspm->lock);
5539 dev_info(hdspm->card->dev, "err on hdspm_set_rate: %d\n", err);
5540 spin_unlock_irq(&hdspm->lock);
5545 spin_unlock_irq(&hdspm->lock);
5550 dev_info(hdspm->card->dev,
5567 dev_info(hdspm->card->dev,
5572 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5575 int c = hdspm->channel_map_out[i];
5585 hdspm->playback_buffer =
5586 (unsigned char *) substream->runtime->dma_area;
5587 dev_dbg(hdspm->card->dev,
5588 "Allocated sample buffer for playback at %p\n",
5589 hdspm->playback_buffer);
5592 int c = hdspm->channel_map_in[i];
5602 hdspm->capture_buffer =
5603 (unsigned char *) substream->runtime->dma_area;
5604 dev_dbg(hdspm->card->dev,
5605 "Allocated sample buffer for capture at %p\n",
5606 hdspm->capture_buffer);
5610 dev_dbg(hdspm->card->dev,
5611 "Allocated sample buffer for %s at 0x%08X\n",
5612 snd_pcm_direction_name(substream->stream),
5616 dev_dbg(hdspm->card->dev,
5617 "set_hwparams: %s %d Hz, %d channels, bs = %d\n",
5618 snd_pcm_direction_name(substream->stream),
5629 if (hdspm->io_type == AES32) {
5636 if (!(hdspm->control_register & HDSPe_FLOAT_FORMAT))
5637 dev_info(hdspm->card->dev,
5640 hdspm->control_register |= HDSPe_FLOAT_FORMAT;
5642 if (hdspm->control_register & HDSPe_FLOAT_FORMAT)
5643 dev_info(hdspm->card->dev,
5646 hdspm->control_register &= ~HDSPe_FLOAT_FORMAT;
5648 hdspm_write(hdspm, HDSPM_controlRegister, hdspm->control_register);
5658 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5664 hdspm->playback_buffer = NULL;
5669 hdspm->capture_buffer = NULL;
5682 unsigned int channel = info->channel;
5684 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
5685 if (snd_BUG_ON(channel >= hdspm->max_channels_out)) {
5686 dev_info(hdspm->card->dev,
5689 return -EINVAL;
5692 channel = array_index_nospec(channel, hdspm->max_channels_out);
5693 if (hdspm->channel_map_out[channel] < 0) {
5694 dev_info(hdspm->card->dev,
5697 return -EINVAL;
5700 info->offset = hdspm->channel_map_out[channel] *
5703 if (snd_BUG_ON(channel >= hdspm->max_channels_in)) {
5704 dev_info(hdspm->card->dev,
5707 return -EINVAL;
5710 channel = array_index_nospec(channel, hdspm->max_channels_in);
5711 if (hdspm->channel_map_in[channel] < 0) {
5712 dev_info(hdspm->card->dev,
5715 return -EINVAL;
5718 info->offset = hdspm->channel_map_in[channel] *
5722 info->first = 0;
5723 info->step = 32;
5753 spin_lock(&hdspm->lock);
5754 running = hdspm->running;
5757 running |= 1 << substream->stream;
5760 running &= ~(1 << substream->stream);
5764 spin_unlock(&hdspm->lock);
5765 return -EINVAL;
5767 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
5768 other = hdspm->capture_substream;
5770 other = hdspm->playback_substream;
5778 running |= 1 << s->stream;
5780 running &= ~(1 << s->stream);
5786 && substream->stream ==
5791 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
5795 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
5800 if (!hdspm->running && running)
5802 else if (hdspm->running && !running)
5804 hdspm->running = running;
5805 spin_unlock(&hdspm->lock);
5868 struct hdspm *hdspm = rule->private;
5874 if (r->min > 96000 && r->max <= 192000) {
5876 .min = hdspm->qs_in_channels,
5877 .max = hdspm->qs_in_channels,
5881 } else if (r->min > 48000 && r->max <= 96000) {
5883 .min = hdspm->ds_in_channels,
5884 .max = hdspm->ds_in_channels,
5888 } else if (r->max < 64000) {
5890 .min = hdspm->ss_in_channels,
5891 .max = hdspm->ss_in_channels,
5903 struct hdspm *hdspm = rule->private;
5909 if (r->min > 96000 && r->max <= 192000) {
5911 .min = hdspm->qs_out_channels,
5912 .max = hdspm->qs_out_channels,
5916 } else if (r->min > 48000 && r->max <= 96000) {
5918 .min = hdspm->ds_out_channels,
5919 .max = hdspm->ds_out_channels,
5923 } else if (r->max < 64000) {
5925 .min = hdspm->ss_out_channels,
5926 .max = hdspm->ss_out_channels,
5938 struct hdspm *hdspm = rule->private;
5944 if (c->min >= hdspm->ss_in_channels) {
5946 .min = 32000,
5951 } else if (c->max <= hdspm->qs_in_channels) {
5953 .min = 128000,
5958 } else if (c->max <= hdspm->ds_in_channels) {
5960 .min = 64000,
5972 struct hdspm *hdspm = rule->private;
5978 if (c->min >= hdspm->ss_out_channels) {
5980 .min = 32000,
5985 } else if (c->max <= hdspm->qs_out_channels) {
5987 .min = 128000,
5992 } else if (c->max <= hdspm->ds_out_channels) {
5994 .min = 64000,
6008 struct hdspm *hdspm = rule->private;
6012 list[0] = hdspm->qs_in_channels;
6013 list[1] = hdspm->ds_in_channels;
6014 list[2] = hdspm->ss_in_channels;
6022 struct hdspm *hdspm = rule->private;
6026 list[0] = hdspm->qs_out_channels;
6027 list[1] = hdspm->ds_out_channels;
6028 list[2] = hdspm->ss_out_channels;
6035 struct snd_pcm_runtime *runtime = substream->runtime;
6036 bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
6038 spin_lock_irq(&hdspm->lock);
6040 runtime->hw = (playback) ? snd_hdspm_playback_subinfo :
6044 if (!hdspm->capture_substream)
6047 hdspm->playback_pid = current->pid;
6048 hdspm->playback_substream = substream;
6050 if (!hdspm->playback_substream)
6053 hdspm->capture_pid = current->pid;
6054 hdspm->capture_substream = substream;
6057 spin_unlock_irq(&hdspm->lock);
6062 switch (hdspm->io_type) {
6083 if (AES32 == hdspm->io_type) {
6084 runtime->hw.rates |= SNDRV_PCM_RATE_128000;
6090 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
6096 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
6101 SNDRV_PCM_HW_PARAM_RATE, -1);
6109 bool playback = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
6111 spin_lock_irq(&hdspm->lock);
6114 hdspm->playback_pid = -1;
6115 hdspm->playback_substream = NULL;
6117 hdspm->capture_pid = -1;
6118 hdspm->capture_substream = NULL;
6121 spin_unlock_irq(&hdspm->lock);
6136 struct hdspm *hdspm = hw->private_data;
6150 levels = &hdspm->peak_rms;
6152 levels->input_peaks[i] =
6153 readl(hdspm->iobase +
6155 levels->playback_peaks[i] =
6156 readl(hdspm->iobase +
6158 levels->output_peaks[i] =
6159 readl(hdspm->iobase +
6162 levels->input_rms[i] =
6163 ((uint64_t) readl(hdspm->iobase +
6165 (uint64_t) readl(hdspm->iobase +
6167 levels->playback_rms[i] =
6168 ((uint64_t)readl(hdspm->iobase +
6170 (uint64_t)readl(hdspm->iobase +
6172 levels->output_rms[i] =
6173 ((uint64_t)readl(hdspm->iobase +
6175 (uint64_t)readl(hdspm->iobase +
6179 if (hdspm->system_sample_rate > 96000) {
6180 levels->speed = qs;
6181 } else if (hdspm->system_sample_rate > 48000) {
6182 levels->speed = ds;
6184 levels->speed = ss;
6186 levels->status2 = hdspm_read(hdspm, HDSPM_statusRegister2);
6190 /* dev_err(hdspm->card->dev, "copy_to_user(.., .., %lu): %lu
6193 return -EFAULT;
6236 dev_err(hdspm->card->dev, "copy_to_user(.., .., %lu): %lu [LTC]\n", sizeof(struct hdspm_ltc), s); */
6237 return -EFAULT;
6245 spin_lock_irq(&hdspm->lock);
6249 info.system_sample_rate = hdspm->system_sample_rate;
6257 spin_unlock_irq(&hdspm->lock);
6259 return -EFAULT;
6265 status.card_type = hdspm->io_type;
6272 switch (hdspm->io_type) {
6299 return -EFAULT;
6307 hdspm_version.card_type = hdspm->io_type;
6308 strscpy(hdspm_version.cardname, hdspm->card_name,
6310 hdspm_version.serial = hdspm->serial;
6311 hdspm_version.firmware_rev = hdspm->firmware_rev;
6313 if (hdspm->tco)
6318 return -EFAULT;
6323 return -EFAULT;
6324 if (copy_to_user((void __user *)mixer.mixer, hdspm->mixer,
6326 return -EFAULT;
6330 return -EINVAL;
6356 hdspm->hwdep = hw;
6357 hw->private_data = hdspm;
6358 strcpy(hw->name, "HDSPM hwdep interface");
6360 hw->ops.open = snd_hdspm_hwdep_dummy_op;
6361 hw->ops.ioctl = snd_hdspm_hwdep_ioctl;
6362 hw->ops.ioctl_compat = snd_hdspm_hwdep_ioctl;
6363 hw->ops.release = snd_hdspm_hwdep_dummy_op;
6369 /*------------------------------------------------------------
6371 ------------------------------------------------------------*/
6377 pcm = hdspm->pcm;
6382 &hdspm->pci->dev,
6384 dev_dbg(hdspm->card->dev, " Preallocated %zd Bytes\n", wanted);
6402 /* ------------- ALSA Devices ---------------------------- */
6409 err = snd_pcm_new(card, hdspm->card_name, 0, 1, 1, &pcm);
6413 hdspm->pcm = pcm;
6414 pcm->private_data = hdspm;
6415 strcpy(pcm->name, hdspm->card_name);
6422 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
6435 for (i = 0; i < hdspm->midiPorts; i++)
6444 dev_dbg(card->dev, "Create card...\n");
6450 while (i < hdspm->midiPorts) {
6466 dev_dbg(card->dev, "proc init...\n");
6469 hdspm->system_sample_rate = -1;
6470 hdspm->last_external_sample_rate = -1;
6471 hdspm->last_internal_sample_rate = -1;
6472 hdspm->playback_pid = -1;
6473 hdspm->capture_pid = -1;
6474 hdspm->capture_substream = NULL;
6475 hdspm->playback_substream = NULL;
6477 dev_dbg(card->dev, "Set defaults...\n");
6482 dev_dbg(card->dev, "Update mixer controls...\n");
6485 dev_dbg(card->dev, "Initializing complete?\n");
6489 dev_err(card->dev, "error registering card\n");
6493 dev_dbg(card->dev, "... yes now\n");
6502 struct pci_dev *pci = hdspm->pci;
6506 hdspm->irq = -1;
6507 hdspm->card = card;
6509 spin_lock_init(&hdspm->lock);
6510 INIT_WORK(&hdspm->midi_work, hdspm_midi_work);
6512 pci_read_config_word(hdspm->pci,
6513 PCI_CLASS_REVISION, &hdspm->firmware_rev);
6515 strcpy(card->mixername, "Xilinx FPGA");
6516 strcpy(card->driver, "HDSPM");
6518 switch (hdspm->firmware_rev) {
6520 hdspm->io_type = RayDAT;
6521 hdspm->card_name = "RME RayDAT";
6522 hdspm->midiPorts = 2;
6525 hdspm->io_type = AIO;
6526 hdspm->card_name = "RME AIO";
6527 hdspm->midiPorts = 1;
6530 hdspm->io_type = MADIface;
6531 hdspm->card_name = "RME MADIface";
6532 hdspm->midiPorts = 1;
6535 if ((hdspm->firmware_rev == 0xf0) ||
6536 ((hdspm->firmware_rev >= 0xe6) &&
6537 (hdspm->firmware_rev <= 0xea))) {
6538 hdspm->io_type = AES32;
6539 hdspm->card_name = "RME AES32";
6540 hdspm->midiPorts = 2;
6541 } else if ((hdspm->firmware_rev == 0xd2) ||
6542 ((hdspm->firmware_rev >= 0xc8) &&
6543 (hdspm->firmware_rev <= 0xcf))) {
6544 hdspm->io_type = MADI;
6545 hdspm->card_name = "RME MADI";
6546 hdspm->midiPorts = 3;
6548 dev_err(card->dev,
6550 hdspm->firmware_rev);
6551 return -ENODEV;
6559 pci_set_master(hdspm->pci);
6565 hdspm->port = pci_resource_start(pci, 0);
6567 hdspm->iobase = pcim_iomap_table(pci)[0];
6568 dev_dbg(card->dev, "remapped region (0x%lx) 0x%lx-0x%lx\n",
6569 (unsigned long)hdspm->iobase, hdspm->port,
6570 hdspm->port + io_extent - 1);
6572 if (devm_request_irq(&pci->dev, pci->irq, snd_hdspm_interrupt,
6574 dev_err(card->dev, "unable to use IRQ %d\n", pci->irq);
6575 return -EBUSY;
6578 dev_dbg(card->dev, "use IRQ %d\n", pci->irq);
6580 hdspm->irq = pci->irq;
6581 card->sync_irq = hdspm->irq;
6583 dev_dbg(card->dev, "kmalloc Mixer memory of %zd Bytes\n",
6584 sizeof(*hdspm->mixer));
6585 hdspm->mixer = devm_kzalloc(&pci->dev, sizeof(*hdspm->mixer), GFP_KERNEL);
6586 if (!hdspm->mixer)
6587 return -ENOMEM;
6589 hdspm->port_names_in = NULL;
6590 hdspm->port_names_out = NULL;
6592 switch (hdspm->io_type) {
6594 hdspm->ss_in_channels = hdspm->ss_out_channels = AES32_CHANNELS;
6595 hdspm->ds_in_channels = hdspm->ds_out_channels = AES32_CHANNELS;
6596 hdspm->qs_in_channels = hdspm->qs_out_channels = AES32_CHANNELS;
6598 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6600 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6602 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6604 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6606 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6608 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6611 hdspm->max_channels_out = hdspm->max_channels_in =
6613 hdspm->port_names_in = hdspm->port_names_out =
6615 hdspm->channel_map_in = hdspm->channel_map_out =
6622 hdspm->ss_in_channels = hdspm->ss_out_channels =
6624 hdspm->ds_in_channels = hdspm->ds_out_channels =
6626 hdspm->qs_in_channels = hdspm->qs_out_channels =
6629 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6631 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6633 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6636 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6638 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6640 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6645 hdspm->ss_in_channels = AIO_IN_SS_CHANNELS;
6646 hdspm->ds_in_channels = AIO_IN_DS_CHANNELS;
6647 hdspm->qs_in_channels = AIO_IN_QS_CHANNELS;
6648 hdspm->ss_out_channels = AIO_OUT_SS_CHANNELS;
6649 hdspm->ds_out_channels = AIO_OUT_DS_CHANNELS;
6650 hdspm->qs_out_channels = AIO_OUT_QS_CHANNELS;
6653 dev_info(card->dev, "AEB input board found\n");
6654 hdspm->ss_in_channels += 4;
6655 hdspm->ds_in_channels += 4;
6656 hdspm->qs_in_channels += 4;
6660 dev_info(card->dev, "AEB output board found\n");
6661 hdspm->ss_out_channels += 4;
6662 hdspm->ds_out_channels += 4;
6663 hdspm->qs_out_channels += 4;
6666 hdspm->channel_map_out_ss = channel_map_aio_out_ss;
6667 hdspm->channel_map_out_ds = channel_map_aio_out_ds;
6668 hdspm->channel_map_out_qs = channel_map_aio_out_qs;
6670 hdspm->channel_map_in_ss = channel_map_aio_in_ss;
6671 hdspm->channel_map_in_ds = channel_map_aio_in_ds;
6672 hdspm->channel_map_in_qs = channel_map_aio_in_qs;
6674 hdspm->port_names_in_ss = texts_ports_aio_in_ss;
6675 hdspm->port_names_out_ss = texts_ports_aio_out_ss;
6676 hdspm->port_names_in_ds = texts_ports_aio_in_ds;
6677 hdspm->port_names_out_ds = texts_ports_aio_out_ds;
6678 hdspm->port_names_in_qs = texts_ports_aio_in_qs;
6679 hdspm->port_names_out_qs = texts_ports_aio_out_qs;
6684 hdspm->ss_in_channels = hdspm->ss_out_channels =
6686 hdspm->ds_in_channels = hdspm->ds_out_channels =
6688 hdspm->qs_in_channels = hdspm->qs_out_channels =
6691 hdspm->max_channels_in = RAYDAT_SS_CHANNELS;
6692 hdspm->max_channels_out = RAYDAT_SS_CHANNELS;
6694 hdspm->channel_map_in_ss = hdspm->channel_map_out_ss =
6696 hdspm->channel_map_in_ds = hdspm->channel_map_out_ds =
6698 hdspm->channel_map_in_qs = hdspm->channel_map_out_qs =
6700 hdspm->channel_map_in = hdspm->channel_map_out =
6703 hdspm->port_names_in_ss = hdspm->port_names_out_ss =
6705 hdspm->port_names_in_ds = hdspm->port_names_out_ds =
6707 hdspm->port_names_in_qs = hdspm->port_names_out_qs =
6716 switch (hdspm->io_type) {
6721 hdspm->midiPorts++;
6722 hdspm->tco = kzalloc(sizeof(*hdspm->tco), GFP_KERNEL);
6723 if (hdspm->tco)
6726 dev_info(card->dev, "AIO/RayDAT TCO module found\n");
6728 hdspm->tco = NULL;
6735 hdspm->midiPorts++;
6736 hdspm->tco = kzalloc(sizeof(*hdspm->tco), GFP_KERNEL);
6737 if (hdspm->tco)
6740 dev_info(card->dev, "MADI/AES TCO module found\n");
6742 hdspm->tco = NULL;
6747 hdspm->tco = NULL;
6751 switch (hdspm->io_type) {
6753 if (hdspm->tco) {
6754 hdspm->texts_autosync = texts_autosync_aes_tco;
6755 hdspm->texts_autosync_items =
6758 hdspm->texts_autosync = texts_autosync_aes;
6759 hdspm->texts_autosync_items =
6765 if (hdspm->tco) {
6766 hdspm->texts_autosync = texts_autosync_madi_tco;
6767 hdspm->texts_autosync_items = 4;
6769 hdspm->texts_autosync = texts_autosync_madi;
6770 hdspm->texts_autosync_items = 3;
6779 if (hdspm->tco) {
6780 hdspm->texts_autosync = texts_autosync_raydat_tco;
6781 hdspm->texts_autosync_items = 9;
6783 hdspm->texts_autosync = texts_autosync_raydat;
6784 hdspm->texts_autosync_items = 8;
6789 if (hdspm->tco) {
6790 hdspm->texts_autosync = texts_autosync_aio_tco;
6791 hdspm->texts_autosync_items = 6;
6793 hdspm->texts_autosync = texts_autosync_aio;
6794 hdspm->texts_autosync_items = 5;
6800 if (hdspm->io_type != MADIface) {
6801 hdspm->serial = (hdspm_read(hdspm,
6803 /* id contains either a user-provided value or the default
6805 * fill card->id with the serial number.
6809 * this case, we don't set card->id to avoid collisions
6812 if (!id[hdspm->dev] && hdspm->serial != 0xFFFFFF) {
6813 snprintf(card->id, sizeof(card->id),
6814 "HDSPMx%06x", hdspm->serial);
6815 snd_card_set_id(card, card->id);
6819 dev_dbg(card->dev, "create alsa devices.\n");
6832 struct hdspm *hdspm = card->private_data;
6834 if (hdspm->port) {
6835 cancel_work_sync(&hdspm->midi_work);
6838 hdspm->control_register &=
6843 hdspm->control_register);
6857 return -ENODEV;
6860 return -ENOENT;
6863 err = snd_devm_card_new(&pci->dev, index[dev], id[dev],
6868 hdspm = card->private_data;
6869 card->private_free = snd_hdspm_card_free;
6870 hdspm->dev = dev;
6871 hdspm->pci = pci;
6877 if (hdspm->io_type != MADIface) {
6878 snprintf(card->shortname, sizeof(card->shortname), "%s_%x",
6879 hdspm->card_name, hdspm->serial);
6880 snprintf(card->longname, sizeof(card->longname),
6882 hdspm->card_name, hdspm->serial,
6883 hdspm->port, hdspm->irq);
6885 snprintf(card->shortname, sizeof(card->shortname), "%s",
6886 hdspm->card_name);
6887 snprintf(card->longname, sizeof(card->longname),
6889 hdspm->card_name, hdspm->port, hdspm->irq);