Lines Matching defs:wcreg
184 u32 wcreg; /* cached write control register value */
222 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
386 writel(rme32->wcreg | RME32_WCR_PD,
388 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
395 rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
396 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
410 return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
478 ds = rme32->wcreg & RME32_WCR_DS_BM;
481 rme32->wcreg &= ~RME32_WCR_DS_BM;
482 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
486 rme32->wcreg &= ~RME32_WCR_DS_BM;
487 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
491 rme32->wcreg &= ~RME32_WCR_DS_BM;
492 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
498 rme32->wcreg |= RME32_WCR_DS_BM;
499 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
505 rme32->wcreg |= RME32_WCR_DS_BM;
506 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
512 rme32->wcreg |= RME32_WCR_DS_BM;
513 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
519 if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
520 (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
525 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
535 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
540 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
545 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
550 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
556 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
562 return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
563 (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
570 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
574 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
578 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
582 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
588 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
594 return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
595 (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
610 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
613 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
622 rme32->wcreg &= ~RME32_WCR_MODE24;
625 rme32->wcreg |= RME32_WCR_MODE24;
630 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
673 if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
674 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
675 rme32->wcreg |= rme32->wcreg_spdif_stream;
676 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
699 rme32->wcreg |= RME32_WCR_AUTOSYNC;
700 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
717 rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
718 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
738 rme32->wcreg |= RME32_WCR_START;
739 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
752 rme32->wcreg &= ~RME32_WCR_START;
753 if (rme32->wcreg & RME32_WCR_SEL)
754 rme32->wcreg |= RME32_WCR_MUTE;
755 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
810 rme32->wcreg &= ~RME32_WCR_ADAT;
811 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
891 rme32->wcreg |= RME32_WCR_ADAT;
892 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
955 spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
988 if (rme32->wcreg & RME32_WCR_SEL)
989 rme32->wcreg &= ~RME32_WCR_MUTE;
990 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1348 rme32->wcreg = RME32_WCR_SEL | /* normal playback */
1351 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1393 if (rme32->wcreg & RME32_WCR_MODE24) {
1398 if (rme32->wcreg & RME32_WCR_MONO) {
1432 if (rme32->wcreg & RME32_WCR_SEL) {
1437 if (rme32->wcreg & RME32_WCR_MUTE) {
1445 ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1446 && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1455 if (rme32->wcreg & RME32_WCR_PRO) {
1460 if (rme32->wcreg & RME32_WCR_EMP) {
1486 rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1499 val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1500 change = val != rme32->wcreg;
1505 rme32->wcreg = val;
1709 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1710 rme32->wcreg |= val;
1711 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);