Lines Matching defs:rmh
130 /* rmh */
208 static void lx_message_init(struct lx_rmh *rmh, enum cmd_mb_opcodes cmd)
212 rmh->cmd[0] = dsp_commands[cmd].dcCodeOp;
213 rmh->cmd_len = dsp_commands[cmd].dcCmdLength;
214 rmh->stat_len = dsp_commands[cmd].dcStatusLength;
215 rmh->dsp_stat = dsp_commands[cmd].dcStatusType;
216 rmh->cmd_idx = cmd;
217 memset(&rmh->cmd[1], 0, (REG_CRM_NUMBER - 1) * sizeof(u32));
220 memset(rmh->stat, 0, REG_CRM_NUMBER * sizeof(u32));
223 rmh->cmd_idx = cmd;
228 #define LXRMH "lx6464es rmh: "
229 static void lx_message_dump(struct lx_rmh *rmh)
231 u8 idx = rmh->cmd_idx;
236 for (i = 0; i != rmh->cmd_len; ++i)
237 pr_debug(LXRMH "\tcmd[%d] %08x\n", i, rmh->cmd[i]);
239 for (i = 0; i != rmh->stat_len; ++i)
240 pr_debug(LXRMH "\tstat[%d]: %08x\n", i, rmh->stat[i]);
244 static inline void lx_message_dump(struct lx_rmh *rmh)
256 static int lx_message_send_atomic(struct lx6464es *chip, struct lx_rmh *rmh)
267 lx_dsp_reg_writebuf(chip, eReg_CRM1, rmh->cmd, rmh->cmd_len);
275 if (rmh->dsp_stat == 0)
289 if (rmh->stat_len) {
290 snd_BUG_ON(rmh->stat_len >= (REG_CRM_NUMBER-1));
291 lx_dsp_reg_readbuf(chip, eReg_CRM2, rmh->stat,
292 rmh->stat_len);
295 dev_err(chip->card->dev, "rmh error: %08x\n", reg);
310 lx_message_dump(rmh);
323 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG);
324 ret = lx_message_send_atomic(chip, &chip->rmh);
326 *rdsp_version = chip->rmh.stat[1];
339 lx_message_init(&chip->rmh, CMD_01_GET_SYS_CFG);
340 ret = lx_message_send_atomic(chip, &chip->rmh);
343 freq_raw = chip->rmh.stat[0] >> FREQ_FIELD_OFFSET;
383 lx_message_init(&chip->rmh, CMD_02_SET_GRANULARITY);
384 chip->rmh.cmd[0] |= gran;
386 return lx_message_send_atomic(chip, &chip->rmh);
395 lx_message_init(&chip->rmh, CMD_04_GET_EVENT);
396 chip->rmh.stat_len = 9; /* we don't necessarily need the full length */
398 ret = lx_message_send_atomic(chip, &chip->rmh);
401 memcpy(data, chip->rmh.stat, chip->rmh.stat_len * sizeof(u32));
419 lx_message_init(&chip->rmh, CMD_06_ALLOCATE_PIPE);
421 chip->rmh.cmd[0] |= pipe_cmd;
422 chip->rmh.cmd[0] |= channels;
424 err = lx_message_send_atomic(chip, &chip->rmh);
437 lx_message_init(&chip->rmh, CMD_07_RELEASE_PIPE);
439 chip->rmh.cmd[0] |= pipe_cmd;
441 return lx_message_send_atomic(chip, &chip->rmh);
459 lx_message_init(&chip->rmh, CMD_08_ASK_BUFFERS);
461 chip->rmh.cmd[0] |= pipe_cmd;
463 err = lx_message_send_atomic(chip, &chip->rmh);
468 u32 stat = chip->rmh.stat[i];
483 for (i = 0; i < MAX_STREAM_BUFFER && i < chip->rmh.stat_len;
486 chip->rmh.stat[i],
487 chip->rmh.stat[i] & MASK_DATA_SIZE);
500 lx_message_init(&chip->rmh, CMD_09_STOP_PIPE);
502 chip->rmh.cmd[0] |= pipe_cmd;
504 return lx_message_send_atomic(chip, &chip->rmh);
512 lx_message_init(&chip->rmh, CMD_0B_TOGGLE_PIPE_STATE);
514 chip->rmh.cmd[0] |= pipe_cmd;
516 return lx_message_send_atomic(chip, &chip->rmh);
554 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT);
556 chip->rmh.cmd[0] |= pipe_cmd;
557 chip->rmh.stat_len = 2; /* need all words here! */
559 err = lx_message_send_atomic(chip, &chip->rmh); /* don't sleep! */
565 *rsample_count = ((u64)(chip->rmh.stat[0] & MASK_SPL_COUNT_HI)
567 + chip->rmh.stat[1]; /* lo part */
579 lx_message_init(&chip->rmh, CMD_0A_GET_PIPE_SPL_COUNT);
581 chip->rmh.cmd[0] |= pipe_cmd;
583 err = lx_message_send_atomic(chip, &chip->rmh);
588 *rstate = (chip->rmh.stat[0] >> PSTATE_OFFSET) & 0x0F;
633 lx_message_init(&chip->rmh, CMD_13_SET_STREAM_STATE);
635 chip->rmh.cmd[0] |= pipe_cmd;
636 chip->rmh.cmd[0] |= state;
638 return lx_message_send_atomic(chip, &chip->rmh);
648 lx_message_init(&chip->rmh, CMD_0C_DEF_STREAM);
650 chip->rmh.cmd[0] |= pipe_cmd;
654 chip->rmh.cmd[0] |= (STREAM_FMT_16b << STREAM_FMT_OFFSET);
658 chip->rmh.cmd[0] |= (STREAM_FMT_intel << STREAM_FMT_OFFSET);
660 chip->rmh.cmd[0] |= channels-1;
662 return lx_message_send_atomic(chip, &chip->rmh);
672 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT);
674 chip->rmh.cmd[0] |= pipe_cmd;
676 err = lx_message_send_atomic(chip, &chip->rmh);
678 *rstate = (chip->rmh.stat[0] & SF_START) ? START_STATE : PAUSE_STATE;
690 lx_message_init(&chip->rmh, CMD_0E_GET_STREAM_SPL_COUNT);
692 chip->rmh.cmd[0] |= pipe_cmd;
694 err = lx_message_send_atomic(chip, &chip->rmh);
696 *r_bytepos = ((u64) (chip->rmh.stat[0] & MASK_SPL_COUNT_HI)
698 + chip->rmh.stat[1]; /* lo part */
712 lx_message_init(&chip->rmh, CMD_0F_UPDATE_BUFFER);
714 chip->rmh.cmd[0] |= pipe_cmd;
715 chip->rmh.cmd[0] |= BF_NOTIFY_EOB; /* request interrupt notification */
719 chip->rmh.cmd[1] = buffer_size & MASK_DATA_SIZE;
720 chip->rmh.cmd[2] = buf_address_lo;
723 chip->rmh.cmd_len = 4;
724 chip->rmh.cmd[3] = buf_address_hi;
725 chip->rmh.cmd[0] |= BF_64BITS_ADR;
728 err = lx_message_send_atomic(chip, &chip->rmh);
731 *r_buffer_index = chip->rmh.stat[0];
757 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER);
759 chip->rmh.cmd[0] |= pipe_cmd;
760 chip->rmh.cmd[0] |= MASK_BUFFER_ID; /* ask for the current buffer: the
763 err = lx_message_send_atomic(chip, &chip->rmh);
766 *r_buffer_size = chip->rmh.stat[0] & MASK_DATA_SIZE;
777 lx_message_init(&chip->rmh, CMD_11_CANCEL_BUFFER);
779 chip->rmh.cmd[0] |= pipe_cmd;
780 chip->rmh.cmd[0] |= buffer_index;
782 return lx_message_send_atomic(chip, &chip->rmh);
797 lx_message_init(&chip->rmh, CMD_0D_SET_MUTE);
799 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, 0);
801 chip->rmh.cmd[1] = (u32)(mute_mask >> (u64)32); /* hi part */
802 chip->rmh.cmd[2] = (u32)(mute_mask & (u64)0xFFFFFFFF); /* lo part */
805 "mute %x %x %x\n", chip->rmh.cmd[0], chip->rmh.cmd[1],
806 chip->rmh.cmd[2]);
808 return lx_message_send_atomic(chip, &chip->rmh);
840 lx_message_init(&chip->rmh, CMD_12_GET_PEAK);
841 chip->rmh.cmd[0] |= PIPE_INFO_TO_CMD(is_capture, i);
843 err = lx_message_send_atomic(chip, &chip->rmh);
846 s0 = peak_map[chip->rmh.stat[0] & 0x0F];
847 s1 = peak_map[(chip->rmh.stat[0] >> 4) & 0xf];
848 s2 = peak_map[(chip->rmh.stat[0] >> 8) & 0xf];
849 s3 = peak_map[(chip->rmh.stat[0] >> 12) & 0xf];