Lines Matching +full:mic +full:- +full:pos
1 // SPDX-License-Identifier: GPL-2.0-or-later
31 static int index = SNDRV_DEFAULT_IDX1; /* Index 0-MAX */
36 static int buggy_irq = -1; /* auto-check */
38 static int spdif_aclink = -1;
39 static int inside_vm = -1;
46 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (0 = allowlist + auto-detect, 1 = force autodetect).");
56 MODULE_PARM_DESC(spdif_aclink, "S/PDIF over AC-link.");
75 ICH_REG_##name##_BDBAR = base + 0x0, /* dword - buffer descriptor list base address */ \
76 ICH_REG_##name##_CIV = base + 0x04, /* byte - current index value */ \
77 ICH_REG_##name##_LVI = base + 0x05, /* byte - last valid index */ \
78 ICH_REG_##name##_SR = base + 0x06, /* byte - status register */ \
79 ICH_REG_##name##_PICB = base + 0x08, /* word - position in current buffer */ \
80 ICH_REG_##name##_PIV = base + 0x0a, /* byte - prefetched index value */ \
81 ICH_REG_##name##_CR = base + 0x0b, /* byte - control register */ \
88 DEFINE_REGSET(MC, 0x20); /* Mic in */
91 DEFINE_REGSET(MC2, 0x40); /* Mic in 2 */
119 #define ICH_REG_GLOB_CNT 0x2c /* dword - global control */
121 #define ICH_PCM_SPDIF_NONE 0x00000000 /* reserved - undefined */
125 #define ICH_PCM_20BIT 0x00400000 /* 20-bit samples (ICH4) */
142 #define ICH_REG_GLOB_STA 0x30 /* dword - global status */
147 #define ICH_P2INT 0x02000000 /* ICH4: PCM2-In interrupt */
148 #define ICH_M2INT 0x01000000 /* ICH4: Mic2-In interrupt */
150 #define ICH_SAMPLE_16_20 0x00400000 /* ICH4: 16- and 20-bit samples */
151 #define ICH_MULTICHAN_CAP 0x00300000 /* ICH4: multi-channel capability bits (RO) */
164 #define ICH_MCINT 0x00000080 /* MIC capture interrupt */
171 #define ICH_REG_ACC_SEMA 0x34 /* byte - codec write semaphore */
174 #define ICH_DI2L_MASK 0x000000c0 /* PCM In 2, Mic In 2 data in line */
176 #define ICH_DI1L_MASK 0x00000030 /* PCM In 1, Mic In 1 data in line */
191 DEFINE_REGSET(AL_MC, 0x60); /* Ali Mic in */
271 #define ICH_ALI_IF_SPDF_SRC (3<<12) /* 00 = PCM, 01 = AC97-in, 10 = spdif-in, 11 = i2s */
272 #define ICH_ALI_IF_AC97_OUT (3<<8) /* 00 = PCM, 10 = spdif-in, 11 = i2s */
306 #define get_ichdev(substream) (substream->runtime->private_data)
367 int spdif_idx; /* SPDIF BAR index; *_SPBAR or -1 if use PCMOUT */
416 * Lowlevel I/O - busmaster
421 return ioread8(chip->bmaddr + offset);
426 return ioread16(chip->bmaddr + offset);
431 return ioread32(chip->bmaddr + offset);
436 iowrite8(val, chip->bmaddr + offset);
441 iowrite16(val, chip->bmaddr + offset);
446 iowrite32(val, chip->bmaddr + offset);
450 * Lowlevel I/O - AC'97 registers
455 return ioread16(chip->addr + offset);
460 iowrite16(val, chip->addr + offset);
476 return -EIO;
477 if (chip->in_sdin_init) {
480 codec = chip->codec_isr_bits;
482 codec = chip->codec_bit[chip->ac97_sdin[codec]];
487 return -EIO;
489 if (chip->buggy_semaphore)
498 } while (time--);
503 dev_err(chip->card->dev,
508 return -EBUSY;
515 struct intel8x0 *chip = ac97->private_data;
517 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) {
518 if (! chip->in_ac97_init)
519 dev_err(chip->card->dev,
521 ac97->num, reg);
523 iaputword(chip, reg + ac97->num * 0x80, val);
529 struct intel8x0 *chip = ac97->private_data;
533 if (snd_intel8x0_codec_semaphore(chip, ac97->num) < 0) {
534 if (! chip->in_ac97_init)
535 dev_err(chip->card->dev,
537 ac97->num, reg);
540 res = iagetword(chip, reg + ac97->num * 0x80);
545 ~(chip->codec_ready_bits | ICH_GSCI));
546 if (! chip->in_ac97_init)
547 dev_err(chip->card->dev,
549 ac97->num, reg);
567 ~(chip->codec_ready_bits | ICH_GSCI));
583 if (! chip->in_ac97_init)
584 dev_warn(chip->card->dev, "AC97 codec ready timeout.\n");
585 return -EBUSY;
591 if (chip->buggy_semaphore)
593 while (--time && (igetdword(chip, ICHREG(ALI_CAS)) & ALI_CAS_SEM_BUSY))
595 if (! time && ! chip->in_ac97_init)
596 dev_warn(chip->card->dev, "ali_codec_semaphore timeout\n");
602 struct intel8x0 *chip = ac97->private_data;
608 if (ac97->num)
621 struct intel8x0 *chip = ac97->private_data;
626 if (ac97->num)
639 __le32 *bdbar = ichdev->bdbar;
640 unsigned long port = ichdev->reg_offset;
642 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
643 if (ichdev->size == ichdev->fragsize) {
644 ichdev->ack_reload = ichdev->ack = 2;
645 ichdev->fragsize1 = ichdev->fragsize >> 1;
647 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf);
649 ichdev->fragsize1 >> ichdev->pos_shift);
650 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1));
652 ichdev->fragsize1 >> ichdev->pos_shift);
654 ichdev->frags = 2;
656 ichdev->ack_reload = ichdev->ack = 1;
657 ichdev->fragsize1 = ichdev->fragsize;
659 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf +
660 (((idx >> 1) * ichdev->fragsize) %
661 ichdev->size));
663 ichdev->fragsize >> ichdev->pos_shift);
665 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n",
669 ichdev->frags = ichdev->size / ichdev->fragsize;
671 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK);
672 ichdev->civ = 0;
674 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags;
675 ichdev->position = 0;
677 dev_dbg(chip->card->dev,
679 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize,
680 ichdev->fragsize1);
683 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
692 unsigned long port = ichdev->reg_offset;
696 if (!(ichdev->prepared || chip->in_measurement) || ichdev->suspended)
699 scoped_guard(spinlock_irqsave, &chip->reg_lock) {
700 status = igetbyte(chip, port + ichdev->roff_sr);
704 } else if (civ == ichdev->civ) {
706 ichdev->civ++;
707 ichdev->civ &= ICH_REG_LVI_MASK;
709 step = civ - ichdev->civ;
712 ichdev->civ = civ;
715 ichdev->position += step * ichdev->fragsize1;
716 if (! chip->in_measurement)
717 ichdev->position %= ichdev->size;
718 ichdev->lvi += step;
719 ichdev->lvi &= ICH_REG_LVI_MASK;
720 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
722 ichdev->lvi_frag++;
723 ichdev->lvi_frag %= ichdev->frags;
724 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + ichdev->lvi_frag * ichdev->fragsize1);
726 dev_dbg(chip->card->dev,
728 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2],
729 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port),
732 if (--ichdev->ack == 0) {
733 ichdev->ack = ichdev->ack_reload;
738 if (ack && ichdev->substream) {
739 snd_pcm_period_elapsed(ichdev->substream);
741 iputbyte(chip, port + ichdev->roff_sr,
752 status = igetdword(chip, chip->int_sta_reg);
756 if ((status & chip->int_sta_mask) == 0) {
759 iputdword(chip, chip->int_sta_reg, status);
760 if (! chip->buggy_irq)
766 for (i = 0; i < chip->bdbars_count; i++) {
767 ichdev = &chip->ichd[i];
768 if (status & ichdev->int_sta_mask)
773 iputdword(chip, chip->int_sta_reg, status & chip->int_sta_mask);
787 unsigned long port = ichdev->reg_offset;
791 ichdev->suspended = 0;
796 ichdev->last_pos = ichdev->position;
799 ichdev->suspended = 1;
808 return -EINVAL;
813 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ;
824 unsigned long port = ichdev->reg_offset;
833 ichdev->suspended = 0;
837 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
839 fifo = igetdword(chip, fiforeg[ichdev->ali_slot / 4]);
840 fifo &= ~(0xff << (ichdev->ali_slot % 4));
841 fifo |= 0x83 << (ichdev->ali_slot % 4);
842 iputdword(chip, fiforeg[ichdev->ali_slot / 4], fifo);
845 val &= ~(1 << (ichdev->ali_slot + 16)); /* clear PAUSE flag */
847 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << ichdev->ali_slot));
850 ichdev->suspended = 1;
855 iputdword(chip, ICHREG(ALI_DMACR), val | (1 << (ichdev->ali_slot + 16)));
867 igetdword(chip, ICHREG(ALI_INTERRUPTSR)) & ichdev->int_sta_mask);
870 return -EINVAL;
883 if (ichdev->pcm_open_flag) {
884 snd_ac97_pcm_close(ichdev->pcm);
885 ichdev->pcm_open_flag = 0;
886 ichdev->prepared = 0;
888 err = snd_ac97_pcm_open(ichdev->pcm, params_rate(hw_params),
890 ichdev->pcm->r[dbl].slots);
892 ichdev->pcm_open_flag = 1;
894 if (ichdev->ichd == ICHD_PCMOUT && chip->spdif_idx < 0)
895 snd_ac97_set_rate(ichdev->pcm->r[0].codec[0], AC97_SPDIF,
905 if (ichdev->pcm_open_flag) {
906 snd_ac97_pcm_close(ichdev->pcm);
907 ichdev->pcm_open_flag = 0;
908 ichdev->prepared = 0;
917 int dbl = runtime->rate > 48000;
919 guard(spinlock_irq)(&chip->reg_lock);
920 switch (chip->device_type) {
924 if (runtime->channels == 4 || dbl)
926 else if (runtime->channels == 6)
933 if (runtime->channels == 4 || dbl)
935 else if (runtime->channels == 6)
942 if (runtime->channels == 4 || dbl)
944 else if (runtime->channels == 6)
946 else if (runtime->channels == 8)
948 if (chip->device_type == DEVICE_NFORCE) {
954 spin_unlock_irq(&chip->reg_lock);
956 spin_lock_irq(&chip->reg_lock);
958 } else if (chip->device_type == DEVICE_INTEL_ICH4) {
959 if (runtime->sample_bits > 16)
970 struct snd_pcm_runtime *runtime = substream->runtime;
973 ichdev->physbuf = runtime->dma_addr;
974 ichdev->size = snd_pcm_lib_buffer_bytes(substream);
975 ichdev->fragsize = snd_pcm_lib_period_bytes(substream);
976 if (ichdev->ichd == ICHD_PCMOUT) {
978 if (chip->device_type == DEVICE_INTEL_ICH4)
979 ichdev->pos_shift = (runtime->sample_bits > 16) ? 2 : 1;
982 ichdev->prepared = 1;
994 guard(spinlock)(&chip->reg_lock);
996 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);
997 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);
998 position = ichdev->position;
1003 if (civ != igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV))
1012 if (chip->inside_vm)
1014 if (ptr1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))
1016 } while (timeout--);
1017 ptr = ichdev->last_pos;
1019 ptr1 <<= ichdev->pos_shift;
1020 ptr = ichdev->fragsize1 - ptr1;
1022 if (ptr < ichdev->last_pos) {
1024 pos_base = position / ichdev->fragsize1;
1025 last_base = ichdev->last_pos / ichdev->fragsize1;
1030 ptr = ichdev->last_pos;
1033 ichdev->last_pos = ptr;
1034 if (ptr >= ichdev->size)
1036 return bytes_to_frames(substream->runtime, ptr);
1093 struct snd_pcm_runtime *runtime = substream->runtime;
1096 ichdev->substream = substream;
1097 runtime->hw = snd_intel8x0_stream;
1098 runtime->hw.rates = ichdev->pcm->rates;
1100 if (chip->device_type == DEVICE_SIS) {
1101 runtime->hw.buffer_bytes_max = 64*1024;
1102 runtime->hw.period_bytes_max = 64*1024;
1107 runtime->private_data = ichdev;
1114 struct snd_pcm_runtime *runtime = substream->runtime;
1117 err = snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCMOUT]);
1121 if (chip->multi8) {
1122 runtime->hw.channels_max = 8;
1126 } else if (chip->multi6) {
1127 runtime->hw.channels_max = 6;
1130 } else if (chip->multi4) {
1131 runtime->hw.channels_max = 4;
1135 if (chip->dra) {
1138 if (chip->smp20bit) {
1139 runtime->hw.formats |= SNDRV_PCM_FMTBIT_S32_LE;
1149 chip->ichd[ICHD_PCMOUT].substream = NULL;
1157 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCMIN]);
1164 chip->ichd[ICHD_PCMIN].substream = NULL;
1172 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC]);
1179 chip->ichd[ICHD_MIC].substream = NULL;
1187 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_MIC2]);
1194 chip->ichd[ICHD_MIC2].substream = NULL;
1202 return snd_intel8x0_pcm_open(substream, &chip->ichd[ICHD_PCM2IN]);
1209 chip->ichd[ICHD_PCM2IN].substream = NULL;
1216 int idx = chip->device_type == DEVICE_NFORCE ? NVD_SPBAR : ICHD_SPBAR;
1218 return snd_intel8x0_pcm_open(substream, &chip->ichd[idx]);
1224 int idx = chip->device_type == DEVICE_NFORCE ? NVD_SPBAR : ICHD_SPBAR;
1226 chip->ichd[idx].substream = NULL;
1235 scoped_guard(spinlock_irq, &chip->reg_lock) {
1242 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_AC97SPDIFOUT]);
1250 chip->ichd[ALID_AC97SPDIFOUT].substream = NULL;
1251 guard(spinlock_irq)(&chip->reg_lock);
1264 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_SPDIFIN]);
1271 chip->ichd[ALID_SPDIFIN].substream = NULL;
1279 return snd_intel8x0_pcm_open(substream, &chip->ichd[ALID_SPDIFOUT]);
1286 chip->ichd[ALID_SPDIFOUT].substream = NULL;
1423 ((chip)->fix_nocache ? SNDRV_DMA_TYPE_DEV_WC : SNDRV_DMA_TYPE_DEV)
1432 if (rec->suffix)
1433 sprintf(name, "Intel ICH - %s", rec->suffix);
1436 err = snd_pcm_new(chip->card, name, device,
1437 rec->playback_ops ? 1 : 0,
1438 rec->capture_ops ? 1 : 0, &pcm);
1442 if (rec->playback_ops)
1443 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, rec->playback_ops);
1444 if (rec->capture_ops)
1445 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, rec->capture_ops);
1447 pcm->private_data = chip;
1448 pcm->info_flags = 0;
1449 if (rec->suffix)
1450 sprintf(pcm->name, "%s - %s", chip->card->shortname, rec->suffix);
1452 strscpy(pcm->name, chip->card->shortname);
1453 chip->pcm[device] = pcm;
1456 &chip->pci->dev,
1457 rec->prealloc_size, rec->prealloc_max_size);
1459 if (rec->playback_ops &&
1460 rec->playback_ops->open == snd_intel8x0_playback_open) {
1463 if (chip->multi8)
1465 else if (chip->multi6)
1467 else if (chip->multi4)
1474 chmap->channel_mask = SND_PCM_CHMAP_MASK_2468;
1475 chip->ac97[0]->chmaps[SNDRV_PCM_STREAM_PLAYBACK] = chmap;
1489 .suffix = "MIC ADC",
1526 .suffix = "MIC ADC",
1549 .suffix = "MIC ADC",
1578 switch (chip->device_type) {
1583 tblsize--;
1589 tblsize--;
1604 if (i > 0 && rec->ac97_idx) {
1606 if (! chip->ichd[rec->ac97_idx].pcm)
1615 chip->pcm_devs = device;
1626 struct intel8x0 *chip = bus->private_data;
1627 chip->ac97_bus = NULL;
1632 struct intel8x0 *chip = ac97->private_data;
1633 chip->ac97[ac97->num] = NULL;
1666 /* MIC IN #1 */
1695 /* MIC IN #2 */
1740 .name = "MS-9128",
1938 .name = "Sony VAIO VGN-T350P", /*AD1981B*/
1944 .name = "Sony VAIO VGN-B1VP", /*AD1981B*/
1956 .name = "Fujitsu-Siemens E4010",
1962 .name = "Fujitsu-Siemens T3010",
1986 .name = "Fujitsu-Siemens 4010",
1992 .name = "Fujitsu-Siemens Celsius H320",
1998 .name = "Fujitsu-Siemens Celsius", /* AD1981? */
2016 .name = "Panasonic CF-R4",
2022 .name = "Fujitsu-Siemens Scenic", /* AD1981? */
2052 .name = "Fujitsu-Siemens D1522", /* AD1981 */
2131 chip->spdif_idx = -1; /* use PCMOUT (or disabled) */
2133 switch (chip->device_type) {
2135 chip->spdif_idx = NVD_SPBAR;
2138 chip->spdif_idx = ALID_AC97SPDIFOUT;
2141 chip->spdif_idx = ICHD_SPBAR;
2146 chip->in_ac97_init = 1;
2152 if (chip->xbox)
2154 if (chip->device_type != DEVICE_ALI) {
2157 chip->in_sdin_init = 1;
2159 for (i = 0; i < chip->max_codecs; i++) {
2160 if (! (glob_sta & chip->codec_bit[i]))
2162 if (chip->device_type == DEVICE_INTEL_ICH4) {
2164 chip->ac97_sdin[codecs] =
2166 if (snd_BUG_ON(chip->ac97_sdin[codecs] >= 3))
2167 chip->ac97_sdin[codecs] = 0;
2169 chip->ac97_sdin[codecs] = i;
2172 chip->in_sdin_init = 0;
2189 err = snd_ac97_bus(chip->card, 0, ops, chip, &pbus);
2192 pbus->private_free = snd_intel8x0_mixer_free_ac97_bus;
2194 pbus->clock = ac97_clock;
2196 if (chip->device_type == DEVICE_ALI)
2197 pbus->no_vra = 1;
2199 pbus->dra = 1;
2200 chip->ac97_bus = pbus;
2201 chip->ncodecs = codecs;
2203 ac97.pci = chip->pci;
2206 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97[i]);
2208 if (err != -EACCES)
2209 dev_err(chip->card->dev,
2216 snd_ac97_tune_hardware(chip->ac97[0], ac97_quirks, quirk_override);
2218 if (chip->device_type == DEVICE_INTEL_ICH4)
2219 pbus->isdin = 1;
2222 if (chip->device_type != DEVICE_INTEL_ICH4)
2223 i -= 2; /* do not allocate PCM2IN and MIC2 */
2224 if (chip->spdif_idx < 0)
2225 i--; /* do not allocate S/PDIF */
2229 chip->ichd[ICHD_PCMOUT].pcm = &pbus->pcms[0];
2230 chip->ichd[ICHD_PCMIN].pcm = &pbus->pcms[1];
2231 chip->ichd[ICHD_MIC].pcm = &pbus->pcms[2];
2232 if (chip->spdif_idx >= 0)
2233 chip->ichd[chip->spdif_idx].pcm = &pbus->pcms[3];
2234 if (chip->device_type == DEVICE_INTEL_ICH4) {
2235 chip->ichd[ICHD_PCM2IN].pcm = &pbus->pcms[4];
2236 chip->ichd[ICHD_MIC2].pcm = &pbus->pcms[5];
2239 if (chip->device_type == DEVICE_INTEL_ICH4) {
2240 struct ac97_pcm *pcm = chip->ichd[ICHD_PCM2IN].pcm;
2245 tmp |= chip->ac97_sdin[0] << ICH_DI1L_SHIFT;
2247 if (pcm->r[0].codec[i]) {
2248 tmp |= chip->ac97_sdin[pcm->r[0].codec[i]->num] << ICH_DI2L_SHIFT;
2257 if (pbus->pcms[0].r[0].slots & (1 << AC97_SLOT_PCM_SLEFT)) {
2258 chip->multi4 = 1;
2259 if (pbus->pcms[0].r[0].slots & (1 << AC97_SLOT_LFE)) {
2260 chip->multi6 = 1;
2261 if (chip->ac97[0]->flags & AC97_HAS_8CH)
2262 chip->multi8 = 1;
2265 if (pbus->pcms[0].r[1].rslots[0]) {
2266 chip->dra = 1;
2268 if (chip->device_type == DEVICE_INTEL_ICH4) {
2270 chip->smp20bit = 1;
2272 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) {
2274 chip->ichd[chip->spdif_idx].pcm->rates = SNDRV_PCM_RATE_48000;
2276 if (chip->device_type == DEVICE_INTEL_ICH4 && !spdif_aclink) {
2282 snd_ac97_update_bits(chip->ac97[0], AC97_EXTENDED_STATUS, 0x03 << 4, 0x03 << 4);
2284 chip->in_ac97_init = 0;
2288 /* clear the cold-reset bit for the next chance */
2289 if (chip->device_type != DEVICE_ALI)
2323 if (snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode))
2324 return -EIO;
2329 /* do cold reset - the full ac97 powerdown may leave the controller
2340 (!snd_pci_quirk_lookup(chip->pci, ich_chip_reset_mode))
2362 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n",
2364 return -EIO;
2377 if (chip->device_type == DEVICE_NFORCE)
2397 chip->codec_isr_bits;
2404 dev_err(chip->card->dev,
2407 return -EIO;
2412 while (status != chip->codec_isr_bits &&
2416 chip->codec_isr_bits;
2423 for (i = 0; i < chip->ncodecs; i++)
2424 if (chip->ac97[i])
2425 status |= chip->codec_bit[chip->ac97_sdin[i]];
2430 chip->codec_isr_bits;
2437 if (chip->device_type == DEVICE_SIS) {
2441 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) {
2444 pci_read_config_dword(chip->pci, 0x4c, &val);
2446 pci_write_config_dword(chip->pci, 0x4c, val);
2469 dev_err(chip->card->dev, "AC'97 reset failed.\n");
2471 return -EIO;
2491 if (chip->device_type != DEVICE_ALI) {
2503 for (i = 0; i < chip->bdbars_count; i++)
2504 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00);
2506 for (i = 0; i < chip->bdbars_count; i++)
2507 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS);
2508 for (i = 0; i < chip->bdbars_count; i++) {
2510 while (--timeout != 0) {
2511 if ((igetbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset) & ICH_RESETREGS) == 0)
2515 dev_err(chip->card->dev, "reset of registers failed?\n");
2518 for (i = 0; i < chip->bdbars_count; i++)
2519 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset,
2520 chip->ichd[i].bdbar_addr);
2526 struct intel8x0 *chip = card->private_data;
2529 if (chip->irq < 0)
2532 for (i = 0; i < chip->bdbars_count; i++)
2533 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00);
2535 for (i = 0; i < chip->bdbars_count; i++)
2536 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS);
2537 if (chip->device_type == DEVICE_NFORCE && !spdif_aclink) {
2540 pci_read_config_dword(chip->pci, 0x4c, &val);
2542 pci_write_config_dword(chip->pci, 0x4c, val);
2544 /* --- */
2547 if (chip->irq >= 0)
2548 free_irq(chip->irq, chip);
2557 struct intel8x0 *chip = card->private_data;
2561 for (i = 0; i < chip->ncodecs; i++)
2562 snd_ac97_suspend(chip->ac97[i]);
2563 if (chip->device_type == DEVICE_INTEL_ICH4)
2564 chip->sdm_saved = igetbyte(chip, ICHREG(SDM));
2566 if (chip->irq >= 0) {
2567 free_irq(chip->irq, chip);
2568 chip->irq = -1;
2569 card->sync_irq = -1;
2578 struct intel8x0 *chip = card->private_data;
2582 if (request_irq(pci->irq, snd_intel8x0_interrupt,
2585 pci->irq);
2587 return -EIO;
2589 chip->irq = pci->irq;
2590 card->sync_irq = chip->irq;
2592 /* re-initialize mixer stuff */
2593 if (chip->device_type == DEVICE_INTEL_ICH4 && !spdif_aclink) {
2595 iputbyte(chip, ICHREG(SDM), chip->sdm_saved);
2602 for (i = 0; i < chip->ncodecs; i++)
2603 snd_ac97_resume(chip->ac97[i]);
2606 for (i = 0; i < chip->bdbars_count; i++) {
2607 struct ichdev *ichdev = &chip->ichd[i];
2608 unsigned long port = ichdev->reg_offset;
2609 if (! ichdev->substream || ! ichdev->suspended)
2611 if (ichdev->ichd == ICHD_PCMOUT)
2612 snd_intel8x0_setup_pcm_out(chip, ichdev->substream->runtime);
2613 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr);
2614 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi);
2615 iputbyte(chip, port + ICH_REG_OFF_CIV, ichdev->civ);
2616 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI);
2632 unsigned long pos, pos1, t;
2636 if (chip->ac97_bus->clock != 48000)
2638 if (chip->inside_vm && !ac97_clock)
2642 subs = chip->pcm[0]->streams[0].substream;
2643 if (! subs || subs->dma_buffer.bytes < INTEL8X0_TESTBUF_SIZE) {
2644 dev_warn(chip->card->dev,
2645 "no playback buffer allocated - aborting measure ac97 clock\n");
2648 ichdev = &chip->ichd[ICHD_PCMOUT];
2649 ichdev->physbuf = subs->dma_buffer.addr;
2650 ichdev->size = ichdev->fragsize = INTEL8X0_TESTBUF_SIZE;
2651 ichdev->substream = NULL; /* don't process interrupts */
2654 if (snd_ac97_set_rate(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 48000) < 0) {
2655 dev_err(chip->card->dev, "cannot set ac97 rate: clock = %d\n",
2656 chip->ac97_bus->clock);
2660 port = ichdev->reg_offset;
2661 scoped_guard(spinlock_irq, &chip->reg_lock) {
2662 chip->in_measurement = 1;
2664 if (chip->device_type != DEVICE_ALI)
2668 iputdword(chip, ICHREG(ALI_DMACR), 1 << ichdev->ali_slot);
2673 scoped_guard(spinlock_irq, &chip->reg_lock) {
2676 civ = igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV);
2677 pos1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb);
2682 if (civ == igetbyte(chip, ichdev->reg_offset + ICH_REG_OFF_CIV) &&
2683 pos1 == igetword(chip, ichdev->reg_offset + ichdev->roff_picb))
2685 } while (timeout--);
2687 pos = 0;
2689 pos = ichdev->fragsize1;
2690 pos -= pos1 << ichdev->pos_shift;
2691 pos += ichdev->position;
2693 chip->in_measurement = 0;
2696 if (chip->device_type == DEVICE_ALI) {
2697 iputdword(chip, ICHREG(ALI_DMACR), 1 << (ichdev->ali_slot + 16));
2703 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH))
2709 if (pos == 0) {
2710 dev_err(chip->card->dev,
2711 "measure - unreliable DMA position..\n");
2721 pos /= 4;
2723 dev_info(chip->card->dev,
2724 "%s: measured %lu usecs (%lu samples)\n", __func__, t, pos);
2726 dev_err(chip->card->dev, "?? calculation error..\n");
2729 pos *= 1000;
2730 pos = (pos / t) * 1000 + ((pos % t) * 1000) / t;
2731 if (pos < 40000 || pos >= 60000) {
2733 dev_info(chip->card->dev, "measured clock %ld rejected\n", pos);
2735 } else if (pos > 40500 && pos < 41500)
2736 /* first exception - 41000Hz reference clock */
2737 chip->ac97_bus->clock = 41000;
2738 else if (pos > 43600 && pos < 44600)
2739 /* second exception - 44100HZ reference clock */
2740 chip->ac97_bus->clock = 44100;
2741 else if (pos < 47500 || pos > 48500)
2743 chip->ac97_bus->clock = (chip->ac97_bus->clock * 48000) / pos;
2745 dev_info(chip->card->dev, "clocking to %d\n", chip->ac97_bus->clock);
2746 snd_ac97_update_power(chip->ac97[0], AC97_PCM_FRONT_DAC_RATE, 0);
2761 struct pci_dev *pci = chip->pci;
2767 dev_info(chip->card->dev, "allow list rate for %04x:%04x is %i\n",
2768 pci->subsystem_vendor, pci->subsystem_device, wl->value);
2769 chip->ac97_bus->clock = wl->value;
2776 struct intel8x0 *chip = entry->private_data;
2780 if (chip->device_type == DEVICE_ALI)
2785 if (chip->device_type == DEVICE_INTEL_ICH4)
2788 if (tmp & chip->codec_isr_bits) {
2793 for (i = 0; i < chip->max_codecs; i++)
2794 if (tmp & chip->codec_bit[i])
2799 if (chip->device_type == DEVICE_INTEL_ICH4 ||
2800 chip->device_type == DEVICE_SIS)
2802 chip->ac97_sdin[0],
2803 chip->ac97_sdin[1],
2804 chip->ac97_sdin[2]);
2809 snd_card_ro_proc_new(chip->card, "intel8x0", chip,
2838 if (pci->subsystem_vendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
2839 pci->subsystem_device == PCI_SUBDEVICE_ID_QEMU) {
2843 } else if (pci->subsystem_vendor == 0x1ab8) {
2851 dev_info(&pci->dev, "%s optimization\n", msg);
2860 struct intel8x0 *chip = card->private_data;
2901 spin_lock_init(&chip->reg_lock);
2902 chip->device_type = device_type;
2903 chip->card = card;
2904 chip->pci = pci;
2905 chip->irq = -1;
2908 chip->buggy_irq = buggy_irq;
2909 chip->buggy_semaphore = buggy_semaphore;
2911 chip->xbox = 1;
2913 chip->inside_vm = snd_intel8x0_inside_vm(pci);
2918 * is to set the pages as non-cached. For details, see the errata in
2921 if (pci->vendor == PCI_VENDOR_ID_INTEL &&
2922 pci->device == PCI_DEVICE_ID_INTEL_440MX)
2923 chip->fix_nocache = 1; /* enable workaround */
2925 err = pcim_request_all_regions(pci, card->shortname);
2931 chip->bmaddr = pcim_iomap(pci, 0, 0);
2934 chip->addr = pcim_iomap(pci, 2, 0);
2936 chip->addr = pcim_iomap(pci, 0, 0);
2938 chip->bmaddr = pcim_iomap(pci, 3, 0);
2940 chip->bmaddr = pcim_iomap(pci, 1, 0);
2943 chip->bdbars_count = bdbars[device_type];
2957 for (i = 0; i < chip->bdbars_count; i++) {
2958 ichdev = &chip->ichd[i];
2959 ichdev->ichd = i;
2960 ichdev->reg_offset = tbl[i].offset;
2961 ichdev->int_sta_mask = tbl[i].int_sta_mask;
2964 ichdev->roff_sr = ICH_REG_OFF_PICB;
2965 ichdev->roff_picb = ICH_REG_OFF_SR;
2967 ichdev->roff_sr = ICH_REG_OFF_SR;
2968 ichdev->roff_picb = ICH_REG_OFF_PICB;
2971 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10;
2973 ichdev->pos_shift = (device_type == DEVICE_SIS) ? 0 : 1;
2978 chip->bdbars = snd_devm_alloc_pages(&pci->dev, intel8x0_dma_type(chip),
2979 chip->bdbars_count * sizeof(u32) *
2981 if (!chip->bdbars)
2982 return -ENOMEM;
2987 for (i = 0; i < chip->bdbars_count; i++) {
2988 ichdev = &chip->ichd[i];
2989 ichdev->bdbar = ((__le32 *)chip->bdbars->area) +
2991 ichdev->bdbar_addr = chip->bdbars->addr +
2993 int_sta_masks |= ichdev->int_sta_mask;
2995 chip->int_sta_reg = device_type == DEVICE_ALI ?
2997 chip->int_sta_mask = int_sta_masks;
3001 switch(chip->device_type) {
3004 chip->max_codecs = 3;
3005 chip->codec_bit = ich_codec_bits;
3006 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_TRI;
3010 chip->max_codecs = 3;
3011 chip->codec_bit = sis_codec_bits;
3012 chip->codec_ready_bits = ICH_PRI | ICH_SRI | ICH_SIS_TRI;
3016 chip->max_codecs = 2;
3017 chip->codec_bit = ich_codec_bits;
3018 chip->codec_ready_bits = ICH_PRI | ICH_SRI;
3021 for (i = 0; i < chip->max_codecs; i++)
3022 chip->codec_isr_bits |= chip->codec_bit[i];
3030 * re-acquired in PM callbacks.
3033 if (request_irq(pci->irq, snd_intel8x0_interrupt,
3035 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
3036 return -EBUSY;
3038 chip->irq = pci->irq;
3039 card->sync_irq = chip->irq;
3041 card->private_free = snd_intel8x0_free;
3050 { PCI_DEVICE_ID_INTEL_82801AA_5, "Intel 82801AA-ICH" },
3051 { PCI_DEVICE_ID_INTEL_82801AB_5, "Intel 82901AB-ICH0" },
3052 { PCI_DEVICE_ID_INTEL_82801BA_4, "Intel 82801BA-ICH2" },
3054 { PCI_DEVICE_ID_INTEL_82801CA_5, "Intel 82801CA-ICH3" },
3055 { PCI_DEVICE_ID_INTEL_82801DB_5, "Intel 82801DB-ICH4" },
3080 /* look up allow/deny list for SPDIF over ac-link */
3087 if (w->value)
3088 dev_dbg(&pci->dev,
3089 "Using SPDIF over AC-Link for %s\n",
3092 dev_dbg(&pci->dev,
3095 return w->value;
3108 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE,
3112 chip = card->private_data;
3117 strscpy(card->driver, "ICH");
3119 switch (pci_id->driver_data) {
3121 strscpy(card->driver, "NFORCE");
3124 strscpy(card->driver, "ICH4");
3128 strscpy(card->shortname, "Intel ICH");
3129 for (name = shortnames; name->id; name++) {
3130 if (pci->device == name->id) {
3131 strscpy(card->shortname, name->s);
3140 if (pci_id->driver_data == DEVICE_NFORCE)
3146 err = snd_intel8x0_init(card, pci, pci_id->driver_data);
3159 snprintf(card->longname, sizeof(card->longname),
3160 "%s with %s at irq %i", card->shortname,
3161 snd_ac97_get_short_name(chip->ac97[0]), chip->irq);
3183 return snd_card_free_on_error(&pci->dev, __snd_intel8x0_probe(pci, pci_id));