1 // SPDX-License-Identifier: GPL-2.0-or-later
65 /* GPIO0 - O - DATA0, def. 0 */
67 /* GPIO1 - I/O - DATA1, Jack Detect Input0 (0:present, 1:missing), def. 1 */
69 /* GPIO2 - I/O - DATA2, Jack Detect Input1 (0:present, 1:missing), def. 1 */
71 /* GPIO3 - I/O - DATA3, def. 1 */
73 /* GPIO4 - I/O - DATA4, SPI CDTO, def. 1 */
75 /* GPIO5 - I/O - DATA5, SPI CCLK, def. 1 */
77 /* GPIO6 - I/O - DATA6, Cable Detect Input (0:detected, 1:not detected */
79 /* GPIO7 - I/O - DATA7, Device Detect Input (0:detected, 1:not detected */
81 /* GPIO8 - O - CPLD Chip Select, def. 1 */
83 /* GPIO9 - O - CPLD register read/write (0:write, 1:read), def. 0 */
85 /* GPIO10 - O - SPI Chip Select for CODEC#0, def. 1 */
87 /* GPIO11 - O - SPI Chip Select for CODEC#1, def. 1 */
89 /* GPIO12 - O - Ex. Register Output Enable (0:enable, 1:disable), def. 1,
92 /* GPIO13 - O - Ex. Register0 Chip Select for System Control Register,
95 /* GPIO14 - O - Ex. Register1 Chip Select for Monitor Control Register,
119 /* Analog input 3/4 Source Select (0:line, 1:hi-z) */
128 /* Monitor Control Register GPIO_MCR data bits */
129 /* Input 1/2 to Monitor 1/2 (0:off, 1:on) */
131 /* Input 1/2 to Monitor 3/4 (0:off, 1:on) */
133 /* Input 3/4 to Monitor 1/2 (0:off, 1:on) */
135 /* Input 3/4 to Monitor 3/4 (0:off, 1:on) */
137 /* Output to Monitor 1/2 (0:off, 1:on) */
139 /* Output to Monitor 3/4 (0:off, 1:on) */
151 /* Coaxial Output Source (IS-Link) (0:SPDIF, 1:I2S) */
169 /* external clock - SPDIF */
171 /* external clock - WordClock 1xfs */
173 /* external clock - WordClock 256xfs */
202 			if (value & (1 << (31-(i*8 + j))))  in get_binary()
218  * Initial setup of the conversion array GPIO <-> rate
263 	struct snd_ice1712 *ice = ak->private_data[0];  in qtet_akm_write()
267 	/*dev_dbg(ice->card->dev, "Writing to AK4620: chip=%d, addr=0x%x,  in qtet_akm_write()
269 	orig_dir = ice->gpio.get_dir(ice);  in qtet_akm_write()
270 	ice->gpio.set_dir(ice, orig_dir | GPIO_SPI_ALL);  in qtet_akm_write()
271 	/* set mask - only SPI bits */  in qtet_akm_write()
272 	ice->gpio.set_mask(ice, ~GPIO_SPI_ALL);  in qtet_akm_write()
274 	tmp = ice->gpio.get_data(ice);  in qtet_akm_write()
277 	ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
285 	ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
291 	for (idx = 15; idx >= 0; idx--) {  in qtet_akm_write()
294 		ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
301 		ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
305 		ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
310 	ice->gpio.set_data(ice, tmp);  in qtet_akm_write()
313 	/* return all gpios to non-writable */  in qtet_akm_write()
314 	ice->gpio.set_mask(ice, 0xffffff);  in qtet_akm_write()
316 	ice->gpio.set_dir(ice, orig_dir);  in qtet_akm_write()
324 	for (chip = 0; chip < ak->num_chips; chip++) {  in qtet_akm_set_regs()
341 	if (rate == 0)  /* no hint - S/PDIF input is master or the new spdif  in qtet_akm_set_rate_val()
345 	/* adjust DFS on codecs - see datasheet */  in qtet_akm_set_rate_val()
377 	.num_dacs = 4,	/* DAC1 - Output 12
379 	.num_adcs = 4,	/* ADC1 - Input 12
399 	mutex_lock(&ice->gpio_mutex);  in reg_write()
403 	ice->gpio.set_dir(ice, tmp);  in reg_write()
404 	/* mask - writable bits */  in reg_write()
405 	ice->gpio.set_mask(ice, ~(tmp));  in reg_write()
407 	tmp = ice->gpio.get_data(ice);  in reg_write()
410 	ice->gpio.set_data(ice, tmp);  in reg_write()
412 	/* drop output enable */  in reg_write()
414 	ice->gpio.set_data(ice, tmp);  in reg_write()
418 	ice->gpio.set_data(ice, tmp);  in reg_write()
422 	ice->gpio.set_data(ice, tmp);  in reg_write()
427 	ice->gpio.set_data(ice, tmp);  in reg_write()
428 	/* mask - immutable bits */  in reg_write()
429 	ice->gpio.set_mask(ice, 0xffffff);  in reg_write()
430 	/* outputs only 8-15 */  in reg_write()
431 	ice->gpio.set_dir(ice, 0x00ff00);  in reg_write()
432 	mutex_unlock(&ice->gpio_mutex);  in reg_write()
437 	struct qtet_spec *spec = ice->spec;  in get_scr()
438 	return spec->scr;  in get_scr()
443 	struct qtet_spec *spec = ice->spec;  in get_mcr()
444 	return spec->mcr;  in get_mcr()
449 	struct qtet_spec *spec = ice->spec;  in get_cpld()
450 	return spec->cpld;  in get_cpld()
455 	struct qtet_spec *spec = ice->spec;  in set_scr()
457 	spec->scr = val;  in set_scr()
462 	struct qtet_spec *spec = ice->spec;  in set_mcr()
464 	spec->mcr = val;  in set_mcr()
469 	struct qtet_spec *spec = ice->spec;  in set_cpld()
471 	spec->cpld = val;  in set_cpld()
477 	struct snd_ice1712 *ice = entry->private_data;  in proc_regs_read()
490 	snd_card_ro_proc_new(ice->card, "quartet", ice, proc_regs_read);  in proc_init()
499 	ucontrol->value.integer.value[0] = (val) ? 0 : 1;  in qtet_mute_get()
509 	if (ucontrol->value.integer.value[0]) {  in qtet_mute_put()
512 		/* un-smuting DAC */  in qtet_mute_put()
521 		struct snd_akm4xxx *ak = ice->akm;  in qtet_mute_put()
535 		{"Line In 1/2", "Mic", "Mic + Low-cut"};  in qtet_ain12_enum_info()
556 		/* BUG - no other combinations allowed */  in qtet_ain12_sw_get()
560 	ucontrol->value.integer.value[0] = result;  in qtet_ain12_sw_get()
571 	tmp = ucontrol->value.integer.value[0];  in qtet_ain12_sw_put()
615 	ucontrol->value.integer.value[0] = val ? 1 : 0;  in qtet_php_get()
625 	if (ucontrol->value.integer.value[0] /* phantom on requested */  in qtet_php_put()
634 	} else if (!ucontrol->value.integer.value[0] && (old & SCR_PHP_V)) {  in qtet_php_put()
663 	PRIV_ENUM2(AIN34_SEL, SCR_AIN34_SEL, scr, "Line In 3/4", "Hi-Z"),
677 		qtet_privates[kcontrol->private_value];  in qtet_enum_info()
686 		qtet_privates[kcontrol->private_value];  in qtet_sw_get()
688 	ucontrol->value.integer.value[0] =  in qtet_sw_get()
697 		qtet_privates[kcontrol->private_value];  in qtet_sw_put()
701 	if (ucontrol->value.integer.value[0])  in qtet_sw_put()
752 	QTET_CONTROL("Analog In 1/2 to Monitor 1/2", sw, IN12_MON12),
753 	QTET_CONTROL("Analog In 1/2 to Monitor 3/4", sw, IN12_MON34),
754 	QTET_CONTROL("Analog In 3/4 to Monitor 1/2", sw, IN34_MON12),
755 	QTET_CONTROL("Analog In 3/4 to Monitor 3/4", sw, IN34_MON34),
756 	QTET_CONTROL("Output 1/2 to Monitor 3/4", sw, OUT12_MON34),
757 	QTET_CONTROL("Output 3/4 to Monitor 1/2", sw, OUT34_MON12),
767 DECLARE_TLV_DB_SCALE(qtet_master_db_scale, -6350, 50, 1);
771 	struct qtet_spec *spec = ice->spec;  in qtet_add_controls()
778 		err = snd_ctl_add(ice->card,  in qtet_add_controls()
788 		return -ENOMEM;  in qtet_add_controls()
789 	err = snd_ctl_add(ice->card, vmaster);  in qtet_add_controls()
792 	err = snd_ctl_add_followers(ice->card, vmaster, follower_vols);  in qtet_add_controls()
796 	return snd_ak4113_build(spec->ak4113,  in qtet_add_controls()
797 			ice->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);  in qtet_add_controls()
832 	/* switching ice1724 to external clock - supplied by ext. circuits */  in qtet_set_rate()
839 	/* dev_dbg(ice->card->dev, "QT - set_rate: old %x, new %x\n",  in qtet_set_rate()
851 /* setting clock to external - SPDIF */
884 	/* checking only rate/clock-related bits */  in qtet_get_spdif_master_type()
888 		result = -1;  in qtet_get_spdif_master_type()
913 	struct snd_ice1712 *ice = ak4113->change_callback_private;  in qtet_ak4113_change()
919 		/* dev_dbg(ice->card->dev, "ak4113 - input rate changed to %d\n",  in qtet_ak4113_change()
921 		qtet_akm_set_rate_val(ice->akm, rate);  in qtet_ak4113_change()
926  * If clock slaved to SPDIF-IN, setting runtime rate
932 	struct qtet_spec *spec = ice->spec;  in qtet_spdif_in_open()
933 	struct snd_pcm_runtime *runtime = substream->runtime;  in qtet_spdif_in_open()
940 	rate = snd_ak4113_external_rate(spec->ak4113);  in qtet_spdif_in_open()
941 	if (rate >= runtime->hw.rate_min && rate <= runtime->hw.rate_max) {  in qtet_spdif_in_open()
942 		runtime->hw.rate_min = rate;  in qtet_spdif_in_open()
943 		runtime->hw.rate_max = rate;  in qtet_spdif_in_open()
969 	/* switching ice1724 to external clock - supplied by ext. circuits */  in qtet_init()
975 		return -ENOMEM;  in qtet_init()
977 	ice->hw_rates = &qtet_rates_info;  in qtet_init()
978 	ice->is_spdif_master = qtet_is_spdif_master;  in qtet_init()
979 	ice->get_rate = qtet_get_rate;  in qtet_init()
980 	ice->set_rate = qtet_set_rate;  in qtet_init()
981 	ice->set_mclk = qtet_set_mclk;  in qtet_init()
982 	ice->set_spdif_clock = qtet_set_spdif_clock;  in qtet_init()
983 	ice->get_spdif_master_type = qtet_get_spdif_master_type;  in qtet_init()
984 	ice->ext_clock_names = ext_clock_names;  in qtet_init()
985 	ice->ext_clock_count = ARRAY_SIZE(ext_clock_names);  in qtet_init()
986 	/* since Qtet can detect correct SPDIF-in rate, all streams can be  in qtet_init()
988 	ice->spdif.ops.open = ice->pro_open = qtet_spdif_in_open;  in qtet_init()
989 	ice->spec = spec;  in qtet_init()
1006 	ice->num_total_dacs = 2;  in qtet_init()
1007 	ice->num_total_adcs = 2;  in qtet_init()
1009 	ice->akm = kcalloc(2, sizeof(struct snd_akm4xxx), GFP_KERNEL);  in qtet_init()
1010 	ak = ice->akm;  in qtet_init()
1012 		return -ENOMEM;  in qtet_init()
1014 	ice->akm_codecs = 1;  in qtet_init()
1018 	err = snd_ak4113_create(ice->card,  in qtet_init()
1022 			ice, &spec->ak4113);  in qtet_init()
1026 	spec->ak4113->change_callback = qtet_ak4113_change;  in qtet_init()
1027 	spec->ak4113->change_callback_private = ice;  in qtet_init()
1030 	spec->ak4113->check_flags = 0;  in qtet_init()
1043 	[ICE_EEP2_SPDIF]       = 0xc3,	/* out-en, out-int, in, out-ext */
1044 	[ICE_EEP2_GPIO_DIR]    = 0x00,	/* 0-7 inputs, switched to output
1046 	[ICE_EEP2_GPIO_DIR1]   = 0xff,  /* 8-15 outputs */